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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 02:52:53 +02:00
llvm-mirror/test/CodeGen/SystemZ
Quentin Colombet 94dff8006e Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
This reverts commit r323991.

This commit breaks target that don't model all the register constraints
in TableGen. So far the workaround was to set the
hasExtraXXXRegAllocReq, but it proves that it doesn't cover all the
cases.
For instance, when mutating an instruction (like in the lowering of
COPYs) the isRenamable flag is not properly updated. The same problem
will happen when attaching machine operand from one instruction to
another.

Geoff Berry is working on a fix in https://reviews.llvm.org/D43042.

llvm-svn: 325421
2018-02-17 03:05:33 +00:00
..
Large [SystemZ] Run branch-12.ll test only if long tests enabled 2018-01-19 19:51:38 +00:00
addr-01.ll
addr-02.ll
addr-03.ll
alias-01.ll
alloca-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
alloca-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
alloca-03.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
alloca-04.ll
and-01.ll
and-02.ll
and-03.ll
and-04.ll
and-05.ll
and-06.ll
and-07.ll
and-08.ll
and-xor-01.ll
args-01.ll
args-02.ll
args-03.ll
args-04.ll
args-05.ll
args-06.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
args-07.ll
args-08.ll
args-09.ll
args-10.ll
asm-01.ll
asm-02.ll [SystemZ] Use valid base/index regs for inline asm 2016-08-18 21:44:15 +00:00
asm-03.ll
asm-04.ll
asm-05.ll [SystemZ] Add support for the "o" inline asm constraint 2017-11-09 16:31:57 +00:00
asm-06.ll
asm-07.ll
asm-08.ll
asm-09.ll
asm-10.ll
asm-11.ll
asm-12.ll
asm-13.ll
asm-14.ll
asm-15.ll
asm-16.ll
asm-17.ll
asm-18.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
atomic-fence-01.ll
atomic-fence-02.ll
atomic-load-01.ll [SystemZ] Eliminate unnecessary serialization operations 2017-08-04 18:53:35 +00:00
atomic-load-02.ll [SystemZ] Eliminate unnecessary serialization operations 2017-08-04 18:53:35 +00:00
atomic-load-03.ll [SystemZ] Eliminate unnecessary serialization operations 2017-08-04 18:53:35 +00:00
atomic-load-04.ll [SystemZ] Eliminate unnecessary serialization operations 2017-08-04 18:53:35 +00:00
atomic-load-05.ll [SystemZ] Add support for 128-bit atomic load/store/cmpxchg 2017-08-04 18:57:58 +00:00
atomic-store-01.ll [SystemZ] Eliminate unnecessary serialization operations 2017-08-04 18:53:35 +00:00
atomic-store-02.ll [SystemZ] Eliminate unnecessary serialization operations 2017-08-04 18:53:35 +00:00
atomic-store-03.ll [SystemZ] Eliminate unnecessary serialization operations 2017-08-04 18:53:35 +00:00
atomic-store-04.ll [SystemZ] Eliminate unnecessary serialization operations 2017-08-04 18:53:35 +00:00
atomic-store-05.ll [SystemZ] Add support for 128-bit atomic load/store/cmpxchg 2017-08-04 18:57:58 +00:00
atomicrmw-add-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-add-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-add-03.ll
atomicrmw-add-04.ll
atomicrmw-add-05.ll
atomicrmw-add-06.ll
atomicrmw-and-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-and-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-and-03.ll
atomicrmw-and-04.ll
atomicrmw-and-05.ll
atomicrmw-and-06.ll
atomicrmw-minmax-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-minmax-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-minmax-03.ll [IfConversion] Maintain the CFG when predicating/merging blocks in IfConvert* 2017-08-11 06:57:08 +00:00
atomicrmw-minmax-04.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-nand-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-nand-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-nand-03.ll
atomicrmw-nand-04.ll
atomicrmw-or-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-or-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-or-03.ll
atomicrmw-or-04.ll
atomicrmw-or-05.ll
atomicrmw-or-06.ll
atomicrmw-sub-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-sub-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-sub-03.ll
atomicrmw-sub-04.ll
atomicrmw-sub-05.ll
atomicrmw-sub-06.ll
atomicrmw-xchg-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-xchg-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-xchg-03.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-xchg-04.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-xor-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-xor-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
atomicrmw-xor-03.ll
atomicrmw-xor-04.ll
atomicrmw-xor-05.ll
atomicrmw-xor-06.ll
backchain.ll [SystemZ] set 'guessInstructionProperties = 0' and set flags as needed. 2017-12-05 11:24:39 +00:00
branch-01.ll
branch-02.ll
branch-03.ll
branch-04.ll
branch-05.ll
branch-06.ll
branch-07.ll [SystemZ] Rework IPM sequence generation 2018-01-19 20:52:04 +00:00
branch-08.ll
branch-09.ll
branch-10.ll
branch-11.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
bswap-01.ll
bswap-02.ll
bswap-03.ll
bswap-04.ll
bswap-05.ll
bswap-06.ll
bswap-07.ll
bswap-08.ll [SystemZ] Fix truncstore + bswap codegen bug 2017-09-19 20:50:05 +00:00
builtins.ll
call-01.ll
call-02.ll
call-03.ll [Regalloc] Generate and store multiple regalloc hints. 2017-12-05 10:52:24 +00:00
call-04.ll
call-05.ll
clear-liverange-spillreg.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cmpxchg-01.ll [SystemZ] Directly use CC result of compare-and-swap 2018-01-19 20:54:18 +00:00
cmpxchg-02.ll [SystemZ] Directly use CC result of compare-and-swap 2018-01-19 20:54:18 +00:00
cmpxchg-03.ll [SystemZ] Directly use CC result of compare-and-swap 2018-01-19 20:54:18 +00:00
cmpxchg-04.ll [SystemZ] Directly use CC result of compare-and-swap 2018-01-19 20:54:18 +00:00
cmpxchg-05.ll [SystemZ] Custom-expand ATOMIC_CMP_AND_SWAP_WITH_SUCCESS 2017-09-28 16:22:54 +00:00
cmpxchg-06.ll [SystemZ] Directly use CC result of compare-and-swap 2018-01-19 20:54:18 +00:00
cond-load-01.ll [SystemZ] Improve use of conditional instructions 2016-11-28 13:34:08 +00:00
cond-load-02.ll [SystemZ] Do not use LOC(G) for volatile loads 2016-10-25 15:39:15 +00:00
cond-load-03.ll [SystemZ] Improve use of conditional instructions 2016-11-28 13:34:08 +00:00
cond-move-01.ll [SystemZ] Improve use of conditional instructions 2016-11-28 13:34:08 +00:00
cond-move-02.ll [SystemZ] Improve use of conditional instructions 2016-11-28 13:34:08 +00:00
cond-move-03.ll [SystemZ] Improve use of conditional instructions 2016-11-28 13:34:08 +00:00
cond-move-04.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cond-move-05.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cond-store-01.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
cond-store-02.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
cond-store-03.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
cond-store-04.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
cond-store-05.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
cond-store-06.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
cond-store-07.ll [SystemZ] Improve use of conditional instructions 2016-11-28 13:34:08 +00:00
cond-store-08.ll
cond-store-09.ll [SystemZ] Improve use of conditional instructions 2016-11-28 13:34:08 +00:00
copy-physreg-128.ll [SystemZ] Make copyPhysReg() add impl-use operands of super reg. 2017-05-04 13:33:30 +00:00
ctpop-01.ll
dag-combine-01.ll [SystemZ, LoopStrengthReduce] 2017-07-21 11:59:37 +00:00
dag-combine-02.ll [SystemZ] Prefer LOCHI over generating IPM sequences 2018-01-19 20:56:04 +00:00
DAGCombine_trunc_extract.ll [SystemZ] Check for presence of vector support in SystemZISelLowering 2017-04-07 12:35:11 +00:00
DAGCombiner_illegal_BUILD_VECTOR.ll [DAGCombiner] Don't make a BUILD_VECTOR with operands of illegal type. 2017-04-05 13:45:37 +00:00
DAGCombiner_isAlias.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
dyn-alloca-offset.ll
expand-zext-pseudo.ll [SystemZ] Don't drop any operands in expandZExtPseudo() 2017-03-22 06:03:32 +00:00
extract-vector-elt-zEC12.ll [SystemZ] Skip DAGCombining of vector node for older subtargets. 2017-03-31 13:22:59 +00:00
fold-memory-op-impl.ll [SystemZ] Don't drop MO flags in foldMemoryOperandImpl() 2017-03-21 05:49:40 +00:00
fp-abs-01.ll
fp-abs-02.ll
fp-abs-03.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-abs-04.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-add-01.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-add-02.ll
fp-add-03.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
fp-add-04.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-cmp-01.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-cmp-02.ll
fp-cmp-03.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
fp-cmp-04.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
fp-cmp-05.ll DAG: Fold fneg into compare with constant into the constant 2017-01-30 17:57:28 +00:00
fp-cmp-06.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-cmp-07.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
fp-const-01.ll
fp-const-02.ll
fp-const-03.ll
fp-const-04.ll
fp-const-05.ll
fp-const-06.ll
fp-const-07.ll
fp-const-08.ll
fp-const-09.ll
fp-const-10.ll Re-add SystemZ SNaN test 2016-08-08 18:11:13 +00:00
fp-const-11.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-conv-01.ll
fp-conv-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
fp-conv-03.ll
fp-conv-04.ll
fp-conv-05.ll
fp-conv-06.ll
fp-conv-07.ll
fp-conv-08.ll
fp-conv-09.ll
fp-conv-10.ll
fp-conv-11.ll
fp-conv-12.ll
fp-conv-13.ll
fp-conv-14.ll
fp-conv-15.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-conv-16.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-conv-17.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
fp-copysign-01.ll
fp-copysign-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
fp-div-01.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-div-02.ll
fp-div-03.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
fp-div-04.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-libcall.ll
fp-move-01.ll
fp-move-02.ll
fp-move-03.ll
fp-move-04.ll
fp-move-05.ll
fp-move-06.ll
fp-move-07.ll
fp-move-08.ll
fp-move-09.ll
fp-move-10.ll
fp-move-11.ll
fp-move-12.ll
fp-move-13.ll [DAG] Do MergeConsecutiveStores again before Instruction Selection 2017-11-27 15:28:15 +00:00
fp-mul-01.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-mul-02.ll
fp-mul-03.ll
fp-mul-04.ll
fp-mul-05.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
fp-mul-06.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-mul-07.ll
fp-mul-08.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-mul-09.ll
fp-mul-10.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-mul-11.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-mul-12.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-neg-01.ll
fp-neg-02.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-round-01.ll
fp-round-02.ll
fp-round-03.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-sincos-01.ll [SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno 2017-06-12 17:15:41 +00:00
fp-sqrt-01.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-sqrt-02.ll
fp-sqrt-03.ll
fp-sqrt-04.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fp-sub-01.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
fp-sub-02.ll
fp-sub-03.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
fp-sub-04.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
fpc-intrinsics.ll [SystemZ] Support floating-point control register instructions 2016-12-02 18:21:53 +00:00
frame-01.ll
frame-02.ll
frame-03.ll
frame-04.ll
frame-05.ll
frame-06.ll
frame-07.ll
frame-08.ll
frame-09.ll
frame-10.ll
frame-11.ll
frame-13.ll
frame-14.ll
frame-15.ll
frame-16.ll
frame-17.ll
frame-18.ll
frame-19.ll
frame-20.ll
frame-21.ll [SystemZ] Fix missing emergency spill slot corner case 2017-06-26 16:50:32 +00:00
frameaddr-01.ll
htm-intrinsics.ll
insert-01.ll
insert-02.ll
insert-03.ll
insert-04.ll
insert-05.ll
insert-06.ll
int-abs-01.ll
int-add-01.ll
int-add-02.ll
int-add-03.ll
int-add-04.ll
int-add-05.ll
int-add-06.ll
int-add-07.ll
int-add-08.ll
int-add-09.ll
int-add-10.ll
int-add-11.ll
int-add-12.ll
int-add-13.ll
int-add-14.ll
int-add-15.ll
int-add-16.ll
int-add-17.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
int-cmp-01.ll
int-cmp-02.ll
int-cmp-03.ll
int-cmp-04.ll
int-cmp-05.ll
int-cmp-06.ll
int-cmp-07.ll
int-cmp-08.ll
int-cmp-09.ll
int-cmp-10.ll
int-cmp-11.ll
int-cmp-12.ll
int-cmp-13.ll
int-cmp-14.ll
int-cmp-15.ll
int-cmp-16.ll
int-cmp-17.ll
int-cmp-18.ll
int-cmp-19.ll
int-cmp-20.ll
int-cmp-21.ll
int-cmp-22.ll
int-cmp-23.ll
int-cmp-24.ll
int-cmp-25.ll
int-cmp-26.ll
int-cmp-27.ll
int-cmp-28.ll
int-cmp-29.ll
int-cmp-30.ll
int-cmp-31.ll
int-cmp-32.ll
int-cmp-33.ll
int-cmp-34.ll
int-cmp-35.ll
int-cmp-36.ll
int-cmp-37.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
int-cmp-38.ll
int-cmp-39.ll
int-cmp-40.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
int-cmp-41.ll
int-cmp-42.ll
int-cmp-43.ll
int-cmp-44.ll CodeGen: Allow small copyable blocks to "break" the CFG. 2017-01-31 23:48:32 +00:00
int-cmp-45.ll
int-cmp-46.ll
int-cmp-47.ll [SystemZ] Validate shifted compare value in adjustForTestUnderMask 2017-12-05 19:42:07 +00:00
int-cmp-48.ll [SystemZ, MachineScheduler] Improve post-RA scheduling. 2017-08-17 08:33:44 +00:00
int-cmp-49.ll
int-cmp-50.ll
int-cmp-51.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
int-cmp-52.ll
int-cmp-53.ll
int-cmp-54.ll [SystemZ] Add a check against zero before calling getTestUnderMaskCond() 2017-06-26 13:38:27 +00:00
int-const-01.ll
int-const-02.ll [SystemZ] Do not crash when selecting an OR of two constants 2017-11-14 20:00:34 +00:00
int-const-03.ll
int-const-04.ll
int-const-05.ll
int-const-06.ll
int-conv-01.ll
int-conv-02.ll
int-conv-03.ll
int-conv-04.ll
int-conv-05.ll
int-conv-06.ll
int-conv-07.ll
int-conv-08.ll
int-conv-09.ll
int-conv-10.ll
int-conv-11.ll
int-conv-12.ll [SystemZ] Use LLGT(R) instructions 2016-11-11 12:43:51 +00:00
int-conv-13.ll [SystemZ] Support load-and-zero-rightmost-byte facility 2016-11-11 12:46:28 +00:00
int-div-01.ll [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
int-div-02.ll [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
int-div-03.ll [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
int-div-04.ll [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
int-div-05.ll [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
int-div-06.ll [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
int-move-01.ll
int-move-02.ll
int-move-03.ll
int-move-04.ll
int-move-05.ll
int-move-06.ll
int-move-07.ll
int-move-08.ll
int-move-09.ll
int-mul-01.ll
int-mul-02.ll
int-mul-03.ll
int-mul-04.ll
int-mul-05.ll
int-mul-06.ll
int-mul-07.ll
int-mul-08.ll [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
int-mul-09.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
int-mul-10.ll [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
int-mul-11.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
int-neg-01.ll
int-neg-02.ll
int-sub-01.ll
int-sub-02.ll
int-sub-03.ll
int-sub-04.ll
int-sub-05.ll
int-sub-06.ll
int-sub-07.ll
int-sub-08.ll
int-sub-09.ll
int-sub-10.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
la-01.ll
la-02.ll
la-03.ll
la-04.ll
list-ilp-crash.ll [SystemZ] Implement getRepRegClassFor() 2017-05-10 13:03:25 +00:00
lit.local.cfg
load-and-test.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
locr-legal-regclass.ll [SystemZ] Make sure of correct regclasses in insertSelect() 2017-03-31 14:06:59 +00:00
loop-01.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
loop-02.ll [SystemZ] Add remaining branch instructions 2016-11-28 13:40:08 +00:00
loop-03.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
loop-04.ll [SystemZ] Check the bitwidth before calling isInt/isUInt. 2018-01-31 12:41:25 +00:00
lower-copy-undef-src.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
mature-mc-support.ll [LLC] Add an inline assembly diagnostics handler. 2017-02-03 11:14:39 +00:00
memchr-01.ll [TLI] Robustize SDAG LibFunc proto checking by merging it into TLI. 2017-02-03 19:11:19 +00:00
memchr-nobuiltin.ll
memcmp-01.ll
memcmp-nobuiltin.ll
memcpy-01.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
memcpy-02.ll
memset-01.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
memset-02.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
memset-03.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
memset-04.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
or-01.ll
or-02.ll
or-03.ll
or-04.ll
or-05.ll
or-06.ll
or-07.ll
or-08.ll
pie.ll
pr31710.ll SDAG: Update ChainNodesMatched during UpdateChains if a node is replaced 2017-01-30 18:29:46 +00:00
pr32372.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
pr32505.ll Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
pr36164.ll [SelectionDAG] Fix UpdateChains handling of TokenFactors 2018-02-01 16:11:59 +00:00
prefetch-01.ll
RAbasic-invalid-LR-update.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
regalloc-fast-invalid-kill-flag.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
regalloc-GR128.ll [SystemZ] implement shouldCoalesce() 2017-09-29 14:31:39 +00:00
ret-addr-01.ll
risbg-01.ll [SystemZ] set 'guessInstructionProperties = 0' and set flags as needed. 2017-12-05 11:24:39 +00:00
risbg-02.ll
risbg-03.ll
risbg-04.ll [SystemZ] Fix invalid codegen using RISBMux on out-of-range bits 2017-11-14 19:20:46 +00:00
rnsbg-01.ll
rosbg-01.ll
rosbg-02.ll [SystemZ] Bugfix in expandRxSBG() 2017-12-06 13:53:24 +00:00
rot-01.ll
rot-02.ll
rxsbg-01.ll
selectcc-01.ll
selectcc-02.ll
selectcc-03.ll
setcc-01.ll
setcc-02.ll
setcc-03.ll [SystemZ] Rework IPM sequence generation 2018-01-19 20:52:04 +00:00
setcc-04.ll [SystemZ] Rework IPM sequence generation 2018-01-19 20:52:04 +00:00
shift-01.ll
shift-02.ll
shift-03.ll
shift-04.ll
shift-05.ll
shift-06.ll
shift-07.ll
shift-08.ll
shift-09.ll
shift-10.ll [DAG] optimize negation of bool 2016-10-19 16:58:59 +00:00
shift-11.ll Fix SystemZ compilation abort caused by negative AND mask 2016-08-18 18:04:26 +00:00
shift-12.ll
spill-01.ll
splitMove_undefReg_mverifier_2.ll [SystemZ] Update kill-flag in splitMove(). 2017-04-24 12:40:28 +00:00
splitMove_undefReg_mverifier.ll [SystemZ] Add use of super-reg in splitMove() 2017-03-17 06:47:08 +00:00
stack-guard.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
store_nonbytesized_vecs.ll [SelectionDAG] Consider endianness in scalarizeVectorStore(). 2018-02-02 08:48:02 +00:00
strcmp-01.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
strcmp-nobuiltin.ll
strcpy-01.ll
strcpy-nobuiltin.ll
strlen-01.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
strlen-nobuiltin.ll
swift-return.ll [Regalloc] Generate and store multiple regalloc hints. 2017-12-05 10:52:24 +00:00
swifterror.ll [Regalloc] Generate and store multiple regalloc hints. 2017-12-05 10:52:24 +00:00
swiftself.ll
tail-call-mem-intrinsics.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
tdc-01.ll
tdc-02.ll
tdc-03.ll
tdc-04.ll
tdc-05.ll
tdc-06.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
tdc-07.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
tls-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
tls-02.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
tls-03.ll
tls-04.ll
tls-05.ll
tls-06.ll
tls-07.ll
trap-01.ll
trap-02.ll [SystemZ] Fix trap issue and enable expensive checks. 2017-06-23 14:30:46 +00:00
trap-03.ll [SystemZ] Support load-and-trap instructions 2016-11-28 13:59:22 +00:00
trap-04.ll [SystemZ] Support load-and-trap instructions 2016-11-28 13:59:22 +00:00
trap-05.ll [SystemZ] Support load-and-trap instructions 2016-11-28 13:59:22 +00:00
twoaddr-sink.ll [SystemZ] set 'guessInstructionProperties = 0' and set flags as needed. 2017-12-05 11:24:39 +00:00
unaligned-01.ll In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled. 2017-03-14 00:34:14 +00:00
undef-flag.ll Fixed parser error on windows shell evaluation of RUN script line 2017-01-18 11:40:28 +00:00
vec-abi-align.ll
vec-abs-01.ll
vec-abs-02.ll
vec-abs-03.ll
vec-abs-04.ll
vec-abs-05.ll
vec-abs-06.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-add-01.ll
vec-add-02.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-and-01.ll
vec-and-02.ll
vec-and-03.ll
vec-and-04.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
vec-args-01.ll
vec-args-02.ll
vec-args-03.ll
vec-args-04.ll
vec-args-05.ll
vec-args-06.ll [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
vec-args-07.ll
vec-args-error-01.ll
vec-args-error-02.ll
vec-args-error-03.ll
vec-args-error-04.ll
vec-args-error-05.ll
vec-args-error-06.ll
vec-args-error-07.ll
vec-args-error-08.ll
vec-cmp-01.ll
vec-cmp-02.ll
vec-cmp-03.ll
vec-cmp-04.ll
vec-cmp-05.ll
vec-cmp-06.ll
vec-cmp-07.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-cmp-cmp-logic-select.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
vec-cmpsel.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
vec-combine-01.ll
vec-combine-02.ll
vec-const-01.ll
vec-const-02.ll
vec-const-03.ll
vec-const-04.ll
vec-const-05.ll
vec-const-06.ll
vec-const-07.ll
vec-const-08.ll
vec-const-09.ll
vec-const-10.ll
vec-const-11.ll
vec-const-12.ll
vec-const-13.ll
vec-const-14.ll
vec-const-15.ll
vec-const-16.ll
vec-const-17.ll
vec-const-18.ll
vec-conv-01.ll
vec-conv-02.ll
vec-ctlz-01.ll
vec-ctpop-01.ll
vec-ctpop-02.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
vec-cttz-01.ll
vec-div-01.ll [SystemZ] Enable machine scheduler. 2017-10-06 13:59:28 +00:00
vec-div-02.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-extract-01.ll
vec-extract-02.ll
vec-intrinsics-01.ll [SystemZ] Prefer LOCHI over generating IPM sequences 2018-01-19 20:56:04 +00:00
vec-intrinsics-02.ll [SystemZ] Prefer LOCHI over generating IPM sequences 2018-01-19 20:56:04 +00:00
vec-load-element.ll [SelectionDAGBuilder] Chain prefetches less aggressively. 2018-01-10 09:33:00 +00:00
vec-log-01.ll
vec-max-01.ll
vec-max-02.ll
vec-max-03.ll
vec-max-04.ll
vec-max-05.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
vec-min-01.ll
vec-min-02.ll
vec-min-03.ll
vec-min-04.ll
vec-min-05.ll [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
vec-move-01.ll
vec-move-02.ll
vec-move-03.ll
vec-move-04.ll
vec-move-05.ll
vec-move-06.ll
vec-move-07.ll
vec-move-08.ll
vec-move-09.ll
vec-move-10.ll
vec-move-11.ll
vec-move-12.ll
vec-move-13.ll
vec-move-14.ll
vec-move-15.ll
vec-move-16.ll
vec-move-17.ll [SelectionDAG] Consider endianness in scalarizeVectorStore(). 2018-02-02 08:48:02 +00:00
vec-move-18.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
vec-mul-01.ll
vec-mul-02.ll
vec-mul-03.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-mul-04.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-mul-05.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-neg-01.ll
vec-neg-02.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-or-01.ll
vec-or-02.ll
vec-or-03.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
vec-perm-01.ll
vec-perm-02.ll
vec-perm-03.ll
vec-perm-04.ll
vec-perm-05.ll
vec-perm-06.ll
vec-perm-07.ll
vec-perm-08.ll
vec-perm-09.ll
vec-perm-10.ll
vec-perm-11.ll
vec-perm-12.ll [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
vec-perm-13.ll [DAG] Remove isVectorClearMaskLegal() check from vector_build dagcombine 2016-09-28 06:13:58 +00:00
vec-round-01.ll
vec-round-02.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-sext.ll [DAGTypeLegalizer] Handle SIGN/ZERO_EXTEND in WidenVecRes_Convert(). 2017-01-27 07:46:26 +00:00
vec-shift-01.ll
vec-shift-02.ll
vec-shift-03.ll
vec-shift-04.ll
vec-shift-05.ll
vec-shift-06.ll
vec-shift-07.ll
vec-sqrt-01.ll
vec-sqrt-02.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-sub-01.ll Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
vec-sub-02.ll [SystemZ] Add support for IBM z14 processor (2/3) 2017-07-17 17:42:48 +00:00
vec-trunc-to-i1.ll [SystemZ] Update test case (NFC) 2018-02-02 07:52:02 +00:00
vec-xor-01.ll
vec-xor-02.ll [SystemZ] Add support for IBM z14 processor (1/3) 2017-07-17 17:41:11 +00:00
vec-zext.ll [DAGTypeLegalizer] Handle SIGN/ZERO_EXTEND in WidenVecRes_Convert(). 2017-01-27 07:46:26 +00:00
vectorizer-output-3xi32.ll [SystemZ] Add check VT.isSimple() in canTreateAsByteVector() 2017-03-07 09:49:31 +00:00
xor-01.ll
xor-02.ll
xor-03.ll
xor-04.ll
xor-05.ll
xor-06.ll
xor-07.ll
xor-08.ll