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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
41 lines
1.2 KiB
YAML
41 lines
1.2 KiB
YAML
# RUN: llc --mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs -run-pass si-fold-operands,si-shrink-instructions %s -o - | FileCheck %s
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--- |
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define amdgpu_kernel void @test() #0 {
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ret void
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}
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attributes #0 = { nounwind }
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...
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---
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# This used to crash / trigger an assertion, because re-scanning the use list
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# after constant-folding the definition of %3 lead to the definition of %2
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# being processed twice.
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# CHECK-LABEL: name: test
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# CHECK: %2:vgpr_32 = V_LSHLREV_B32_e32 2, killed %0, implicit $exec
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# CHECK: %4:vgpr_32 = V_AND_B32_e32 8, killed %2, implicit $exec
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name: test
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vgpr_32 }
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- { id: 1, class: sreg_32 }
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- { id: 2, class: vgpr_32 }
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- { id: 3, class: sreg_32 }
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- { id: 4, class: vgpr_32 }
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- { id: 5, class: sreg_128 }
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body: |
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bb.0 (%ir-block.0):
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%0 = IMPLICIT_DEF
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%1 = S_MOV_B32 2
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%2 = V_LSHLREV_B32_e64 %1, killed %0, implicit $exec
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%3 = S_LSHL_B32 %1, killed %1, implicit-def dead $scc
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%4 = V_AND_B32_e64 killed %2, killed %3, implicit $exec
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%5 = IMPLICIT_DEF
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BUFFER_STORE_DWORD_OFFSET killed %4, killed %5, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM
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...
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