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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
50 lines
1.4 KiB
YAML
50 lines
1.4 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN,GFX9 %s
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# RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN,VI %s
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# RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN,CI %s
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# RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN,SI %s
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---
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name: m0_sendmsg
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body: |
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; GCN-LABEL: name: m0_sendmsg
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; GCN: $m0 = S_MOV_B32 -1
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; VI-NEXT: S_NOP 0
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; GFX9-NEXT: S_NOP 0
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; GCN-NEXT: S_SENDMSG 3, implicit $exec, implicit $m0
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bb.0:
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$m0 = S_MOV_B32 -1
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S_SENDMSG 3, implicit $exec, implicit $m0
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S_ENDPGM
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...
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---
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name: m0_sendmsghalt
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body: |
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; GCN-LABEL: name: m0_sendmsghalt
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; GCN: $m0 = S_MOV_B32 -1
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; VI-NEXT: S_NOP 0
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; GFX9-NEXT: S_NOP 0
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; GCN-NEXT: S_SENDMSGHALT 3, implicit $exec, implicit $m0
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bb.0:
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$m0 = S_MOV_B32 -1
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S_SENDMSGHALT 3, implicit $exec, implicit $m0
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S_ENDPGM
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...
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---
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name: m0_ttracedata
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body: |
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; GCN-LABEL: name: m0_ttracedata
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; GCN: $m0 = S_MOV_B32 -1
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; VI-NEXT: S_NOP 0
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; GFX9-NEXT: S_NOP 0
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; GCN-NEXT: S_TTRACEDATA implicit $m0
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bb.0:
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$m0 = S_MOV_B32 -1
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S_TTRACEDATA implicit $m0
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S_ENDPGM
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...
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