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b3c888286c
This has proven a healthy exercise, as many cases of incorrect instruction flags were corrected in the process. As part of this, IntrWriteMem was added to several SystemZ instrinsics. Furthermore, a bug was exposed in TwoAddress with this change (as incorrect hasSideEffects flags were removed and instructions could now be sunk), and the test case for that bugfix (r319646) is included here as test/CodeGen/SystemZ/twoaddr-sink.ll. One temporary test regression (one extra copy) which will hopefully go away in upcoming patches for similar cases: test/CodeGen/SystemZ/vec-trunc-to-i1.ll Review: Ulrich Weigand. https://reviews.llvm.org/D40437 llvm-svn: 319756
85 lines
2.2 KiB
LLVM
85 lines
2.2 KiB
LLVM
; Test the backchain attribute.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare i8 *@llvm.stacksave()
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declare void @llvm.stackrestore(i8 *)
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declare void @g()
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; nothing should happen if no stack frame is needed.
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define void @f1() "backchain" {
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; CHECK-LABEL: f1:
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; CHECK-NOT: stg
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ret void
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}
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; check that backchain is saved if we call someone
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define void @f2() "backchain" {
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; CHECK-LABEL: f2:
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; CHECK: stmg %r14, %r15, 112(%r15)
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; CHECK: lgr %r1, %r15
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; CHECK: aghi %r15, -160
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; CHECK: stg %r1, 0(%r15)
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call void @g()
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call void @g()
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ret void
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}
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; check that backchain is saved if we have an alloca
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define void @f3() "backchain" {
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; CHECK-LABEL: f3:
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; CHECK-NOT: stmg
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; CHECK: lgr %r1, %r15
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; CHECK: aghi %r15, -168
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; CHECK: stg %r1, 0(%r15)
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%ign = alloca i8, i32 4
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ret void
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}
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; check that alloca copies the backchain
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define void @f4(i32 %len) "backchain" {
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; CHECK-LABEL: f4:
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; CHECK: stmg %r11, %r15, 88(%r15)
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; CHECK: lgr %r1, %r15
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; CHECK: aghi %r15, -160
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; CHECK: stg %r1, 0(%r15)
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; CHECK: lgr %r11, %r15
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; CHECK-DAG: lg [[BC:%r[0-9]+]], 0(%r15)
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; CHECK-DAG: lgr [[NEWSP:%r[0-9]+]], %r15
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; CHECK: lgr %r15, [[NEWSP]]
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; CHECK: stg [[BC]], 0([[NEWSP]])
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%ign = alloca i8, i32 %len
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ret void
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}
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; check that llvm.stackrestore restores the backchain
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define void @f5(i32 %count1, i32 %count2) "backchain" {
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; CHECK-LABEL: f5:
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; CHECK: stmg %r11, %r15, 88(%r15)
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; CHECK: lgr %r1, %r15
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; CHECK: aghi %r15, -160
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; CHECK: stg %r1, 0(%r15)
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; CHECK: lgr %r11, %r15
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; CHECK-DAG: lgr [[SAVESP:%r[0-9]+]], %r15
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; CHECK-DAG: lg [[BC:%r[0-9]+]], 0(%r15)
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; CHECK-DAG: lgr [[NEWSP:%r[0-9]+]], %r15
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; CHECK-DAG: lgr %r15, [[NEWSP]]
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; CHECK-DAG: stg [[BC]], 0([[NEWSP]])
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; CHECK-DAG: lg [[BC2:%r[0-9]+]], 0(%r15)
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; CHECK-DAG: lgr %r15, [[SAVESP]]
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; CHECK-DAG: stg [[BC2]], 0([[SAVESP]])
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; CHECK-DAG: lg [[BC3:%r[0-9]+]], 0(%r15)
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; CHECK-DAG: lgr [[NEWSP2:%r[0-9]+]], %r15
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; CHECK-DAG: lgr %r15, [[NEWSP2]]
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; CHECK-DAG: stg [[BC3]], 0([[NEWSP2]])
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; CHECK: lmg %r11, %r15, 248(%r11)
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; CHECK: br %r14
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%src = call i8 *@llvm.stacksave()
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%array1 = alloca i8, i32 %count1
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store volatile i8 0, i8 *%array1
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call void @llvm.stackrestore(i8 *%src)
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%array2 = alloca i8, i32 %count2
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store volatile i8 0, i8 *%array2
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ret void
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}
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