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5020f81c76
On the z13, it turns out to be more efficient to access a full floating-point register than just the upper half (as done e.g. by the LE and LER instructions). Current code already takes this into account when loading from memory by using the LDE instruction in place of LE. However, we still generate LER, which shows the same performance issues as LE in certain circumstances. This patch changes the back-end to emit LDR instead of LER to implement FP32 register-to-register copies on z13. llvm-svn: 263431
34 lines
720 B
LLVM
34 lines
720 B
LLVM
; Test moves between FPRs.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; Test f32 moves.
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define float @f1(float %a, float %b) {
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; CHECK-LABEL: f1:
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; CHECK: ler %f0, %f2
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; CHECK: br %r14
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ret float %b
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}
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; Test f64 moves.
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define double @f2(double %a, double %b) {
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; CHECK-LABEL: f2:
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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ret double %b
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}
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; Test f128 moves. Since f128s are passed by reference, we need to force
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; a copy by other means.
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define void @f3(fp128 *%x) {
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; CHECK-LABEL: f3:
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; CHECK: lxr
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; CHECK: axbr
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; CHECK: br %r14
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%val = load volatile fp128 , fp128 *%x
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%sum = fadd fp128 %val, %val
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store volatile fp128 %sum, fp128 *%x
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store volatile fp128 %val, fp128 *%x
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ret void
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}
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