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llvm-mirror/test/CodeGen/MIR/X86/missing-comma.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
--- |
define i32 @foo() {
entry:
ret i32 0
}
...
---
name: foo
body: |
bb.0.entry:
; CHECK: [[@LINE+1]]:25: expected ',' before the next machine operand
$eax = XOR32rr $eax $eflags
RETQ $eax
...