Simon Dardis f8c3909721 Recommit "[mips] Fix atomic compare and swap at O0." ... This time with the missing files. Similar to PR/25526, fast-regalloc introduces spills at the end of basic blocks. When this occurs in between an ll and sc, the store can cause the atomic sequence to fail. This patch fixes the issue by introducing more pseudos to represent atomic operations and moving their lowering to after the expansion of postRA pseudos. This resolves PR/32020. Thanks to James Cowgill for reporting the issue! Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D30257 llvm-svn: 296134		2017-02-24 16:32:18 +00:00
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AArch64	[globalisel] Decouple src pattern operands from dst pattern operands.	2017-02-24 15:43:30 +00:00
AMDGPU	Correct register pressure calculation in presence of subregs	2017-02-23 20:19:44 +00:00
ARM	[ARM] GlobalISel: Select G_STORE	2017-02-24 14:01:27 +00:00
AVR	[AVR] Disable integrated assembler for a few tests	2017-02-22 22:41:13 +00:00
BPF
Generic
Hexagon	[Hexagon] Handle saturations in Hexagon bit tracker	2017-02-23 22:11:52 +00:00
Inputs
Lanai
Mips	Recommit "[mips] Fix atomic compare and swap at O0."	2017-02-24 16:32:18 +00:00
MIR	MIRTests: Remove unnecessary 2>&1 redirection	2017-02-22 18:47:41 +00:00
MSP430	Revert r269060 to pacify bots.	2017-02-24 01:22:19 +00:00
NVPTX	[NVPTX] Added support for .f16x2 instructions.	2017-02-23 22:38:24 +00:00
PowerPC	Revert r269060 to pacify bots.	2017-02-24 01:22:19 +00:00
SPARC
SystemZ
Thumb	[ARM] Fix constant islands pass.	2017-02-22 09:06:21 +00:00
Thumb2	[ARM] Replace HasT2ExtractPack with HasDSP	2017-02-17 15:42:44 +00:00
WebAssembly	[WebAssembly] Configure codegen to legalize f16 values.	2017-02-22 16:28:00 +00:00
WinEH
X86	[AVX-512] Remove lzcnt intrinsics and autoupgrade them to generic ctlz intrinsics with select.	2017-02-24 05:35:04 +00:00
XCore