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llvm-mirror/test/CodeGen/MIR
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Matthias Braun 075724a5d9 MIRTests: Remove unnecessary 2>&1 redirection 
llc mir output goes to stdout nowadays, so the 2>&1 is not necessary
anymore for most tests.

llvm-svn: 295859
2017-02-22 18:47:41 +00:00
..
AArch64 MIR: parse & print the atomic parts of a MachineMemOperand. 2017-02-13 22:14:08 +00:00
AMDGPU AMDGPU: Remove dead declarations from MIR tests 2017-02-21 19:27:36 +00:00
ARM Move test to correct directory 2016-12-17 02:16:26 +00:00
Generic MIRTests: Remove unnecessary 2>&1 redirection 2017-02-22 18:47:41 +00:00
Hexagon Move .mir tests to appropriate directories 2016-12-09 19:08:15 +00:00
Mips MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
NVPTX
PowerPC MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
X86 MIRTests: Remove unnecessary 2>&1 redirection 2017-02-22 18:47:41 +00:00
README Add README describing the intention of test/CodeGen/MIR 2016-12-09 20:16:12 +00:00

README 

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.