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AsmParser
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[TableGen] Move OperandMatchResultTy enum to MCTargetAsmParser.h
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2016-11-01 16:32:05 +00:00 |
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Disassembler
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AMDGPU: Whitespace fixes
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2016-11-01 00:55:14 +00:00 |
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InstPrinter
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[AMDGPU][MC][gfx8] Support 20-bit immediate offset in SMEM instructions.
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2016-10-31 16:07:39 +00:00 |
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MCTargetDesc
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AMDGPU: Use 1/2pi inline imm on VI
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2016-10-29 04:05:06 +00:00 |
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TargetInfo
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Move the global variables representing each Target behind accessor function
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2016-10-09 23:00:34 +00:00 |
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Utils
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AMDGPU/SI: Handle hazard with > 8 byte VMEM stores
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2016-10-27 23:05:31 +00:00 |
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AMDGPU.h
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Move the global variables representing each Target behind accessor function
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2016-10-09 23:00:34 +00:00 |
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AMDGPU.td
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AMDGPU: Whitespace fixes
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2016-11-01 00:55:14 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU: Diagnose using too many SGPRs
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2016-10-28 20:31:47 +00:00 |
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AMDGPUAsmPrinter.h
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUCallingConv.td
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AMDGPUCallLowering.cpp
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
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AMDGPUCallLowering.h
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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[AMDGPU] AMDGPUCodeGenPrepare: remove extra ';'
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2016-10-07 14:39:53 +00:00 |
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AMDGPUFrameLowering.cpp
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MachineFunction: Return reference for getFrameInfo(); NFC
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2016-07-28 18:40:00 +00:00 |
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
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[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
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2016-10-07 14:46:06 +00:00 |
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AMDGPUInstrInfo.h
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[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
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2016-10-07 14:46:06 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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AMDGPUInstructions.td
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[AMDGPU] add fcopysign(f64, f32) pattern
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2016-10-20 16:17:54 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPU: Remove read_workdim intrinsic
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2016-07-25 20:17:02 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Handle CopyToReg in getOperandRegClass
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2016-11-01 23:22:17 +00:00 |
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AMDGPUISelLowering.cpp
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[AMDGPU] Check if type transforms to i16 (VI+) when getting AMDGPUISD::FFBH_U32
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2016-11-01 17:49:33 +00:00 |
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AMDGPUISelLowering.h
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[AMDGPU] Check if type transforms to i16 (VI+) when getting AMDGPUISD::FFBH_U32
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2016-11-01 17:49:33 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Make AMDGPUMachineFunction fields private
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2016-07-26 16:45:58 +00:00 |
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AMDGPUMachineFunction.h
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AMDGPU: Make AMDGPUMachineFunction fields private
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2016-07-26 16:45:58 +00:00 |
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AMDGPUMCInstLower.cpp
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[AMDGPU] Emit 32-bit lo/hi got and pc relative variant kinds for external and global address space variables
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2016-10-14 04:37:34 +00:00 |
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AMDGPUMCInstLower.h
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUPromoteAlloca.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPURuntimeMetadata.h
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AMDGPU: Add hidden kernel arguments to runtime metadata
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2016-09-07 17:44:00 +00:00 |
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AMDGPUSubtarget.cpp
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AMDGPU: Use 1/2pi inline imm on VI
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2016-10-29 04:05:06 +00:00 |
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AMDGPUSubtarget.h
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[AMDGPU] Check if type transforms to i16 (VI+) when getting AMDGPUISD::FFBH_U32
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2016-11-01 17:49:33 +00:00 |
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AMDGPUTargetMachine.cpp
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Move the global variables representing each Target behind accessor function
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2016-10-09 23:00:34 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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AMDGPUTargetObjectFile.cpp
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Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
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2016-10-24 19:23:39 +00:00 |
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AMDGPUTargetObjectFile.h
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Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
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2016-10-24 19:23:39 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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Add new target hooks for LoadStoreVectorizer
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2016-10-03 10:31:34 +00:00 |
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AMDGPUTargetTransformInfo.h
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Do a sweep over move ctors and remove those that are identical to the default.
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2016-10-20 12:20:28 +00:00 |
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AMDILCFGStructurizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDKernelCodeT.h
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BUFInstructions.td
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AMDGPU: Whitespace fixes
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2016-11-01 00:55:14 +00:00 |
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CaymanInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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CIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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CMakeLists.txt
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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DSInstructions.td
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AMDGPU: Whitespace fixes
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2016-11-01 00:55:14 +00:00 |
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EvergreenInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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FLATInstructions.td
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AMDGPU: Rename glc operand type
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2016-10-28 21:55:08 +00:00 |
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GCNHazardRecognizer.cpp
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AMDGPU/SI: Handle hazard with s_rfe_b64
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2016-10-27 23:50:21 +00:00 |
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GCNHazardRecognizer.h
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AMDGPU/SI: Handle hazard with s_rfe_b64
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2016-10-27 23:50:21 +00:00 |
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GCNSchedStrategy.cpp
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AMDGPU: Whitespace fixes
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2016-11-01 00:55:14 +00:00 |
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GCNSchedStrategy.h
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AMDGPU/SI: Implement a custom MachineSchedStrategy
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2016-08-29 19:42:52 +00:00 |
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LLVMBuild.txt
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MIMGInstructions.td
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AMDGPU: Rename glc operand type
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2016-10-28 21:55:08 +00:00 |
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Processors.td
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AMDGPU: Refactor processor definition to use ISA version features
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2016-10-26 16:37:56 +00:00 |
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R600ClauseMergePass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600ControlFlowFinalizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600ExpandSpecialInstrs.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600FrameLowering.cpp
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R600FrameLowering.h
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R600InstrFormats.td
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AMDGPU/R600: Convert buffer id to VTX_READ input
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2016-08-15 21:38:30 +00:00 |
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R600InstrInfo.cpp
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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R600InstrInfo.h
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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R600Instructions.td
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Target: Remove unused patterns and transforms. NFC.
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2016-10-07 00:30:49 +00:00 |
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R600Intrinsics.td
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R600ISelLowering.cpp
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AMDGPU: Refactor kernel argument lowering
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2016-09-16 21:53:00 +00:00 |
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600MachineFunctionInfo.h
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600Packetizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIDebuggerInsertNops.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIDefines.h
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AMDGPU: Workaround for instruction size with literals
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2016-11-01 20:42:24 +00:00 |
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SIFixControlFlowLiveIntervals.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIFixSGPRCopies.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIFoldOperands.cpp
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AMDGPU: Don't fold undef uses or copies with implicit uses
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2016-10-06 18:12:13 +00:00 |
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SIFrameLowering.cpp
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AMDGPU: Fix using incorrect private resource with no allocation
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2016-10-28 19:43:31 +00:00 |
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SIFrameLowering.h
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AMDGPU: Refactor frame lowering
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2016-08-31 21:52:21 +00:00 |
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SIInsertSkips.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIInsertWaits.cpp
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AMDGPU/SI: Don't use non-0 waitcnt values when waiting on Flat instructions
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2016-10-28 23:53:48 +00:00 |
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SIInstrFormats.td
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AMDGPU: Workaround for instruction size with literals
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2016-11-01 20:42:24 +00:00 |
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SIInstrInfo.cpp
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AMDGPU: Default to using scalar mov to materialize immediate
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2016-11-01 22:55:07 +00:00 |
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SIInstrInfo.h
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AMDGPU: Workaround for instruction size with literals
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2016-11-01 20:42:24 +00:00 |
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SIInstrInfo.td
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AMDGPU: Default to using scalar mov to materialize immediate
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2016-11-01 22:55:07 +00:00 |
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SIInstructions.td
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AMDGPU: Default to using scalar mov to materialize immediate
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2016-11-01 22:55:07 +00:00 |
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SIIntrinsics.td
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AMDGPU: Allow some control flow intrinsics to be CSEd
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2016-09-16 22:11:18 +00:00 |
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SIISelLowering.cpp
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AMDGPU/SI: Don't emit multi-dword flat memory ops when they might access scratch
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2016-10-26 14:38:47 +00:00 |
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SIISelLowering.h
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[AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)
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2016-10-20 18:12:38 +00:00 |
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SILoadStoreOptimizer.cpp
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AMDGPU: Fix SILoadStoreOptimizer when writes cannot be merged due register dependencies
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2016-10-27 08:15:07 +00:00 |
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SILowerControlFlow.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SILowerI1Copies.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU/SI: Add support for triples with the mesa3d operating system
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2016-09-16 21:34:26 +00:00 |
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SIMachineFunctionInfo.h
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
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SIMachineScheduler.cpp
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AMDGPU/SI: Use a better method for determining the largest pressure sets
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2016-08-26 21:16:37 +00:00 |
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SIMachineScheduler.h
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SIOptimizeExecMasking.cpp
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AMDGPU: Fix use-after-free in SIOptimizeExecMasking
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2016-10-07 08:40:14 +00:00 |
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SIRegisterInfo.cpp
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AMDGPU: Stop creating unused virtual registers
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2016-11-01 21:58:07 +00:00 |
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SIRegisterInfo.h
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Reapply "AMDGPU: Don't use offen if it is 0"
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2016-10-26 15:08:16 +00:00 |
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SIRegisterInfo.td
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AMDGPU: Whitespace fixes
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2016-11-01 00:55:14 +00:00 |
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SISchedule.td
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AMDGPU/SI: Implement a custom MachineSchedStrategy
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2016-08-29 19:42:52 +00:00 |
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SIShrinkInstructions.cpp
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AMDGPU: Use brev for materializing SGPR constants
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2016-11-01 23:14:20 +00:00 |
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SITypeRewriter.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIWholeQuadMode.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SMInstructions.td
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[AMDGPU][MC][gfx8] Support 20-bit immediate offset in SMEM instructions.
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2016-10-31 16:07:39 +00:00 |
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SOPInstructions.td
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AMDGPU: Workaround for instruction size with literals
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2016-11-01 20:42:24 +00:00 |
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VIInstrFormats.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VOP1Instructions.td
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AMDGPU: Fix Two Address problems with v_movreld
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2016-10-24 14:56:02 +00:00 |
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VOP2Instructions.td
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[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
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2016-10-07 14:46:06 +00:00 |
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VOP3Instructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VOPCInstructions.td
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AMDGPU: Use unsigned compare for eq/ne
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2016-09-30 01:50:20 +00:00 |
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VOPInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
