1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
llvm-mirror/test/CodeGen/Hexagon/pred-absolute-store.ll
Jonas Paulsson 1ba71f37a4 [Hexagon] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.

Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.

Review: Krzysztof Parzyszek
llvm-svn: 325697
2018-02-21 16:37:45 +00:00

19 lines
434 B
LLVM

; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that we are able to predicate instructions with absolute
; addressing mode.
; CHECK: if ({{!?}}p{{[0-3]}}.new) memw(##gvar) = r{{[0-9]+}}
@gvar = external global i32
define i32 @test2(i32 %a, i32 %b) nounwind {
entry:
%cmp = icmp eq i32 %a, %b
br i1 %cmp, label %if.then, label %if.end
if.then:
store i32 %a, i32* @gvar, align 4
br label %if.end
if.end:
ret i32 %b
}