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llvm-mirror/test/CodeGen/RISCV/fixups-relax-diff.ll
Saleem Abdulrasool bb616e9e7a test: clean up some of the RISCV tests (NFC)
This addresses some post-commit comments from jrtc27 to make the tests
easier to process.
2021-06-17 09:51:09 -07:00

17 lines
660 B
LLVM

; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o - | llvm-readobj -r - | FileCheck %s
; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=-relax %s -o - | llvm-readobj -r - | FileCheck %s
; This test checks that a diff inserted via inline assembly always causes
; relocations. This isn't an assembly test as the assembler takes a different
; path through LLVM, which is already covered by the fixups-expr.s test.
define i32 @main() nounwind {
entry:
%retval = alloca i32, align 4
store i32 0, i32* %retval, align 4
; CHECK: R_RISCV_ADD64 b
; CHECK-NEXT: R_RISCV_SUB64 a
call void asm sideeffect "a:\0Ab:\0A.dword b-a", ""()
ret i32 0
}