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Commit Graph

109033 Commits

Author SHA1 Message Date
David Blaikie
47d8204a49 Fix stuff... again.
llvm-svn: 219693
2014-10-14 17:11:59 +00:00
Hal Finkel
9e140a3f0a [LVI] Check for @llvm.assume dominating the edge branch
When LazyValueInfo uses @llvm.assume intrinsics to provide edge-value
constraints, we should check for intrinsics that dominate the edge's branch,
not just any potential context instructions. An assumption that dominates the
edge's branch represents a truth on that edge. This is specifically useful, for
example, if multiple predecessors assume a pointer to be nonnull, allowing us
to simplify a later null comparison.

The test case, and an initial patch, were provided by Philip Reames. Thanks!

llvm-svn: 219688
2014-10-14 16:04:49 +00:00
NAKAMURA Takumi
6727c3f0f4 Revert r219638, (r219640 and r219676), "Removing the static destructor from ManagedStatic.cpp by controlling the allocation and de-allocation of the mutex."
It caused hang-up on msc17 builder, probably deadlock.

llvm-svn: 219687
2014-10-14 15:58:16 +00:00
Robert Khasanov
1896253278 [AVX512] Extended avx512_binop_rm to DQ/VL subsets.
Added encoding tests.

llvm-svn: 219686
2014-10-14 15:13:56 +00:00
Robert Khasanov
518a523445 [AVX512] Extended avx512_binop_rm to BW/VL subsets.
Added encoding tests.

llvm-svn: 219685
2014-10-14 14:36:19 +00:00
Bradley Smith
bb04f108aa [AArch64] Fix crash with empty/pseudo-only blocks in A53 erratum (835769) workaround
llvm-svn: 219684
2014-10-14 14:02:41 +00:00
Alexander Potapenko
ad195b7bc4 [llvm-symbolizer] Minor typedef cleanup. NFC.
llvm-svn: 219682
2014-10-14 13:40:44 +00:00
NAKAMURA Takumi
547f5d3262 Threading.h: Use \tparam for template parameters. [-Wdocumentation]
llvm-svn: 219676
2014-10-14 09:34:16 +00:00
Eric Christopher
de9f191394 Grab the subtarget info off of the MachineFunction rather than
indirecting through the TargetMachine.

llvm-svn: 219674
2014-10-14 08:44:19 +00:00
Eric Christopher
c65e60f7c8 Use the triple to figure out if this is a darwin target, not
the subtarget.

llvm-svn: 219673
2014-10-14 08:25:26 +00:00
Eric Christopher
45581b7332 Remove unnecessary TargetMachine.h includes.
llvm-svn: 219672
2014-10-14 07:22:08 +00:00
Eric Christopher
e4d58538b3 Grab the subtarget and subtarget dependent variables off of
MachineFunction rather than TargetMachine.

llvm-svn: 219671
2014-10-14 07:22:00 +00:00
Eric Christopher
db23ede8d2 Grab the subtarget and subtarget dependent variables off of
MachineFunction rather than TargetMachine.

llvm-svn: 219670
2014-10-14 07:17:23 +00:00
Eric Christopher
feee977cf4 Instead of the TargetMachine cache the MachineFunction
and TargetRegisterInfo in the peephole optimizer. This
makes it easier to grab subtarget dependent variables off
of the MachineFunction rather than the TargetMachine.

llvm-svn: 219669
2014-10-14 07:17:20 +00:00
Eric Christopher
f0b9de507b Access subtarget specific variables off of the MachineFunction's
cached subtarget and not the TargetMachine.

llvm-svn: 219668
2014-10-14 07:00:33 +00:00
Eric Christopher
1b13c50f59 Add lld to the parallel set of directories since it doesn't depend
on any of the other tools directories.

llvm-svn: 219667
2014-10-14 06:56:28 +00:00
Eric Christopher
82bb988565 Access the subtarget off of the MachineFunction via the DAG
scheduler or via the SelectionDAG if available. Otherwise
grab the subtarget off of the MachineFunction by going up
the parent chain.

llvm-svn: 219666
2014-10-14 06:56:25 +00:00
Hao Liu
6c7f917b92 [AArch64]Select wide immediate offset into [Base+XReg] addressing mode
e.g Currently we'll generate following instructions if the immediate is too wide:
    MOV  X0, WideImmediate
    ADD  X1, BaseReg, X0
    LDR  X2, [X1, 0]

    Using [Base+XReg] addressing mode can save one ADD as following:
    MOV  X0, WideImmediate
    LDR  X2, [BaseReg, X0]

    Differential Revision: http://reviews.llvm.org/D5477

llvm-svn: 219665
2014-10-14 06:50:36 +00:00
Eric Christopher
d5f6f42397 Remove the use and member variable of the TargetMachine from
MachineLICM as we can get the same data off of the MachineFunction.

llvm-svn: 219663
2014-10-14 06:26:57 +00:00
Eric Christopher
6f2145e3fc Have MachineInstrBundle use the MachineFunction for subtarget
access rather than the TargetMachine.

llvm-svn: 219662
2014-10-14 06:26:55 +00:00
Eric Christopher
6f44ab137d Access the subtarget off of the MachineFunction rather than
through the TargetMachine.

llvm-svn: 219661
2014-10-14 06:26:53 +00:00
Marcello Maggioni
ba92818a1d Switch to select optimization for two-case switches
This is the same optimization of r219233 with modifications to support PHIs with multiple incoming edges from the same block
and a test to check that this condition is handled.

llvm-svn: 219656
2014-10-14 01:58:26 +00:00
Eric Christopher
172a1c58e7 Don't include DFAPacketizer in TargetInstrInfo, there's no reason.
llvm-svn: 219653
2014-10-14 01:13:53 +00:00
Eric Christopher
cd8518b9e9 Include map into the A15SDOptimizer rather than pick it up
transitively from the DFAPacketizer via TargetInstrInfo.h.

llvm-svn: 219652
2014-10-14 01:13:51 +00:00
Eric Christopher
15c10d51e5 Remove the TargetMachine from DFAPacketizer since it was only
being used to grab subtarget specific things that we can grab
from the MachineFunction anyhow.

llvm-svn: 219650
2014-10-14 01:03:16 +00:00
Peter Collingbourne
446da99897 Introduce Go coding standards for LLVM.
Rather than define our own standards, we adopt a set of best practices that
are already in use by the Go community.

Differential Revision: http://reviews.llvm.org/D5761

llvm-svn: 219646
2014-10-14 00:40:53 +00:00
Sanjay Patel
78f4588f8d fix formatting; NFC
llvm-svn: 219645
2014-10-14 00:33:23 +00:00
Chandler Carruth
54f9a120a3 Add some optional passes around the vectorizer to both better prepare
the IR going into it and to clean up the IR produced by the vectorizers.

Note that these are *off by default* right now while folks collect data
on whether the performance tradeoff is reasonable.

In a build of the 'opt' binary, I see about 2% compile time regression
due to this change on average. This is in my mind essentially the worst
expected case: very little of the opt binary is going to *benefit* from
these extra passes.

I've seen several benchmarks improve in performance my small amounts due
to running these passes, and there are certain (rare) cases where these
passes make a huge difference by either enabling the vectorizer at all
or by hoisting runtime checks out of the outer loop. My primary
motivation is to prevent people from seeing runtime check overhead in
benchmarks where the existing passes and optimizers would be able to
eliminate that.

I've chosen the sequence of passes based on the kinds of things that
seem likely to be relevant for the code at each stage: rotaing loops for
the vectorizer, finding correlated values, loop invariants, and
unswitching opportunities from any runtime checks, and cleaning up
commonalities exposed by the SLP vectorizer.

I'll be pinging existing threads where some of these issues have come up
and will start new threads to get folks to benchmark and collect data on
whether this is the right tradeoff or we should do something else.

llvm-svn: 219644
2014-10-14 00:31:29 +00:00
Peter Collingbourne
1048907fe6 Introduce LLVMWriteBitcodeToMemoryBuffer C API function.
llvm-svn: 219643
2014-10-14 00:30:59 +00:00
Chris Bieneman
2c23d39a87 Updating documentation as per Chandler's feedback.
This goes with the earlier commit to remove the static destructor from ManagedStatic.cpp by controlling the allocation and de-allocation of the mutex.

Summary: This is part of the ongoing work to remove static constructors and destructors.

Reviewers: chandlerc, rnk

Reviewed By: rnk

Subscribers: rnk, llvm-commits

Differential Revision: http://reviews.llvm.org/D5473

llvm-svn: 219640
2014-10-13 23:03:45 +00:00
David Majnemer
4db8c93862 InstCombine: Fix miscompile in X % -Y -> X % Y transform
We assumed that negation operations of the form (0 - %Z) resulted in a
negative number.  This isn't true if %Z was originally negative.
Substituting the negative number into the remainder operation may result
in undefined behavior because the dividend might be INT_MIN.

This fixes PR21256.

llvm-svn: 219639
2014-10-13 22:37:51 +00:00
Chris Bieneman
2f2f9c1cde Removing the static destructor from ManagedStatic.cpp by controlling the allocation and de-allocation of the mutex.
This patch adds a new llvm_call_once function which is used by the ManagedStatic implementation to safely initialize a global to avoid static construction and destruction.

llvm-svn: 219638
2014-10-13 22:37:25 +00:00
Eric Christopher
1c880c715a Migrate another set of getSubtargetImpl away.
llvm-svn: 219636
2014-10-13 21:57:44 +00:00
Peter Collingbourne
55b59727ae Remove unused debug info constants.
These became unused in r219010.

Differential Revision: http://reviews.llvm.org/D5760

llvm-svn: 219635
2014-10-13 21:50:30 +00:00
David Majnemer
0e491f60c5 InstCombine: Don't miscompile (x lshr C1) udiv C2
We have a transform that changes:
  (x lshr C1) udiv C2
into:
  x udiv (C2 << C1)

However, it is unsafe to do so if C2 << C1 discards any of C2's bits.

This fixes PR21255.

llvm-svn: 219634
2014-10-13 21:48:30 +00:00
Reed Kotler
c9b7242391 Make first of several changes to bring up to AArch64 fast-isel style
Summary:
Make Mips fast-isel track the form of AArch64 where practical.
This makes it easier for people to review the code, to borrow similar code, and to see how to eventually move a lot of this
 target code for fast-isels into target independent code.

These are just cosmetic changes. Should be no functional difference.

Test Plan:
make check
test-suite for 4 flavors mips32 r1/r2 , -O0/-O2

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: aemerson, llvm-commits, rfuhler

Differential Revision: http://reviews.llvm.org/D5595

llvm-svn: 219633
2014-10-13 21:46:41 +00:00
Paul Robinson
e1f50ad271 Update the example of using a command-line option custom parser to
match the current implementation.

Patch by Douglas Yung!

llvm-svn: 219631
2014-10-13 21:11:22 +00:00
Adrian Prantl
f90178790d Add an assertion about the integrity of the iterator.
Broken parent scope pointers in inlined DIVariables can cause
ensureAbstractVariableIsCreated to insert new abstract scopes, thus
invalidating the iterator in this loop and leading to hard-to-debug
crashes. Useful when manually reducing IR for testcases.

llvm-svn: 219628
2014-10-13 20:44:58 +00:00
Adrian Prantl
cf6b88a8d4 constify the getters in SDNodeDbgValue.
llvm-svn: 219627
2014-10-13 20:43:47 +00:00
Chad Rosier
b3aab2d6f3 Refactor debug statement and remove dead argument. NFC.
llvm-svn: 219626
2014-10-13 19:46:39 +00:00
Timur Iskhodzhanov
84b30a30f3 Add VS2012-generated test inputs for test/tools/llvm-readobj/codeview-linetables.test
llvm-svn: 219621
2014-10-13 17:03:13 +00:00
Filipe Cabecinhas
2e4a5e341a Fix a broadcast related regression on the vector shuffle lowering.
Summary: Test by Robert Lougher!

Reviewers: chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5745

llvm-svn: 219617
2014-10-13 16:16:16 +00:00
Matt Arsenault
df1a3c9ec9 R600/SI: Minor cleanup of function
llvm-svn: 219616
2014-10-13 15:47:59 +00:00
Yuri Gorshenin
a2d8cc5558 [asan-asm-instrumentation] Follow-up fixes to r219602: asserts are moved into
function.

llvm-svn: 219610
2014-10-13 11:44:06 +00:00
Renato Golin
c17a0bcd0e Adds support for the Cortex-A17 to the ARM backend
Patch by Matthew Wahab.

llvm-svn: 219606
2014-10-13 10:22:19 +00:00
Daniel Sanders
6cb76e47ff [mips] Mark redundant instructions with a comment in test/CodeGen/Mips/Fast-ISel/icmpa.ll.
llvm-svn: 219605
2014-10-13 10:18:02 +00:00
Bradley Smith
aa602e5e4d [AArch64] Add workaround for Cortex-A53 erratum (835769)
Some early revisions of the Cortex-A53 have an erratum (835769) whereby it is
possible for a 64-bit multiply-accumulate instruction in AArch64 state to
generate an incorrect result.  The details are quite complex and hard to
determine statically, since branches in the code may exist in some
 circumstances, but all cases end with a memory (load, store, or prefetch)
instruction followed immediately by the multiply-accumulate operation.

The safest work-around for this issue is to make the compiler avoid emitting
multiply-accumulate instructions immediately after memory instructions and the
simplest way to do this is to insert a NOP.

This patch implements such work-around in the backend, enabled via the option
-aarch64-fix-cortex-a53-835769.

The work-around code generation is not enabled by default.

llvm-svn: 219603
2014-10-13 10:12:35 +00:00
Yuri Gorshenin
85aae05168 [asan-asm-instrumentation] Fixed memory references which includes %rsp as a base or an index register.
Summary: [asan-asm-instrumentation] Fixed memory references which includes %rsp as a base or an index register.

Reviewers: eugenis

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5599

llvm-svn: 219602
2014-10-13 09:37:47 +00:00
NAKAMURA Takumi
bdabb1a1e6 Unix/Signals.inc: Let findModulesAndOffsets() built conditionally regarding to (defined(HAVE_BACKTRACE) && defined(ENABLE_BACKTRACES)). [-Wunused-function]
llvm-svn: 219596
2014-10-13 04:32:43 +00:00
NAKAMURA Takumi
82b729d656 Revert r219584, "[X86] Memory folding for commutative instructions."
It broke i686 selfhosting.

llvm-svn: 219595
2014-10-13 04:17:34 +00:00