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Commit Graph

207079 Commits

Author SHA1 Message Date
Arthur Eubanks
030e65d1fe [test] Fix split-vfunc.ll under NPM
We need an AA pipeline under NPM.
This is a no-op if we are still using the legacy PM.
2020-11-19 14:59:05 -08:00
Florian Hahn
8ced7f6571 [ConstraintElimination] Decompose GEP with arbitrary offsets.
This patch decomposes `GEP %x, %offset` as  0 + 1 * %x + 1 * %off.
2020-11-19 22:49:21 +00:00
Arthur Eubanks
bc714b0c12 [test] Fix globalaa-retained.ll under NPM
Just '-O2' didn't run the full AA pipeline under NPM.
2020-11-19 14:24:46 -08:00
Arthur Eubanks
a88609dcad [test] Fix pr39282.ll under NPM
Already has a NPM RUN line
2020-11-19 14:19:48 -08:00
Geoffrey Martin-Noble
f1deff2292 Remove unused private fields
Unused since https://reviews.llvm.org/D91762 and triggering
-Wunused-private-field

```
llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp:365:13: error: private field 'GetArgTLS' is not used [-Werror,-Wunused-private-field]
  Constant *GetArgTLS;
            ^
llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp:366:13: error: private field 'GetRetvalTLS' is not used [-Werror,-Wunused-private-field]
  Constant *GetRetvalTLS;
```

Reviewed By: stephan.yichao.zhao

Differential Revision: https://reviews.llvm.org/D91820
2020-11-19 13:54:54 -08:00
Roman Lebedev
4f26d69f1c [InstCombine] Fold and(shl(zext(x), width(SIGNMASK) - width(%x)), SIGNMASK) to and(sext(%x), SIGNMASK)
One less instruction and reducing use count of zext.
As alive2 confirms, we're fine with all the weird combinations of
undef elts in constants, but unless the shift amount was undef
for a lane, we must sanitize undef mask to zero, since sign bits
are no longer zeros.

https://rise4fun.com/Alive/d7r
```
----------------------------------------
Optimization: zz
Precondition: ((C1 == (width(%r) - width(%x))) && isSignBit(C2))
  %o0 = zext %x
  %o1 = shl %o0, C1
  %r = and %o1, C2
=>
  %n0 = sext %x
  %r = and %n0, C2

Done: 2016
Optimization is correct!
```
2020-11-20 00:31:27 +03:00
Roman Lebedev
01b8ffbe23 [NFC][InstCombine] Add test coverage for and (sext %x), SIGNMASK-like pattern 2020-11-20 00:31:26 +03:00
Nikita Popov
4f0554345f [MemLoc] Use hasValue() method more (NFC)
Followup to 7de7c40898a8f815d661781c92757f93fa4c6e5b. I previously
removed a number of == comparisons to LocationSize::unknown(), but
missed these != comparisons.
2020-11-19 22:29:44 +01:00
Jianzhou Zhao
53233de33f Remove deadcode from DFSanFunction::get*TLS*()
clean more deadcode after D84704

Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D91762
2020-11-19 21:10:37 +00:00
Nikita Popov
63d8e35b93 [MemLoc] Use hasValue() method (NFC)
Instead of comparing to LocationSize::unknown(), prefer calling
the hasValue() method instead, which is less reliant on
implementation details.
2020-11-19 21:53:50 +01:00
Nikita Popov
3a433f6057 [MemLoc] Specify LocationSize in unit test
Followup to 393b9e9db31a3f83bc8b813ee24b56bc8ed93a49,
where I missed updating one MemoryLocation use inside a unit test.
2020-11-19 21:50:44 +01:00
Nikita Popov
53b556c27d [MemLoc] Require LocationSize argument (NFC)
When constructing a MemoryLocation by hand, require that a
LocationSize is explicitly specified. D91649 will split up
LocationSize::unknown() into two different states, and callers
should make an explicit choice regarding the kind of MemoryLocation
they want to have.
2020-11-19 21:45:52 +01:00
Artur Pilipenko
d3849bdc93 [BasicAA] Deoptimize intrinsics don't modify memory
Similarly to assumes and guards deoptimize intrinsics are
marked as writing to ensure proper control dependencies
but they never modify any particular memory location.

Differential Revision: https://reviews.llvm.org/D91658
2020-11-19 12:08:33 -08:00
Nikita Popov
56288c7baf [Lint] Use MemoryLocation
Instead of separately passing pointer and size, make use of
MemoryLocation. This allows us to also reuse all the existing
logic for determining the MemoryLocation correponding to an
instruction or call argument.

Not quite NFC because used locations may be more precise in some
cases.
2020-11-19 20:55:25 +01:00
Nico Weber
344a0904d8 [gn build] (manually) merge 1fb91fcf9cfe849 2020-11-19 14:24:35 -05:00
Arthur Eubanks
9dd02d7898 [NPM] Move more O0 pass building into PassBuilder
This moves handling of alwaysinline, coroutines, matrix lowering, PGO,
and LTO-required passes into PassBuilder. Much of this is replicated
between Clang and opt. Other out-of-tree users also replicate some of
this, such as Rust [1] replicating the alwaysinline, LTO, and PGO
passes.

The LTO passes are also now run in
build(Thin)LTOPreLinkDefaultPipeline() since they are semantically
required for (Thin)LTO.

[1]: f5230fbf76/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp (L896)

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D91585
2020-11-19 11:22:23 -08:00
Jorge Gorbe Moya
ac434d7750 Fix crash after looking up dwo_id=0 in CU index.
In the current state, if getFromHash(0) is called and there's no CU with
dwo_id=0, the lookup will stop at an empty slot, then the check
`Rows[H].getSignature() != S` won't cause the lookup to fail and return
a nullptr (as it should), because the empty slot has a 0 in the
signature field, and a pointer to the empty slot will be incorrectly
returned.

This patch fixes this by using the index field in the hash entry to
check for empty slots: signature = 0 can match a valid hash but
according to the spec the index for an occupied slot will always be
non-zero.

Differential Revision: https://reviews.llvm.org/D91670
2020-11-19 11:15:01 -08:00
Fraser Cormack
9b94da0a79 [RISCV] Add test cases for missed grevi/greviw opportunities. NFC 2020-11-19 18:43:39 +00:00
Leonard Chan
c24d9d2b01 [llvm][IR] Add dso_local_equivalent Constant
The `dso_local_equivalent` constant is a wrapper for functions that represents a
value which is functionally equivalent to the global passed to this. That is, if
this accepts a function, calling this constant should have the same effects as
calling the function directly. This could be a direct reference to the function,
the `@plt` modifier on X86/AArch64, a thunk, or anything that's equivalent to the
resolved function as a call target.

When lowered, the returned address must have a constant offset at link time from
some other symbol defined within the same binary. The address of this value is
also insignificant. The name is leveraged from `dso_local` where use of a function
or variable is resolved to a symbol in the same linkage unit.

In this patch:
- Addition of `dso_local_equivalent` and handling it
- Update Constant::needsRelocation() to strip constant inbound GEPs and take
  advantage of `dso_local_equivalent` for relative references

This is useful for the [Relative VTables C++ ABI](https://reviews.llvm.org/D72959)
which makes vtables readonly. This works by replacing the dynamic relocations for
function pointers in them with static relocations that represent the offset between
the vtable and virtual functions. If a function is externally defined,
`dso_local_equivalent` can be used as a generic wrapper for the function to still
allow for this static offset calculation to be done.

See [RFC](http://lists.llvm.org/pipermail/llvm-dev/2020-August/144469.html) for more details.

Differential Revision: https://reviews.llvm.org/D77248
2020-11-19 10:26:17 -08:00
Fraser Cormack
82b4130087 [RISCV] Lower GREVI and GORCI as custom nodes
This moves the recognition of GREVI and GORCI from TableGen patterns
into a DAGCombine. This is done primarily to match "deeper" patterns in
the future, like (grevi (grevi x, 1) 2) -> (grevi x, 3).

TableGen is not best suited to matching patterns such as these as the compile
time of the DAG matchers quickly gets out of hand due to the expansion of
commutative permutations.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D91259
2020-11-19 18:11:42 +00:00
Adhemerval Zanella
3f1ee6c0a7 [AArch64] Lower fptrunc/fpext from/to FP128t to/from FP16
The compiler-rt part which adds the emitted symbols is handled in
a subsequent patch.

Differential Revision: https://reviews.llvm.org/D91731
2020-11-19 15:14:50 -03:00
Sander de Smalen
8270667b76 [LoopVectorize] NFC: Fix unused variable warning for MaxSafeDepDist
rGf571fe6df585127d8b045f8e8f5b4e59da9bbb73 led to a warning of an unused
variable for MaxSafeDepDist (written but not used). It seems this
variable and assignment can be safely removed.
2020-11-19 17:41:35 +00:00
Sam Tebbs
e397da3290 [ARM][LowOverheadLoops] Convert intermediate vpr use assertion to condition
This converts the intermediate VPR use assertion to a condition in the if-statement to protect against assertion failures in case behaviuour is changed.

This is a follow-up to https://reviews.llvm.org/D90935 and implements the post-approval comments.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D91790
2020-11-19 17:15:45 +00:00
Joseph Huber
c0b5fdf2f0 [OpenMP] Add Location Fields to Libomptarget Runtime for Debugging
Summary:
Add support for passing source locations to libomptarget runtime functions using the ident_t struct present in the rest of the libomp API. This will allow the runtime system to give much more insightful error messages and debugging values.

Reviewers: jdoerfert grokos

Differential Revision: https://reviews.llvm.org/D87946
2020-11-19 12:01:53 -05:00
Roman Lebedev
1a9500be6d [NFC][PhaseOrdering] Add a test showing the need to run IndVars after LoopIdiom 2020-11-19 19:43:33 +03:00
Mircea Trofin
e1027a640d [FileCheck] Disallow unused prefixes in llvm/test/Analysis
This is achieved through a substitution of FileCheck in lit.cfg.py,
where we explicitly set -allow-unused-prefixes to false.

We also introduce a %FileCheckWithUnusedPrefixes% substitution that can
be used in those cases where we want to allow unused prefixes, even if
the folder policy is to disallow them.

Differential Revision: https://reviews.llvm.org/D91275
2020-11-19 07:56:35 -08:00
diggerlin
b63aeb246f [AIX][XCOFF][Patch2] decode vector information and extent long table of the traceback table of the xcoff.
SUMMARY:

1. decode the Vector extension if has_vec is set
2. decode long table fields, if longtbtable is set.

There is conflict on the bit order of HasVectorInfoMask and HasExtensionTableMask between AIX os header and IBM aix compiler XLC.
In the /usr/include/sys/debug.h defines
static constexpr uint32_t HasVectorInfoMask = 0x0040'0000;
static constexpr uint32_t HasExtensionTableMask = 0x0080'0000;
but the XLC defines as

static constexpr uint32_t HasVectorInfoMask = 0x0080'0000;
static constexpr uint32_t HasExtensionTableMask = 0x0040'0000;
we follows the definition of the IBM AIX compiler XLC here.

Reviewer: Jason Liu

Differential Revision: https://reviews.llvm.org/D86461
2020-11-19 10:23:43 -05:00
David Green
954eb80175 [ARM] Add a WLS tail predication test. NFC 2020-11-19 14:52:46 +00:00
Sven van Haastregt
a30a7b4581 Fix Wundef warnings for Support/Compiler.h
Support/Compiler.h is included by c files (e.g. regcomp.c) where
__cplusplus is not defined at all.  Avoid evaluating the undefined
macro for such files.
2020-11-19 14:10:55 +00:00
Florian Hahn
78dba29355 [ConstraintElimination] Add GEP test case with variable offset. 2020-11-19 14:06:50 +00:00
Simon Pilgrim
56198bfdfa [RISCV] Extend 32-bit test coverage of neg-abs tests for D91120 2020-11-19 13:59:18 +00:00
Simon Pilgrim
877bcd2557 [ValueTracking] computeKnownBitsFromShiftOperator - move shift amount analysis to top of the function. NFCI.
These are all lightweight to compute and helps avoid issues with Known being used to hold both the shift amount and then the shifted result.

Minor cleanup for D90479.
2020-11-19 13:50:49 +00:00
David Green
a8dd5e49ed [ARM] Deliberately prevent inline asm in low overhead loops. NFC
This was already something that was handled by one of the "else"
branches in maybeLoweredToCall, so this patch is an NFC but makes it
explicit and adds a test. We may in the future want to support this
under certain situations but for the moment just don't try and create
low overhead loops with inline asm in them.

Differential Revision: https://reviews.llvm.org/D91257
2020-11-19 13:28:21 +00:00
Simon Pilgrim
1bd2f183ce [X86][AVX] Only share broadcasts of different widths from the same SDValue of the same SDNode (PR48215)
D57663 allowed us to reuse broadcasts of the same scalar value by extracting low subvectors from the widest type.

Unfortunately we weren't ensuring the broadcasts were from the same SDValue, just the same SDNode - which failed on multiple-value nodes like ISD::SDIVREM

FYI: I intend to request this be merged into the 11.x release branch.

Differential Revision: https://reviews.llvm.org/D91709
2020-11-19 12:15:18 +00:00
Simon Moll
fd4dd67127 [LV][NFC-ish] Allow vector widths over 256 elements
The assertion that vector widths are <= 256 elements was hard wired in the LV code. Eg, VE allows for vectors up to 512 elements. Test again the TTI vector register bit width instead - this is an NFC for non-asserting builds.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D91518
2020-11-19 10:58:29 +01:00
Florian Hahn
9328b6a7fd [SelDAGBuilder] Do not require simple VTs for constraints.
In some cases, the values passed to `asm sideeffect` calls cannot be
mapped directly to simple MVTs. Currently, we crash in the backend if
that happens. An example can be found in the @test_vector_too_large_r_m
test case, where we pass <9 x float> vectors. In practice, this can
happen in cases like the simple C example below.

using vec = float __attribute__((ext_vector_type(9)));
void f1 (vec m) {
  asm volatile("" : "+r,m"(m) : : "memory");
}

One case that use "+r,m" constraints for arbitrary data types in
practice is google-benchmark's DoNotOptimize.

This patch updates visitInlineAsm so that it use MVT::Other for
constraints with complex VTs. It looks like the rest of the backend
correctly deals with that and properly legalizes the type.

And we still report an error if there are no registers to satisfy the
constraint.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D91710
2020-11-19 09:31:54 +00:00
Max Kazantsev
b6c52319b7 [NFC] Remove comment (commited ahead of time by mistake) 2020-11-19 16:28:34 +07:00
Max Kazantsev
2e3d07d447 [NFC] Move code earlier as preparation for further changes 2020-11-19 16:27:23 +07:00
Simon Moll
8a479552ad [VE] VEC_BROADCAST, lowering and isel
This defines the vec_broadcast SDNode along with lowering and isel code.
We also remove unused type mappings for the vector register classes (all vector MVTs that are not used in the ISA go).

We will implement support for short vectors later by intercepting nodes with illegal vector EVTs before LLVM has had a chance to widen them.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D91646
2020-11-19 09:44:56 +01:00
Sam Clegg
1e4ea2938d [WebAssembly] Add support for named globals in the object format.
Differential Revision: https://reviews.llvm.org/D91769
2020-11-19 00:17:22 -08:00
Andrew Wei
d024603f9e [IndVarSimplify] Notify top most loop to drop cached exit counts
Some nested loops may share the same ExitingBB, so after we finishing FoldExit,
we need to notify OuterLoop and SCEV to drop any stored trip count.

Patched by: guopeilin
Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D91325
2020-11-19 15:37:54 +08:00
Mircea Trofin
818fa7a683 [NFC][TFUtils] also include output specs lookup logic in loadOutputSpecs
The lookup logic is also reusable.

Also refactored the API to return the loaded vector - this makes it more
clear what state it is in in the case of error (as it won't be
returned).

Differential Revision: https://reviews.llvm.org/D91759
2020-11-18 21:20:21 -08:00
Kazu Hirata
0fce5c3fd1 [Transforms] Use llvm::is_contained (NFC) 2020-11-18 20:42:22 -08:00
Mircea Trofin
504ced25f2 [NFC][TFUtils] Extract out the output spec loader
It's generic for the 'development mode', not specific to the inliner
case.

Differential Revision: https://reviews.llvm.org/D91751
2020-11-18 20:03:20 -08:00
Craig Topper
4038ba0242 [RISCV] Add MemOperand to the instruction created by storeRegToStackSlot/loadRegFromStackSlot
Differential Revision: https://reviews.llvm.org/D91730
2020-11-18 19:20:03 -08:00
Kai Luo
213dbf28b4 [X86][AArch64][RISCV] Pre-commit negated abs test case. NFC. 2020-11-19 02:31:45 +00:00
Duncan P. N. Exon Smith
c727b8693b Support: Avoid SmallVector::assign with a range from to-be-replaced vector in Windows GetExecutableName
This code wasn't valid, and 5abf76fbe37380874a88cc9aa02164800e4e10f3
started asserting. This is a speculative fix since I don't have a
Windows machine handy.
2020-11-18 17:55:49 -08:00
Duncan P. N. Exon Smith
b6b630c8ab ADT: Add assertions to SmallVector::insert, etc., for reference invalidation
2c196bbc6bd897b3dcc1d87a3baac28e1e88df41 asserted that
`SmallVector::push_back` doesn't invalidate the parameter when it needs
to grow. Do the same for `resize`, `append`, `assign`, `insert`, and
`emplace_back`.

Differential Revision: https://reviews.llvm.org/D91744
2020-11-18 17:36:28 -08:00
snek
a27ae8bd58 [WebAssembly] Support fp reg class in r constraint
Patch by snek

Reviewed By: aheejin

Differential Revision: https://reviews.llvm.org/D90978
2020-11-18 17:05:58 -08:00
Moritz Sichert
0fadcfd431 Added GDB pretty printer for StringMap
Reviewed By: csigg, dblaikie

Differential Revision: https://reviews.llvm.org/D91183
2020-11-18 16:33:34 -08:00