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Commit Graph

492 Commits

Author SHA1 Message Date
Reid Spencer
ba94a925b9 Initialize SDOperand values because the gcc 4.0.2 compiler complains about
them.

llvm-svn: 27534
2006-04-08 05:38:03 +00:00
Jim Laskey
b93bc75add Foundation for call frame information.
llvm-svn: 27491
2006-04-07 16:34:46 +00:00
Andrew Lenharth
892b890d6a This may be overconservative, but it lets the new cfe compile
llvm-svn: 27471
2006-04-06 23:18:45 +00:00
Andrew Lenharth
95d16ade31 fix some linking problems with the new gcc
llvm-svn: 27460
2006-04-06 21:26:32 +00:00
Andrew Lenharth
4760eaae91 support x * (c1 + c2) where c1 and c2 are pow2s. special case for c2 == 4
llvm-svn: 27370
2006-04-03 04:19:17 +00:00
Andrew Lenharth
af4a638eab mul by const conversion sequences. more coming soon
llvm-svn: 27368
2006-04-03 03:18:59 +00:00
Andrew Lenharth
4c950de4c1 This makes McCat/12-IOtest go 8x faster or so
llvm-svn: 27363
2006-04-02 21:08:39 +00:00
Andrew Lenharth
067eaad4d9 This will be needed soon
llvm-svn: 27362
2006-04-02 20:13:57 +00:00
Jim Laskey
eb38a3e83a Expose base register for DwarfWriter. Refactor code accordingly.
llvm-svn: 27225
2006-03-28 13:48:33 +00:00
Jim Laskey
8688957c53 Translate llvm target registers to dwarf register numbers properly.
llvm-svn: 27180
2006-03-27 20:18:45 +00:00
Chris Lattner
e199d55073 #include Intrinsics.h into all dag isels
llvm-svn: 27109
2006-03-25 06:47:10 +00:00
Jim Laskey
1716e53341 Add dwarf register numbering to register data.
llvm-svn: 27081
2006-03-24 21:15:58 +00:00
Jim Laskey
cec9c18c62 Add support to locate local variables in frames (early version.)
llvm-svn: 26994
2006-03-23 18:12:57 +00:00
Chris Lattner
89e0790edb Eliminate IntrinsicLowering from TargetMachine.
Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974
2006-03-23 05:43:16 +00:00
Nate Begeman
42736d46b2 Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.

llvm-svn: 26814
2006-03-17 01:40:33 +00:00
Andrew Lenharth
bbf38867f2 these are copies too
llvm-svn: 26653
2006-03-09 18:18:51 +00:00
Chris Lattner
e93eeb189f remove some now-dead code
llvm-svn: 26652
2006-03-09 18:07:49 +00:00
Andrew Lenharth
f124519fc8 fcopysign for mixed mode
llvm-svn: 26651
2006-03-09 17:56:33 +00:00
Andrew Lenharth
e08d165146 alpha and llvm have different oppinions on which arg is the sign bit
llvm-svn: 26647
2006-03-09 17:41:50 +00:00
Andrew Lenharth
25de2846c5 Alpha Scheduling classes
llvm-svn: 26643
2006-03-09 17:16:45 +00:00
Andrew Lenharth
c180d749a2 fcopysign and get rid of dsnode cruft. custom PA runtimes make this better in some senses
llvm-svn: 26641
2006-03-09 14:58:25 +00:00
Chris Lattner
125881e75b Add support for 'special' llvm globals like debug info and static ctors/dtors.
llvm-svn: 26628
2006-03-09 06:14:35 +00:00
Chris Lattner
6b0947c277 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should
implement copysign as a native op if they have it.

llvm-svn: 26541
2006-03-05 05:08:37 +00:00
Jim Laskey
98bb365444 Removed dependency on how operands are printed (want multi-line.)
llvm-svn: 26399
2006-02-27 10:29:04 +00:00
Andrew Lenharth
0a245834aa improved zap discovery
llvm-svn: 26148
2006-02-13 18:52:29 +00:00
Chris Lattner
599b432345 Switch targets over to using SelectionDAG::getCALLSEQ_START to create
CALLSEQ_START nodes.

llvm-svn: 26143
2006-02-13 09:00:43 +00:00
Evan Cheng
6bd0f9c4ba Match getTargetNode() changes (now return SDNode* instead of SDOperand).
llvm-svn: 26085
2006-02-09 07:17:49 +00:00
Evan Cheng
521e5a1bfe Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
2006-02-09 00:37:58 +00:00
Andrew Lenharth
10a2391def see what this allignment thing will do
llvm-svn: 26017
2006-02-06 17:15:17 +00:00
Evan Cheng
fb902782e8 Use SelectRoot() as entry of any tblgen based isel.
llvm-svn: 25997
2006-02-05 06:46:41 +00:00
Andrew Lenharth
b28db2290a linkage fix for weak functions
llvm-svn: 25976
2006-02-04 19:13:09 +00:00
Andrew Lenharth
c879542ab0 isStoreToStackSlot
llvm-svn: 25925
2006-02-03 03:07:37 +00:00
Chris Lattner
15cb732cd7 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Andrew Lenharth
9812806d03 Add immediate forms of cmov and remove some cruft
llvm-svn: 25882
2006-02-01 19:37:33 +00:00
Nate Begeman
0be60963bd Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
2006-02-01 07:19:44 +00:00
Evan Cheng
f115c17f23 Allow the specification of explicit alignments for constant pool entries.
llvm-svn: 25855
2006-01-31 22:23:14 +00:00
Chris Lattner
ca5c2d7a4c Update alpha to reflect recent constantfp legalize changes. It's not clear
why all this code isn't autogenerated. :(

llvm-svn: 25770
2006-01-29 06:25:22 +00:00
Chris Lattner
7a06abe72b cmovle != cmovlt
llvm-svn: 25761
2006-01-29 03:47:30 +00:00
Nate Begeman
87c2c0e66b Implement Promote for VAARG, and allow it to be custom promoted for people
who don't want the default behavior (Alpha).

llvm-svn: 25726
2006-01-28 03:14:31 +00:00
Chris Lattner
2d4f83eaaf Switch to AlphaISD::CALL instead of ISD::CALL
llvm-svn: 25718
2006-01-27 23:39:00 +00:00
Evan Cheng
77885c204d Subtarget feature can now set any variable to any value
llvm-svn: 25678
2006-01-27 08:09:42 +00:00
Chris Lattner
20d4194a0d PHI and INLINEASM are now built-in instructions provided by Target.td
llvm-svn: 25674
2006-01-27 01:46:15 +00:00
Andrew Lenharth
23afe2f288 minor renaming
llvm-svn: 25640
2006-01-26 03:24:15 +00:00
Andrew Lenharth
ad88ba7c98 allow R28 to be used for frame calculations without entirely removing it from circulation
llvm-svn: 25639
2006-01-26 03:22:07 +00:00
Andrew Lenharth
084c16fe59 oops
llvm-svn: 25623
2006-01-25 23:33:32 +00:00
Andrew Lenharth
01e5b9e862 forgot one
llvm-svn: 25620
2006-01-25 22:28:07 +00:00
Andrew Lenharth
d932b627f7 make things compile again
llvm-svn: 25614
2006-01-25 21:54:38 +00:00
Nate Begeman
c29fac7fce First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Andrew Lenharth
3b1babbf44 maintaining stackpointer alignment. Perhaps it doesn't matter
llvm-svn: 25592
2006-01-25 01:51:08 +00:00
Andrew Lenharth
757829acec bye bye Pattern ISEL
llvm-svn: 25553
2006-01-23 21:56:07 +00:00
Andrew Lenharth
f7d549848c added stores to lsmark
llvm-svn: 25552
2006-01-23 21:51:33 +00:00
Andrew Lenharth
85b5ef30e5 fix up more lsmark stuff
llvm-svn: 25550
2006-01-23 21:23:26 +00:00
Andrew Lenharth
b7a4322232 yea, lowering this stuff will basically work
llvm-svn: 25549
2006-01-23 20:59:50 +00:00
Chris Lattner
aafc339b4e Add explicit #includes of <iostream>
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Andrew Lenharth
96520cb68d typo
llvm-svn: 25464
2006-01-19 21:10:38 +00:00
Andrew Lenharth
9abecccdcb nasty nasty patterns
llvm-svn: 25463
2006-01-19 20:49:37 +00:00
Andrew Lenharth
b2671cf884 fix short immediate loads
llvm-svn: 25371
2006-01-16 21:41:39 +00:00
Andrew Lenharth
87cf023175 stack and rpcc
llvm-svn: 25369
2006-01-16 21:22:38 +00:00
Andrew Lenharth
0f185bc2ee Friendly names
llvm-svn: 25364
2006-01-16 19:53:25 +00:00
Nate Begeman
85b2dc0c4e bswap implementation
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Andrew Lenharth
e591830a97 make DAG isel the default
llvm-svn: 25282
2006-01-13 18:49:47 +00:00
Chris Lattner
80fed2d66e expand unsupported stacksave/stackrestore nodes
llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Andrew Lenharth
09447d44ac this pattern was bogus
llvm-svn: 25197
2006-01-11 03:33:06 +00:00
Andrew Lenharth
0dd7d82ec6 Int immediate loading fix
llvm-svn: 25182
2006-01-10 19:12:47 +00:00
Andrew Lenharth
58e26e2c4b proper branch not equal sequence
llvm-svn: 25159
2006-01-09 19:49:58 +00:00
Andrew Lenharth
193ef655ed make 0 codegen much better
llvm-svn: 25131
2006-01-06 19:41:51 +00:00
Chris Lattner
0bbcba6cff unbreak the build, these are now in TargetSelectionDAG.td
llvm-svn: 25109
2006-01-05 04:48:15 +00:00
Jim Laskey
41b3ee3c4f Had expand logic backward.
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.

llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Andrew Lenharth
b4102c0250 typeo
llvm-svn: 25060
2006-01-02 21:15:53 +00:00
Chris Lattner
9f51967a78 Remove a 'using namespace std'.
llvm-svn: 25059
2006-01-01 22:20:31 +00:00
Andrew Lenharth
33a683c939 Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel.
llvm-svn: 25057
2006-01-01 22:16:14 +00:00
Andrew Lenharth
1f84cd6920 clean this function up some
llvm-svn: 25055
2006-01-01 22:13:54 +00:00
Andrew Lenharth
3441657fb4 improve constant loading. Still sucks, but oh well
llvm-svn: 25047
2005-12-30 02:30:02 +00:00
Andrew Lenharth
13a01d794b let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean
llvm-svn: 25040
2005-12-29 01:06:12 +00:00
Andrew Lenharth
b87ac716bc Fix up immediate handling
llvm-svn: 25039
2005-12-29 00:50:08 +00:00
Andrew Lenharth
bea3ab432b Restore some happiness to the JIT
llvm-svn: 25026
2005-12-27 06:25:50 +00:00
Andrew Lenharth
b48bdd4aae Fix alpha regressions.
llvm-svn: 25025
2005-12-27 03:53:58 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Andrew Lenharth
f8a6d19367 add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG
llvm-svn: 25011
2005-12-25 17:36:48 +00:00
Andrew Lenharth
9e8f45d185 All that just to lower div and rem
llvm-svn: 25008
2005-12-25 01:34:27 +00:00
Andrew Lenharth
1e6795bc0c All addressing modes are now exposed. The only remaining relocated forms
are for function prologue.

TODO: move external symbols over to using RelLit.
    : have a pattern that matches constpool|globaladdr
    : have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
2005-12-24 08:29:32 +00:00
Andrew Lenharth
588bd3f659 Unify the patterns for loads and stores. Now offset addressing should be
supported.  This almost completes memory operations.

llvm-svn: 25002
2005-12-24 07:34:33 +00:00
Andrew Lenharth
f4c74093bb Let's see if we can break things.
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.

llvm-svn: 25001
2005-12-24 05:36:33 +00:00
Andrew Lenharth
5ce2a6c2cf move loads and stores over. Smart addr selection comming
llvm-svn: 25000
2005-12-24 03:41:56 +00:00
Chris Lattner
73f38507d9 remove dead code
llvm-svn: 24965
2005-12-22 21:16:08 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets.
llvm-svn: 24919
2005-12-21 20:51:37 +00:00
Andrew Lenharth
0a966ac994 fix FP selects
llvm-svn: 24672
2005-12-12 20:30:09 +00:00
Andrew Lenharth
7b9648492b restore a more restricted select
llvm-svn: 24668
2005-12-12 17:43:52 +00:00
Andrew Lenharth
c432a93381 FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself
llvm-svn: 24658
2005-12-11 03:54:31 +00:00
Andrew Lenharth
ae37aa2550 it helps if your conditionals are not reversed
llvm-svn: 24641
2005-12-09 00:45:42 +00:00
Andrew Lenharth
3b3088c410 fix divide and remainder
llvm-svn: 24628
2005-12-06 23:27:39 +00:00
Andrew Lenharth
368c8ccc9a more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp
llvm-svn: 24625
2005-12-06 20:43:30 +00:00
Andrew Lenharth
b294ecae1b OK, this does wonders for broken stuff
llvm-svn: 24624
2005-12-06 20:40:34 +00:00
Andrew Lenharth
b86d70f50a added instructions with inverted immediates
llvm-svn: 24614
2005-12-06 00:33:53 +00:00
Andrew Lenharth
fe52ed77e2 yea, it helps to have your path set right when testing
llvm-svn: 24613
2005-12-05 23:41:45 +00:00
Andrew Lenharth
0fdfe40762 These never trigger, but whatever
llvm-svn: 24612
2005-12-05 23:19:44 +00:00
Andrew Lenharth
0573bb5fd4 move this over to the dag
llvm-svn: 24609
2005-12-05 20:50:53 +00:00
Andrew Lenharth
d819ad516e fix constant pool loads
llvm-svn: 24607
2005-12-05 17:51:02 +00:00
Andrew Lenharth
9d6eddefaf major think-o
llvm-svn: 24564
2005-12-01 17:48:51 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work.  This change has no effect on generated code.

llvm-svn: 24563
2005-12-01 04:51:06 +00:00
Andrew Lenharth
22f34d275f Flags where I think I need them, quick, before the nightly tester starts
llvm-svn: 24560
2005-12-01 01:53:10 +00:00
Chris Lattner
258dc29d7f SelectNodeTo now returns its result, we must pay attention to it.
llvm-svn: 24552
2005-11-30 23:04:38 +00:00
Nate Begeman
84be54b731 No longer track value types for asm printer operands, and remove them as
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
2005-11-30 18:54:35 +00:00
Andrew Lenharth
a758caed46 remove redundant code
llvm-svn: 24538
2005-11-30 17:14:11 +00:00
Andrew Lenharth
431d24abaf Make typesafe that which isn't: FCMOVxx
llvm-svn: 24536
2005-11-30 17:11:20 +00:00
Andrew Lenharth
114fb4cdb1 FPSelect and more custom lowering
llvm-svn: 24535
2005-11-30 16:10:29 +00:00
Andrew Lenharth
dd3477b285 All sorts of stuff.
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy.  They should be custom lowered though.

Lots more stuff compiles now (go go single source!).  Of course, none of it
probably works, but that is what the nightly tester can find out :)

llvm-svn: 24533
2005-11-30 07:19:56 +00:00
Chris Lattner
47feb1ecbb No targets support line number info yet.
llvm-svn: 24513
2005-11-29 06:16:21 +00:00
Andrew Lenharth
8b7596a557 Fix warning, the better way. Really, this is what this instruction is for, so use it
llvm-svn: 24486
2005-11-22 20:59:00 +00:00
Andrew Lenharth
5de23ee89a Fix warning
llvm-svn: 24485
2005-11-22 20:56:05 +00:00
Andrew Lenharth
33e8022557 massive DAGISel patch. lots and lots more stuff compiles now
llvm-svn: 24483
2005-11-22 04:20:06 +00:00
Chris Lattner
0392a281e0 Switch to using the generic constant pool emitter impl, use shorter
CPI names

llvm-svn: 24466
2005-11-21 08:29:17 +00:00
Chris Lattner
3e2c6c1d15 Adjust to capitalized AsmPrinter method names
llvm-svn: 24456
2005-11-21 07:51:23 +00:00
Chris Lattner
28504fdac0 Use PrivateGlobalPrefix for basic blocks
llvm-svn: 24451
2005-11-21 07:38:08 +00:00
Chris Lattner
13902c24bd Switch to the new shared SwitchSection
llvm-svn: 24450
2005-11-21 07:30:28 +00:00
Chris Lattner
e5d0064a9d Rename SwitchSection -> switchSection to avoid conflicting with a future
change.

llvm-svn: 24443
2005-11-21 06:55:27 +00:00
Chris Lattner
07ea769304 Start using PrivateGlobalPrefix correctly
llvm-svn: 24442
2005-11-21 06:51:52 +00:00
Andrew Lenharth
b8ad89c2a4 prevent latent switch creation
llvm-svn: 24413
2005-11-18 13:57:03 +00:00
Andrew Lenharth
d6861fd1db who would have thought you would want to write into globals too
llvm-svn: 24381
2005-11-16 21:15:53 +00:00
Chris Lattner
33c47ef08b unbreak the build
llvm-svn: 24339
2005-11-13 01:45:23 +00:00
Andrew Lenharth
a48f1faced enable LSR by default on alpha
llvm-svn: 24337
2005-11-12 19:21:08 +00:00
Andrew Lenharth
5f39d85ce3 fix more regressions
llvm-svn: 24335
2005-11-12 19:06:28 +00:00
Andrew Lenharth
a9a8011c34 fix READCYCLECOUNTER
llvm-svn: 24334
2005-11-12 19:04:09 +00:00
Andrew Lenharth
483048fe7f fix yet more regressions
llvm-svn: 24308
2005-11-11 23:08:46 +00:00
Andrew Lenharth
b398a77753 generate chain result
llvm-svn: 24307
2005-11-11 23:02:55 +00:00
Andrew Lenharth
d3c213f459 Fix a bunch more alpha regressions
llvm-svn: 24304
2005-11-11 19:52:25 +00:00
Andrew Lenharth
dca2f13e76 continued readcyclecounter support
llvm-svn: 24300
2005-11-11 16:47:30 +00:00
Andrew Lenharth
fb7763398b fix a bunch of regressions
llvm-svn: 24269
2005-11-10 16:59:55 +00:00
Andrew Lenharth
1acb71df32 whatever. Intermediate patch to see what breaks. Seems ok.
llvm-svn: 24260
2005-11-09 19:17:08 +00:00
Chris Lattner
3fdc97d460 Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
llvm-svn: 24233
2005-11-08 02:11:51 +00:00
Chris Lattner
8ac3107a8b If the module has no t-t and the host is an alpha, default to using the Alpha BE
llvm-svn: 24110
2005-10-30 16:44:01 +00:00
Chris Lattner
3415e2f278 Make -time-passes output prettier
llvm-svn: 24096
2005-10-29 16:45:02 +00:00
Andrew Lenharth
59de475c73 int comparison patterns
llvm-svn: 24020
2005-10-26 18:44:45 +00:00
Jim Laskey
fa6eb200f8 Typo made worse x 2 - take 2.
llvm-svn: 24018
2005-10-26 18:07:50 +00:00
Jim Laskey
a667b2c9f9 Typo x 2
llvm-svn: 24016
2005-10-26 17:50:22 +00:00
Andrew Lenharth
de7df19b83 Simplify instinfo, set random bits on more fp insts, and fix 1 opcode
llvm-svn: 24014
2005-10-26 17:41:46 +00:00
Jim Laskey
9ce53d8411 Give full control of subtarget features over to table generated code.
llvm-svn: 24013
2005-10-26 17:30:34 +00:00
Jim Laskey
22e578cd95 Add attribute name and type to SubtargetFeatures.
llvm-svn: 24012
2005-10-26 17:28:23 +00:00
Chris Lattner
a050c43068 The dag isel generator generates this now
llvm-svn: 23984
2005-10-25 20:36:10 +00:00
Jim Laskey
b377b32a58 Preparation of supporting scheduling info. Need to find info based on selected
CPU.

llvm-svn: 23974
2005-10-25 15:15:28 +00:00
Chris Lattner
b57e27f069 Simplify this due to changes in the tblgen side
llvm-svn: 23908
2005-10-23 22:33:22 +00:00
Chris Lattner
8bbe66a3ab Autogen subtarget information from .td files.
llvm-svn: 23904
2005-10-23 22:15:34 +00:00
Chris Lattner
7d49317182 Add subtarget feature/processor defns to the .td file
llvm-svn: 23903
2005-10-23 22:08:45 +00:00
Andrew Lenharth
5ad3a6c993 Add several things.
loads
branches
setcc
working calls
Global address
External addresses

now I can manage malloc calls.

llvm-svn: 23887
2005-10-23 03:43:48 +00:00
Andrew Lenharth
4d5b664423 Well, the Constant matching pattern works. Can't say much about calls or globals yet.
llvm-svn: 23884
2005-10-22 22:06:58 +00:00
Chris Lattner
fa987d5a95 silence a release mode warning
llvm-svn: 23868
2005-10-21 16:01:26 +00:00
Nate Begeman
c979beb5f2 Kill some now-dead code.
llvm-svn: 23857
2005-10-21 01:52:20 +00:00
Andrew Lenharth
0068bc388e byte zap not immediate goodness
llvm-svn: 23855
2005-10-21 01:24:05 +00:00