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Commit Graph

159 Commits

Author SHA1 Message Date
Evan Cheng
5891f49c47 x86 CPU detection and proper subtarget support
llvm-svn: 25679
2006-01-27 08:10:46 +00:00
Evan Cheng
bf29b90240 When trying to fold X86::SETCC into a Select, make a copy if it has more than
one use. This allows more CMOV instructions.

llvm-svn: 25634
2006-01-26 02:13:10 +00:00
Nate Begeman
c29fac7fce First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Evan Cheng
46f85ddd84 X86 prefer scheduling for reduced register pressure.
llvm-svn: 25602
2006-01-25 09:15:17 +00:00
Evan Cheng
b463e81b83 Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it.
llvm-svn: 25596
2006-01-25 09:05:09 +00:00
Chris Lattner
f2a2d62f48 use ESP directly, not a copy of ESP into some other register for fastcc calls
llvm-svn: 25584
2006-01-24 06:14:44 +00:00
Chris Lattner
c078165ea6 Emit the copies out of call return registers *after* the ISD::CALLSEQ_END
node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.

llvm-svn: 25580
2006-01-24 05:17:12 +00:00
Chris Lattner
eacfe56de8 LowerReturn now doesn't have to handle f32 returns.
llvm-svn: 25484
2006-01-20 18:41:25 +00:00
Evan Cheng
680a8e070b Avoid generating a redundant setcc.
llvm-svn: 25457
2006-01-19 08:52:46 +00:00
Evan Cheng
aebece2f7b A obvious typo
llvm-svn: 25435
2006-01-19 01:46:14 +00:00
Evan Cheng
92c122b26f SRA shift amount must be in i8
llvm-svn: 25416
2006-01-18 09:26:46 +00:00
Evan Cheng
4d841aaa98 If a call return type is i1, insert a truncate from X86::AL to i1.
llvm-svn: 25415
2006-01-18 08:08:38 +00:00
Evan Cheng
208f5076a0 Fix lowering of calls which return f32 values.
llvm-svn: 25413
2006-01-17 21:58:21 +00:00
Evan Cheng
759a96e1a3 SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom
expand it), so ask legalizer to expand i32 UINT_TO_FP.

llvm-svn: 25386
2006-01-17 02:32:49 +00:00
Evan Cheng
53520a8cee Added a FIXME comment about why FST is currently flagged to fpGETRESULT.
llvm-svn: 25381
2006-01-17 00:37:42 +00:00
Evan Cheng
3ce28c990a Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
read a flag.

llvm-svn: 25378
2006-01-17 00:19:47 +00:00
Evan Cheng
de33ca2831 Fix FP_TO_INT**_IN_MEM lowering.
llvm-svn: 25368
2006-01-16 21:21:29 +00:00
Chris Lattner
20f25dc8c2 Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
llvm-svn: 25333
2006-01-15 09:00:21 +00:00
Nate Begeman
85b2dc0c4e bswap implementation
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Evan Cheng
a26ed7b9b2 LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be
flipped around.

llvm-svn: 25290
2006-01-13 19:51:46 +00:00
Chris Lattner
344642961e Enable X86 support for savestack/restorestack
llvm-svn: 25278
2006-01-13 18:00:54 +00:00
Chris Lattner
80fed2d66e expand unsupported stacksave/stackrestore nodes
llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Evan Cheng
bed984a1c8 More typo's. I need new eye glasses...
llvm-svn: 25261
2006-01-13 01:17:24 +00:00
Evan Cheng
ae2915ac91 Oops. Typo.
llvm-svn: 25260
2006-01-13 01:06:49 +00:00
Evan Cheng
3f2ae15472 Fix a SETCC / BRCOND folding bug.
llvm-svn: 25259
2006-01-13 01:03:02 +00:00
Evan Cheng
794a7cf6fe Fix sint_to_fp (fild*) support.
llvm-svn: 25257
2006-01-12 22:54:21 +00:00
Evan Cheng
978f5581c4 X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
linked together).

llvm-svn: 25247
2006-01-12 08:27:59 +00:00
Evan Cheng
dd45d29b56 * Materialize GlobalAddress and ExternalSym with MOV32ri rather than
LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.

llvm-svn: 25246
2006-01-12 07:56:47 +00:00
Evan Cheng
5841005bdf Added ROTL and ROTR.
llvm-svn: 25232
2006-01-11 23:20:05 +00:00
Evan Cheng
66540aa32c Support for MEMCPY and MEMSET.
llvm-svn: 25226
2006-01-11 22:15:48 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Evan Cheng
e42281bcba * Add special entry code main() (to set x87 to 64-bit precision).
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
  call parmater passing.

llvm-svn: 25207
2006-01-11 06:09:51 +00:00
Evan Cheng
9adc8e5a3d SSE cmov support.
llvm-svn: 25190
2006-01-11 00:33:36 +00:00
Evan Cheng
8504673bb2 FP_TO_INT*_IN_MEM and x87 FP Select support.
llvm-svn: 25188
2006-01-10 20:26:56 +00:00
Evan Cheng
c0b3a2166b More typos
llvm-svn: 25162
2006-01-09 22:29:54 +00:00
Evan Cheng
5baec4d0e2 typo
llvm-svn: 25160
2006-01-09 20:49:21 +00:00
Evan Cheng
d3babfe458 Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
llvm-svn: 25158
2006-01-09 18:33:28 +00:00
Evan Cheng
1e0d7b98f3 * Fast call support.
* FP cmp, setcc, etc.

llvm-svn: 25117
2006-01-06 00:43:03 +00:00
Jim Laskey
41b3ee3c4f Had expand logic backward.
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.

llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Evan Cheng
2329411038 DAG based isel call support.
llvm-svn: 25103
2006-01-05 00:27:02 +00:00
Chris Lattner
cee6093ca8 Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc
llvm-svn: 25024
2005-12-27 03:02:18 +00:00
Evan Cheng
995503fc91 More X86 floating point patterns.
llvm-svn: 24990
2005-12-23 07:31:11 +00:00
Chris Lattner
8e80a247ff make sure bit_convert's are expanded
llvm-svn: 24979
2005-12-23 05:15:23 +00:00
Evan Cheng
fb6413e05a * Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921
2005-12-21 23:05:39 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets.
llvm-svn: 24919
2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77 * Added support for X86 RET with an additional operand to specify number of
bytes to pop off stack.
* Added support for X86 SETCC.

llvm-svn: 24917
2005-12-21 20:21:51 +00:00
Evan Cheng
0226113ed5 * Added lowering hook for external weak global address. It inserts a load
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.

llvm-svn: 24888
2005-12-21 02:39:21 +00:00
Evan Cheng
44e4e6a57f Added a hook to print out names of target specific DAG nodes.
llvm-svn: 24877
2005-12-20 06:22:03 +00:00
Evan Cheng
bb34a50cb0 X86 conditional branch support.
llvm-svn: 24870
2005-12-19 23:12:38 +00:00
Evan Cheng
a3ff796fda Remove a few lines of dead code.
llvm-svn: 24768
2005-12-17 07:18:44 +00:00
Evan Cheng
d51da93a03 X86 lowers SELECT to a cmp / test followed by a conditional move.
llvm-svn: 24754
2005-12-17 01:21:05 +00:00
Evan Cheng
43152cb8b6 * Promote all 1 bit entities to 8 bit.
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.

llvm-svn: 24726
2005-12-15 19:49:23 +00:00
Chris Lattner
5df0bce13a X86 doesn't support sextinreg for 8-bit things either.
llvm-svn: 24631
2005-12-07 17:59:14 +00:00
Chris Lattner
47feb1ecbb No targets support line number info yet.
llvm-svn: 24513
2005-11-29 06:16:21 +00:00
Chris Lattner
d122fc01dd Lower READCYCLECOUNTER correctly, preserving the chain result
llvm-svn: 24438
2005-11-20 22:57:19 +00:00
Chris Lattner
f4f66fafd9 use chain operands to ensure the copies don't wander from the rdtsc instruction.
llvm-svn: 24434
2005-11-20 22:01:40 +00:00
Andrew Lenharth
a369904fc5 The second patch of X86 support for read cycle counter.
llvm-svn: 24430
2005-11-20 21:41:10 +00:00
Chris Lattner
792ac11aee Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
contributed by Evan Cheng.

llvm-svn: 24358
2005-11-15 00:40:23 +00:00