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1468c52811
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4014 Commits

Author SHA1 Message Date
Chris Lattner
1468c52811 reindent a loop, unswitch a loop. No functionality changes 
llvm-svn: 24692
 2005-12-13 04:33:58 +00:00
Evan Cheng
63f60d3edb Beautify a few patterns. 
llvm-svn: 24690
 2005-12-13 02:40:18 +00:00
Evan Cheng
95d46be9e6 Some shl patterns which do load + store folding. 
llvm-svn: 24689
 2005-12-13 02:34:51 +00:00
Evan Cheng
6beadf1c29 A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility. 
llvm-svn: 24688
 2005-12-13 01:57:51 +00:00
Evan Cheng
d233c28d29 Add and, or, and xor patterns which fold load + stores. 
llvm-svn: 24687
 2005-12-13 01:41:36 +00:00
Evan Cheng
62999d6c5d Add inc + dec patterns which fold load + stores. 
llvm-svn: 24686
 2005-12-13 01:02:47 +00:00
Evan Cheng
7f9fb7b095 Add neg and not patterns which fold load + stores. 
llvm-svn: 24685
 2005-12-13 00:54:44 +00:00
Evan Cheng
240071c011 Missed a couple redundant explicit type casts. 
llvm-svn: 24684
 2005-12-13 00:25:07 +00:00
Evan Cheng
e80ec06aaf Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc. 
llvm-svn: 24683
 2005-12-13 00:14:11 +00:00
Evan Cheng
ea7f208813 * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands. 
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.

llvm-svn: 24682
 2005-12-13 00:01:09 +00:00
Evan Cheng
0ee9dc460a Add some integer mul patterns. 
llvm-svn: 24681
 2005-12-12 23:47:46 +00:00
Evan Cheng
6c9f9ea7ec Add some sub patterns. 
llvm-svn: 24675
 2005-12-12 21:54:05 +00:00
Evan Cheng
76923d3512 When SelectLEAAddr() fails, it shouldn't cause the side effect of having the 
base or index operands being selected.

llvm-svn: 24674
 2005-12-12 21:49:40 +00:00
Evan Cheng
cf34770b28 For ISD::RET, if # of operands >= 2, try selection the real data dep. operand 
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)

llvm-svn: 24673
 2005-12-12 20:32:18 +00:00
Andrew Lenharth
0a966ac994 fix FP selects 
llvm-svn: 24672
 2005-12-12 20:30:09 +00:00
Chris Lattner
08c38b28db remove some never-completed and now-obsolete code. 
llvm-svn: 24671
 2005-12-12 20:12:20 +00:00
Evan Cheng
145318aefb Add a few more add / store patterns. e.g. ADD32mi8. 
llvm-svn: 24670
 2005-12-12 19:45:23 +00:00
Andrew Lenharth
7b9648492b restore a more restricted select 
llvm-svn: 24668
 2005-12-12 17:43:52 +00:00
Chris Lattner
dc802c4f4c Fix typo :( 
llvm-svn: 24664
 2005-12-11 18:43:13 +00:00
Chris Lattner
6f047565cb add selectcc 
llvm-svn: 24662
 2005-12-11 08:35:54 +00:00
Chris Lattner
6d4db7c732 Remove type casts that are no longer needed 
llvm-svn: 24661
 2005-12-11 07:45:47 +00:00
Chris Lattner
762fb5e2f2 Realize the constant pool & global addrs must always be ptr type 
llvm-svn: 24660
 2005-12-11 07:45:04 +00:00
Chris Lattner
d27c96f723 Fix the JIT failures from last night. 
llvm-svn: 24659
 2005-12-11 07:37:41 +00:00
Andrew Lenharth
c432a93381 FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself 
llvm-svn: 24658
 2005-12-11 03:54:31 +00:00
Nate Begeman
a0e26b25f4 Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Evan Cheng
191d0954ff Use SDTCisPtrTy type property for store address. 
llvm-svn: 24656
 2005-12-10 01:59:36 +00:00
Evan Cheng
56f62789d7 * Added X86 store patterns. 
* Added X86 dec patterns.

llvm-svn: 24654
 2005-12-10 00:48:20 +00:00
Nate Begeman
5c6a84b5fc Add support patterns to many load and store instructions which will 
hopefully use patterns in the near future.

llvm-svn: 24651
 2005-12-09 23:54:18 +00:00
Chris Lattner
ee29c75c65 Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load 
must be a pointer.  This removes a type check out of the code generated by
tblgen for load matching.

llvm-svn: 24650
 2005-12-09 22:58:42 +00:00
Evan Cheng
6610545b7e Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al 
llvm-svn: 24648
 2005-12-09 22:48:48 +00:00
Chris Lattner
cdeeb94947 Teach the PPC backend about the ctor and dtor list when not using __main and 
linking the entire program into one bc file.

llvm-svn: 24645
 2005-12-09 18:24:29 +00:00
Andrew Lenharth
ae37aa2550 it helps if your conditionals are not reversed 
llvm-svn: 24641
 2005-12-09 00:45:42 +00:00
Chris Lattner
9d9313e3c1 Add another important case we miss 
llvm-svn: 24639
 2005-12-08 07:13:28 +00:00
Evan Cheng
e121d9f3d7 Added support for ComplexPattern. 
llvm-svn: 24638
 2005-12-08 04:28:48 +00:00
Evan Cheng
6eb25df63a Added explicit type field to ComplexPattern. 
llvm-svn: 24637
 2005-12-08 02:15:07 +00:00
Evan Cheng
1712ee5ab9 * Added intelligence to X86 LEA addressing mode matching routine so it returns 
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.

llvm-svn: 24635
 2005-12-08 02:01:35 +00:00
Chris Lattner
5df0bce13a X86 doesn't support sextinreg for 8-bit things either. 
llvm-svn: 24631
 2005-12-07 17:59:14 +00:00
Andrew Lenharth
3b3088c410 fix divide and remainder 
llvm-svn: 24628
 2005-12-06 23:27:39 +00:00
Chris Lattner
46ca9774fc Silence another annoying GCC warning 
llvm-svn: 24627
 2005-12-06 20:56:18 +00:00
Andrew Lenharth
368c8ccc9a more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp 
llvm-svn: 24625
 2005-12-06 20:43:30 +00:00
Andrew Lenharth
b294ecae1b OK, this does wonders for broken stuff 
llvm-svn: 24624
 2005-12-06 20:40:34 +00:00
Chris Lattner
68a0fed879 Use new PPC-specific nodes to represent shifts which require the 6-bit 
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.

llvm-svn: 24615
 2005-12-06 02:10:38 +00:00
Andrew Lenharth
b86d70f50a added instructions with inverted immediates 
llvm-svn: 24614
 2005-12-06 00:33:53 +00:00
Andrew Lenharth
fe52ed77e2 yea, it helps to have your path set right when testing 
llvm-svn: 24613
 2005-12-05 23:41:45 +00:00
Andrew Lenharth
0fdfe40762 These never trigger, but whatever 
llvm-svn: 24612
 2005-12-05 23:19:44 +00:00
Evan Cheng
60cc8da341 Remove unnecessary let hasCtrlDep=1 now it can be inferred. 
llvm-svn: 24611
 2005-12-05 23:09:43 +00:00
Andrew Lenharth
0573bb5fd4 move this over to the dag 
llvm-svn: 24609
 2005-12-05 20:50:53 +00:00
Andrew Lenharth
d819ad516e fix constant pool loads 
llvm-svn: 24607
 2005-12-05 17:51:02 +00:00
Chris Lattner
3583f5337b Several things: 
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.

llvm-svn: 24599
 2005-12-05 02:40:25 +00:00
Chris Lattner
440e97cb1f On some targets (e.g. X86), shift amounts are not the same as the value 
being shifted.  Don't assume they are.

llvm-svn: 24598
 2005-12-05 02:37:26 +00:00