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4014 Commits

Author SHA1 Message Date
Chris Lattner
4581404290 Enable global address legalization, fixing a todo and allowing the removal 
of some code.  This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner.  It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.

llvm-svn: 24397
 2005-11-17 18:26:56 +00:00
Chris Lattner
e3c5f4c9d2 Teach the selector to fold lo(g) into load instruction immediate fields 
llvm-svn: 24396
 2005-11-17 18:02:16 +00:00
Chris Lattner
92a1367bed Generate LA and ADDIS when possible. 
llvm-svn: 24395
 2005-11-17 17:52:01 +00:00
Chris Lattner
c46c672eba Use the right accessor to create this node 
llvm-svn: 24394
 2005-11-17 17:51:38 +00:00
Chris Lattner
8d04987a39 Add an initial hack at legalizing GlobalAddress into the appropriate nodes 
on Darwin to remove smarts from the isel.  This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file.  However, we can currently emit stuff like
this:  :)

        li r2, lo16(L_x$non_lazy_ptr)
        lis r3, ha16(L_x$non_lazy_ptr)
        lwzx r2, r3, r2

The obvious improvements will follow.

llvm-svn: 24390
 2005-11-17 07:30:41 +00:00
Chris Lattner
b80ea80354 Add globaladdress and targetglobaladdress nodes for dag patterns 
llvm-svn: 24389
 2005-11-17 07:20:15 +00:00
Chris Lattner
5f605f3c12 LI could theoretically be used for the lo-part of a global address, just like 
lis can be used for the high part.

llvm-svn: 24388
 2005-11-17 07:04:43 +00:00
Chris Lattner
7fdf96ed96 When lowering direct calls, lower them to use a targetglobaladress directly 
instead of a globaladdress.  This has no effect on the generated code at all.

llvm-svn: 24386
 2005-11-17 05:56:14 +00:00
Chris Lattner
f829636c6b Add patterns for some 16-bit immediate instructions, patch contributed by 
Evan Cheng.

llvm-svn: 24384
 2005-11-17 02:01:55 +00:00
Chris Lattner
fec54e57a0 Add patterns for several simple instructions that take i32 immediates. 
Patch contributed by Evan Cheng!

llvm-svn: 24382
 2005-11-16 22:59:19 +00:00
Andrew Lenharth
d6861fd1db who would have thought you would want to write into globals too 
llvm-svn: 24381
 2005-11-16 21:15:53 +00:00
Chris Lattner
9caa214f72 initial step at adding a dag-to-dag isel for X86 backend. Patch contributed 
by Evan Cheng!

llvm-svn: 24371
 2005-11-16 01:54:32 +00:00
Nate Begeman
684381a73b Patch to clean up function call pseudos and support the BLA instruction, 
which branches to an absolute address.  This is required to support objc
direct dispatch.

llvm-svn: 24370
 2005-11-16 00:48:01 +00:00
Chris Lattner
bbed9bff31 Make sure to use SwitchSection to switch sections so that we don't accidentally emit 
functions into the .const section.  Whoops.

llvm-svn: 24363
 2005-11-15 01:45:01 +00:00
Chris Lattner
792ac11aee Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch 
contributed by Evan Cheng.

llvm-svn: 24358
 2005-11-15 00:40:23 +00:00
Chris Lattner
baf0cc4e6e Handle globals with explicit alignment requests 
llvm-svn: 24355
 2005-11-14 19:00:30 +00:00
Chris Lattner
9bfbc74ed4 Teach the PPC asmwriter to honor globals with explicit section requests. 
llvm-svn: 24353
 2005-11-14 18:52:46 +00:00
Duraid Madina
a60348b6b2 add FP select. next up - divide! 
llvm-svn: 24346
 2005-11-14 01:17:30 +00:00
Chris Lattner
33c47ef08b unbreak the build 
llvm-svn: 24339
 2005-11-13 01:45:23 +00:00
Andrew Lenharth
a48f1faced enable LSR by default on alpha 
llvm-svn: 24337
 2005-11-12 19:21:08 +00:00
Andrew Lenharth
5f39d85ce3 fix more regressions 
llvm-svn: 24335
 2005-11-12 19:06:28 +00:00
Andrew Lenharth
a9a8011c34 fix READCYCLECOUNTER 
llvm-svn: 24334
 2005-11-12 19:04:09 +00:00
Andrew Lenharth
483048fe7f fix yet more regressions 
llvm-svn: 24308
 2005-11-11 23:08:46 +00:00
Andrew Lenharth
b398a77753 generate chain result 
llvm-svn: 24307
 2005-11-11 23:02:55 +00:00
Andrew Lenharth
d3c213f459 Fix a bunch more alpha regressions 
llvm-svn: 24304
 2005-11-11 19:52:25 +00:00
Andrew Lenharth
dca2f13e76 continued readcyclecounter support 
llvm-svn: 24300
 2005-11-11 16:47:30 +00:00
Chris Lattner
e1435b7831 Make BB and CPI labels use the function number, not the function name as a 
uniquing id.  This makes things happy when the function name is quoted,
preventing labels like LBB"foo"_2.

llvm-svn: 24295
 2005-11-10 21:59:25 +00:00
Chris Lattner
e753f208af do not allow '.' in symbol names 
llvm-svn: 24292
 2005-11-10 21:39:29 +00:00
Chris Lattner
fb66a38f13 Darwin supports quoted labels. This implements: 
test/Regression/CodeGen/PowerPC/darwin-labels.ll

llvm-svn: 24287
 2005-11-10 19:33:43 +00:00
Chris Lattner
e84264b303 Call this method with the object we have 
llvm-svn: 24279
 2005-11-10 18:53:25 +00:00
Chris Lattner
7ad799fbc1 Make the aix asm printer interface properly with the parent class 
llvm-svn: 24274
 2005-11-10 18:20:29 +00:00
Andrew Lenharth
fb7763398b fix a bunch of regressions 
llvm-svn: 24269
 2005-11-10 16:59:55 +00:00
Andrew Lenharth
1acb71df32 whatever. Intermediate patch to see what breaks. Seems ok. 
llvm-svn: 24260
 2005-11-09 19:17:08 +00:00
Chris Lattner
bb448515ae Add a new option to indicate we want the code generator to emit code quickly, 
not spending tons of time microoptimizing it.  This is useful for an -O0
style of build.

llvm-svn: 24235
 2005-11-08 02:12:47 +00:00
Chris Lattner
3fdc97d460 Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 
llvm-svn: 24233
 2005-11-08 02:11:51 +00:00
Duraid Madina
fb806bb309 add support for storing and returning bools 
llvm-svn: 24228
 2005-11-07 03:11:02 +00:00
Duraid Madina
f0469f0376 just some random hacking - calls (particularly indirect) need a lot of 
love (especially with -sched=simple)

llvm-svn: 24225
 2005-11-06 13:43:30 +00:00
Nate Begeman
aecebc076b Add the necessary support to the ISel to allow targets to codegen the new 
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.

llvm-svn: 24224
 2005-11-06 09:00:38 +00:00
Duraid Madina
cf11aefc91 ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and 
a bunch of other things) but is currently ignored by the code
generator.

llvm-svn: 24206
 2005-11-06 04:29:30 +00:00
Chris Lattner
dc19995e25 add a case Nate sent me 
llvm-svn: 24195
 2005-11-05 08:57:56 +00:00
Duraid Madina
c2c2e353ee oops, forgot to load GP for indirect calls, though the old code now commented 
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)

would fix this but it's 3am! :O

llvm-svn: 24186
 2005-11-04 17:55:53 +00:00
Duraid Madina
e8456a9175 kill redundant SP/GP/RP save/restores across calls 
llvm-svn: 24183
 2005-11-04 10:01:10 +00:00
Duraid Madina
1c632094d4 add support for loading bools 
llvm-svn: 24182
 2005-11-04 09:59:06 +00:00
Duraid Madina
f5824e4fa3 fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1) 
llvm-svn: 24175
 2005-11-04 00:57:56 +00:00
Duraid Madina
4adb8143ce add pattern to load constant 0 into a predicate reg 
llvm-svn: 24164
 2005-11-03 10:09:32 +00:00
Chris Lattner
cfb7edb4ed Fix a bug that prevented this pattern from matching 
llvm-svn: 24161
 2005-11-03 05:45:34 +00:00
Chris Lattner
776c711246 Fix a QOI issue noticed by Markus F.X.J. Oberhumer. 
This fixes PR641

llvm-svn: 24154
 2005-11-02 17:42:58 +00:00
Duraid Madina
7975eea64d "fix" support for FP constants (this code asserts in the scheduler, 
though)

llvm-svn: 24152
 2005-11-02 07:32:59 +00:00
Duraid Madina
e89d6f5197 add F0 and F1 to the FP register class 
llvm-svn: 24151
 2005-11-02 07:30:39 +00:00
Chris Lattner
04749a46a0 This works now 
llvm-svn: 24150
 2005-11-02 06:49:37 +00:00
Duraid Madina
94dd783c92 add support for SELECT to TargetSelectionDAG.td, add support for 
selecting ints to IA64, and a few other ia64 bits and pieces

llvm-svn: 24147
 2005-11-02 02:37:18 +00:00
Duraid Madina
b743794294 add support for loading FP constants +0.0 and +1.0 to the dag isel, 
stop pretending -0.0 and -1.0 are machine constants

llvm-svn: 24146
 2005-11-02 02:35:04 +00:00
Jim Laskey
4cb1e29b27 Allow itineraries to be passed through the Target Machine. 
llvm-svn: 24139
 2005-11-01 20:06:59 +00:00
Duraid Madina
28dbc1f9d0 heh, scheduling was easy? 
need to send chris, jim and sampo a box of fish each

llvm-svn: 24135
 2005-11-01 05:49:08 +00:00
Duraid Madina
6314b5fc35 FORTRAN!!! :( and other similarly unfortunate things mean that on ia64 
one sometimes needs to pass FP args in both FP *and* integer registers.

llvm-svn: 24134
 2005-11-01 05:46:16 +00:00
Duraid Madina
7f2a0b1290 so tablegen was thinking I might want to convert FPs to predicates. 
clever little tablegen!

llvm-svn: 24133
 2005-11-01 03:32:15 +00:00
Duraid Madina
c754478fbe add support for int->FP and FP->int ops, and add ia64 patterns for these 
llvm-svn: 24132
 2005-11-01 03:07:25 +00:00
Duraid Madina
ba4b2d2a1b add zeroextend predicate->integer 
llvm-svn: 24131
 2005-11-01 01:29:55 +00:00
Chris Lattner
dd58fcaf6b Add a flag to enable a darwin linker optimization 
llvm-svn: 24130
 2005-11-01 00:12:36 +00:00
Chris Lattner
906dc8d0e5 Make constant pool entries use private labels. This is important when you're 
not compiling a whole program at a time :)

llvm-svn: 24129
 2005-10-31 22:12:06 +00:00
Duraid Madina
76abe0f46c add FP compares and implicit register defs to the dag isel 
llvm-svn: 24118
 2005-10-31 01:42:11 +00:00
Chris Lattner
8ac3107a8b If the module has no t-t and the host is an alpha, default to using the Alpha BE 
llvm-svn: 24110
 2005-10-30 16:44:01 +00:00
Duraid Madina
5168a7dea5 fix some broken comparisons, this affected the Pattern isel too. 
llvm-svn: 24109
 2005-10-30 10:14:19 +00:00
Chris Lattner
802e8d3a7e This is implemented 
llvm-svn: 24107
 2005-10-30 06:42:12 +00:00
Chris Lattner
3415e2f278 Make -time-passes output prettier 
llvm-svn: 24096
 2005-10-29 16:45:02 +00:00
Duraid Madina
9c1cbbe5d1 add some FP stuff, some mix.* stuff, and constant pool support to the 
DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream

llvm-svn: 24094
 2005-10-29 16:08:30 +00:00
Chris Lattner
74537db62e remove reference to this pass 
llvm-svn: 24088
 2005-10-29 05:28:34 +00:00
Duraid Madina
6280da9a88 add shladd 
llvm-svn: 24080
 2005-10-29 04:13:40 +00:00
Nate Begeman
da6888930d New case to handle someday 
llvm-svn: 24075
 2005-10-28 23:26:57 +00:00
Chris Lattner
2338614087 Don't emit "32" for unordered comparison 
llvm-svn: 24073
 2005-10-28 22:58:07 +00:00
Chris Lattner
28552d8cc8 add a hack to get code with ordered comparisons working. This hack is 
tracked as PR642

llvm-svn: 24068
 2005-10-28 20:49:47 +00:00
Chris Lattner
379e078ee6 add support for branch on ordered/unordered. 
llvm-svn: 24067
 2005-10-28 20:32:44 +00:00
Chris Lattner
c3f548dceb Do not globalize internal symbols 
llvm-svn: 24064
 2005-10-28 18:44:07 +00:00
Chris Lattner
0a69a4a837 These are autogenerated 
llvm-svn: 24063
 2005-10-28 18:26:52 +00:00
Duraid Madina
251185e626 DAG->DAG instruction selection for ia64! "hello world" works, not much else. 
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT!
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.

llvm-svn: 24058
 2005-10-28 17:46:35 +00:00
Chris Lattner
110c713ccc remove dead stuff 
llvm-svn: 24054
 2005-10-28 04:58:24 +00:00
Chris Lattner
77b4595a7b Eliminate getClass, it is not needed 
llvm-svn: 24053
 2005-10-28 04:57:11 +00:00
Chris Lattner
002ce4f1f8 a bad case for bitfield insert 
llvm-svn: 24051
 2005-10-28 00:20:45 +00:00
Andrew Lenharth
59de475c73 int comparison patterns 
llvm-svn: 24020
 2005-10-26 18:44:45 +00:00
Jim Laskey
fa6eb200f8 Typo made worse x 2 - take 2. 
llvm-svn: 24018
 2005-10-26 18:07:50 +00:00
Chris Lattner
355e7583ab Fix an assert compiling MallocBench/gs 
llvm-svn: 24017
 2005-10-26 18:01:11 +00:00
Jim Laskey
a667b2c9f9 Typo x 2 
llvm-svn: 24016
 2005-10-26 17:50:22 +00:00
Andrew Lenharth
de7df19b83 Simplify instinfo, set random bits on more fp insts, and fix 1 opcode 
llvm-svn: 24014
 2005-10-26 17:41:46 +00:00
Jim Laskey
9ce53d8411 Give full control of subtarget features over to table generated code. 
llvm-svn: 24013
 2005-10-26 17:30:34 +00:00
Jim Laskey
22e578cd95 Add attribute name and type to SubtargetFeatures. 
llvm-svn: 24012
 2005-10-26 17:28:23 +00:00
Chris Lattner
91450212d4 Add nodes for CondCodeSDNode and setcc, and add a bunch of pattern fragments 
to make it easy to use them.  This lets you write patterns like:

(set PRRC:$rd, (setne GPRC:$rS, imm:$SH))

and stuff.

llvm-svn: 24009
 2005-10-26 17:00:25 +00:00
Nate Begeman
a63b42ad1e Add a note about some bitfield stuff we could be doing better. 
llvm-svn: 23994
 2005-10-25 23:50:02 +00:00
Nate Begeman
c3ab5792e9 Correctly Expand or Promote FP_TO_UINT based on the capabilities of the 
machine.  This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.

llvm-svn: 23993
 2005-10-25 23:48:36 +00:00
Chris Lattner
e2df44dbb7 autogen undef 
llvm-svn: 23991
 2005-10-25 21:03:41 +00:00
Chris Lattner
d006618062 Add undef 
llvm-svn: 23990
 2005-10-25 21:03:14 +00:00
Chris Lattner
a701ef16fc Allow pseudos to have patterns, no functionality change 
llvm-svn: 23988
 2005-10-25 20:58:43 +00:00
Chris Lattner
fb373ddb69 Autogen fsel 
llvm-svn: 23987
 2005-10-25 20:55:47 +00:00
Chris Lattner
8a53051fb1 Expose the fextend on the DAG instead of doing it in the matcher 
llvm-svn: 23986
 2005-10-25 20:54:57 +00:00
Chris Lattner
aaf22bf5c5 Autogen a few new ppc-specific nodes 
llvm-svn: 23985
 2005-10-25 20:41:46 +00:00
Chris Lattner
a050c43068 The dag isel generator generates this now 
llvm-svn: 23984
 2005-10-25 20:36:10 +00:00
Chris Lattner
115fa976bf Be a bit more paranoid about calling SelectNodeTo 
llvm-svn: 23982
 2005-10-25 20:26:41 +00:00
Chris Lattner
1fe1eab5a8 Fix a couple of minor bugs. The first fixes povray, the second fixes things 
if the dag combiner isn't run

llvm-svn: 23981
 2005-10-25 19:32:37 +00:00
Jim Laskey
b377b32a58 Preparation of supporting scheduling info. Need to find info based on selected 
CPU.

llvm-svn: 23974
 2005-10-25 15:15:28 +00:00
Chris Lattner
d470882fb7 do not wrap this whole file in namespace llvm 
llvm-svn: 23962
 2005-10-24 06:38:35 +00:00
Chris Lattner
86ac518282 Make this build with GCC 4.1, patch contributed by Vladimir A. Merzliakov! 
llvm-svn: 23956
 2005-10-24 04:51:35 +00:00
Chris Lattner
e6f7a38925 DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now 
llvm-svn: 23940
 2005-10-24 02:26:13 +00:00
Chris Lattner
9793d642d5 only build .a version of this library 
llvm-svn: 23938
 2005-10-24 02:14:49 +00:00
Chris Lattner
f9be3a3e41 There is no need to build an archive version of this library 
llvm-svn: 23936
 2005-10-24 02:09:03 +00:00
Chris Lattner
f4fc584715 This file is hopelessly out of date 
llvm-svn: 23935
 2005-10-24 02:07:08 +00:00
Chris Lattner
5d6f12bbde Simplify this, matching changes in the tblgen emitter 
llvm-svn: 23909
 2005-10-23 22:34:25 +00:00
Chris Lattner
b57e27f069 Simplify this due to changes in the tblgen side 
llvm-svn: 23908
 2005-10-23 22:33:22 +00:00
Chris Lattner
a14bcc1e4c mark this as beta 
llvm-svn: 23906
 2005-10-23 22:23:45 +00:00
Chris Lattner
c9a7ba7a38 If a user requests help, give them help on both features and processors 
llvm-svn: 23905
 2005-10-23 22:23:13 +00:00
Chris Lattner
8bbe66a3ab Autogen subtarget information from .td files. 
llvm-svn: 23904
 2005-10-23 22:15:34 +00:00
Chris Lattner
7d49317182 Add subtarget feature/processor defns to the .td file 
llvm-svn: 23903
 2005-10-23 22:08:45 +00:00
Chris Lattner
1e815394b4 rearrange things a bit so that instructions can use subtarget features in the 
future.

llvm-svn: 23902
 2005-10-23 22:08:13 +00:00
Chris Lattner
993d43c967 add a marker 
llvm-svn: 23901
 2005-10-23 22:07:20 +00:00
Chris Lattner
bdcb2a99b6 add a note that Nate mentioned last week 
llvm-svn: 23898
 2005-10-23 21:44:59 +00:00
Chris Lattner
11c044d7cf Put some of my random notes somewhere public 
llvm-svn: 23897
 2005-10-23 19:52:42 +00:00
Chris Lattner
a8e2d4d60f Improve help output. 
llvm-svn: 23893
 2005-10-23 05:33:39 +00:00
Chris Lattner
baa3ca710e improve -help output 
llvm-svn: 23892
 2005-10-23 05:28:51 +00:00
Chris Lattner
ee4e1a32f9 Move static functions from .h file, reduce #includes, pass strings by const&, 
use LowercaseString from StringExtras.h, remove extraneous space from help
output.

llvm-svn: 23891
 2005-10-23 05:26:26 +00:00
Andrew Lenharth
5ad3a6c993 Add several things. 
loads
branches
setcc
working calls
Global address
External addresses

now I can manage malloc calls.

llvm-svn: 23887
 2005-10-23 03:43:48 +00:00
Andrew Lenharth
4d5b664423 Well, the Constant matching pattern works. Can't say much about calls or globals yet. 
llvm-svn: 23884
 2005-10-22 22:06:58 +00:00
Chris Lattner
e3014fa504 This file is entirely ifdef'd out 
llvm-svn: 23882
 2005-10-22 19:37:08 +00:00
Jim Laskey
12484c7699 Add g3 back to the mix and reorder to irritate them anal folk. Actually, it's 
to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.

llvm-svn: 23880
 2005-10-22 08:04:24 +00:00
Chris Lattner
f6b98c786e 64-bit reg support should not be enabled by default, as support isn't complete. 
llvm-svn: 23878
 2005-10-21 22:15:43 +00:00
Chris Lattner
ffa76df587 Instead of aborting if not a case we can handle specially, break out and 
let the generic code handle it.  This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.

also, reindent this code

llvm-svn: 23874
 2005-10-21 21:17:10 +00:00
Jim Laskey
1fbdee408d Plugin new subtarget backend into the build. 
llvm-svn: 23870
 2005-10-21 19:05:19 +00:00
Chris Lattner
fa987d5a95 silence a release mode warning 
llvm-svn: 23868
 2005-10-21 16:01:26 +00:00
Nate Begeman
d633b875bb Match rotate. This does actually match the rotates in an rc5 cipher, but I 
haven't seen it fire on our testsuite.

llvm-svn: 23863
 2005-10-21 06:36:18 +00:00
Nate Begeman
5a915709c3 Don't generate operations that aren't yet supported 
llvm-svn: 23858
 2005-10-21 01:52:45 +00:00
Nate Begeman
c979beb5f2 Kill some now-dead code. 
llvm-svn: 23857
 2005-10-21 01:52:20 +00:00
Andrew Lenharth
0068bc388e byte zap not immediate goodness 
llvm-svn: 23855
 2005-10-21 01:24:05 +00:00
Nate Begeman
6c42f509bc Invert the TargetLowering flag that controls divide by consant expansion. 
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.

llvm-svn: 23853
 2005-10-21 00:02:42 +00:00
Andrew Lenharth
065fe477eb Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight 
llvm-svn: 23852
 2005-10-20 23:58:36 +00:00
Chris Lattner
2587e44b65 Use a literal to define ineg instead of immzero 
llvm-svn: 23851
 2005-10-20 23:30:37 +00:00
Andrew Lenharth
0856abb644 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh 
llvm-svn: 23849
 2005-10-20 19:39:24 +00:00
Andrew Lenharth
6c39e6c389 add cttz and ctpop 
llvm-svn: 23848
 2005-10-20 19:38:11 +00:00
Andrew Lenharth
81d2375468 Sounds good, finish the intop conversion. 
llvm-svn: 23843
 2005-10-20 14:42:48 +00:00
Nate Begeman
bbce8c042c Add some more patterns for i64 on ppc 
llvm-svn: 23842
 2005-10-20 07:51:08 +00:00
Chris Lattner
763a62efa6 Add some pattern fragments to simplify the repetitive parts of the patterns 
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.

llvm-svn: 23837
 2005-10-20 04:21:06 +00:00
Chris Lattner
27aacf1b55 simplify this a bit by using immediates 
llvm-svn: 23836
 2005-10-20 03:57:03 +00:00
Nate Begeman
dc1a2a1f19 Move the target constant divide optimization up into the dag combiner, so 
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.

llvm-svn: 23835
 2005-10-20 02:15:44 +00:00
Andrew Lenharth
21beb13e51 forgot this one 
llvm-svn: 23833
 2005-10-20 00:29:02 +00:00
Andrew Lenharth
a7554852b3 ret 0; works, not much else 
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.

llvm-svn: 23832
 2005-10-20 00:28:31 +00:00
John Criswell
9ced67a0e1 This fixes PR638: 
Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx

llvm-svn: 23831
 2005-10-19 20:07:15 +00:00
Jim Laskey
514a74d946 Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830
 2005-10-19 19:51:16 +00:00
Nate Begeman
83f0f34140 Write patterns for the various shl and srl patterns that don't involve 
doing something clever.

llvm-svn: 23824
 2005-10-19 18:42:01 +00:00
Jim Laskey
0918760dec Push processor descriptions to the top of target and add command line info. 
llvm-svn: 23820
 2005-10-19 13:34:52 +00:00
Chris Lattner
61ae05f5dd now that tblgen is smarter, use integers directly. This should help Andrew too 
llvm-svn: 23818
 2005-10-19 04:32:04 +00:00
Chris Lattner
800f5628d5 teach ppc backend these are copies 
llvm-svn: 23813
 2005-10-19 01:50:36 +00:00
Chris Lattner
73379995ab Convert these cases to patterns 
llvm-svn: 23811
 2005-10-19 01:38:02 +00:00
Nate Begeman
fccb39f398 Woo, it kinda works. We now generate this atrociously bad, but correct, 
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr

llvm-svn: 23809
 2005-10-19 01:12:32 +00:00
Chris Lattner
6416c5627d apply some tblgen majik to simplify the X register definitions 
llvm-svn: 23805
 2005-10-19 00:17:55 +00:00
Nate Begeman
722531ea21 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This 
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.

llvm-svn: 23803
 2005-10-19 00:05:37 +00:00
Nate Begeman
ee581735d9 Add the ability to lower return instructions to TargetLowering. This 
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802
 2005-10-18 23:23:37 +00:00
Jim Laskey
da117aa6d3 Simple edits; remove unimplimented cases and clarify long haul SLU cases. 
llvm-svn: 23788
 2005-10-18 16:59:23 +00:00
Chris Lattner
5edea4e9cd Fix the JIT encoding of LWA, LD, STD, and STDU. 
llvm-svn: 23787
 2005-10-18 16:51:22 +00:00
Jim Laskey
610af28ca0 Checking in first round of scheduling tablegen files. Not tied in as yet. 
llvm-svn: 23786
 2005-10-18 16:23:40 +00:00
Chris Lattner
394413e59c add a case 
llvm-svn: 23785
 2005-10-18 06:30:51 +00:00
Nate Begeman
5dbcab491a Do the right thing and enable 64 bit regs under the control of a subtarget 
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.

llvm-svn: 23779
 2005-10-18 00:56:42 +00:00
Nate Begeman
b0e319a7c7 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is 
purely mechanical.

llvm-svn: 23778
 2005-10-18 00:28:58 +00:00
Nate Begeman
723637974b More PPC32 -> PPC changes, as well as merging some classes that were 
redundant after the change.

llvm-svn: 23759
 2005-10-16 05:39:50 +00:00
Nate Begeman
0eeb198d81 Remove some dead code now that the dag combiner exists. 
llvm-svn: 23754
 2005-10-15 22:08:02 +00:00
Chris Lattner
4893eb3b04 Remove some dead code: the ORI/ORIS cases are autogen'd. This makes 
SelectIntImmediateExpr dead.

llvm-svn: 23753
 2005-10-15 22:06:18 +00:00
Chris Lattner
4e08151e9b prune #includes 
llvm-svn: 23752
 2005-10-15 21:58:54 +00:00
Chris Lattner
6f97b0bb81 These instructions are now autogenerated 
llvm-svn: 23751
 2005-10-15 21:44:56 +00:00
Chris Lattner
114941504c Add a pattern for FSQRTS 
llvm-svn: 23750
 2005-10-15 21:44:15 +00:00
Chris Lattner
c9479e899a remove dead code 
llvm-svn: 23749
 2005-10-15 21:40:12 +00:00
Chris Lattner
b632f70353 remove broken SRA/rlwimi case 
llvm-svn: 23746
 2005-10-15 19:04:48 +00:00
Chris Lattner
d3946bbea6 Rename PPC32*.h to PPC*.h 
This completes the grand PPC file renaming

llvm-svn: 23745
 2005-10-14 23:59:06 +00:00
Chris Lattner
e870e24352 Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo 
and PPC32JITInfo classes should be merged.

llvm-svn: 23744
 2005-10-14 23:53:41 +00:00
Chris Lattner
0405f3388f Rename PowerPC*.h to PPC*.h 
llvm-svn: 23743
 2005-10-14 23:51:18 +00:00
Chris Lattner
7bcc93b6c1 Rename PowerPCInstrBuilder.h -> PPC* 
llvm-svn: 23742
 2005-10-14 23:45:43 +00:00
Chris Lattner
4857375695 Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine 
still should be merged into the PPC32TargetMachine class

llvm-svn: 23741
 2005-10-14 23:44:05 +00:00
Chris Lattner
11127fcf98 Rename PowerPC*.td -> PPC*.td 
llvm-svn: 23740
 2005-10-14 23:40:39 +00:00
Chris Lattner
841f66a2d3 These are dead 
llvm-svn: 23739
 2005-10-14 23:38:51 +00:00
Chris Lattner
612940b7b0 Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td 
llvm-svn: 23738
 2005-10-14 23:37:35 +00:00
Chris Lattner
0250038010 Like the comment says... 
llvm-svn: 23737
 2005-10-14 22:48:24 +00:00
Chris Lattner
1f9360318d Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions 
from the .td file that correspond to it

llvm-svn: 23736
 2005-10-14 22:44:13 +00:00
Nate Begeman
3b6c2df603 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery

llvm-svn: 23735
 2005-10-14 22:06:00 +00:00
Nate Begeman
27cce12802 Remove an unnecsesary file. PPC32 and PPC64 share architected registers. 
We will decide with subtarget support whether we ever use an i64 register
class.

llvm-svn: 23734
 2005-10-14 18:58:46 +00:00
Chris Lattner
664dd0c80e add the integer truncate/extension operations 
llvm-svn: 23733
 2005-10-14 06:40:20 +00:00
Chris Lattner
102b6e76e6 These are now autogenerated 
llvm-svn: 23731
 2005-10-14 06:26:29 +00:00
Chris Lattner
35002513b5 Add patterns for FP round/extend 
llvm-svn: 23727
 2005-10-14 04:55:50 +00:00
Chris Lattner
1a001d068a add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it 
llvm-svn: 23726
 2005-10-14 04:55:10 +00:00
Chris Lattner
1a77897107 These definitions have been moved to common code. 
llvm-svn: 23681
 2005-10-10 06:01:00 +00:00
Chris Lattner
2b9c260832 Pull DAG ISel generation nodes out of the PowerPC backend to where they 
can be used by other targets.  For those targets that want to use it,
have at.  :)

llvm-svn: 23680
 2005-10-10 06:00:30 +00:00
Andrew Lenharth
bfa54fe229 This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out 
llvm-svn: 23676
 2005-10-09 20:11:35 +00:00
Chris Lattner
97ee5c7f18 Disable formation of rlwinm instructions from SRA bases. This fixes 
the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.

llvm-svn: 23670
 2005-10-09 05:36:17 +00:00
Nate Begeman
ef7172f7b3 Remove another unused file. Preparing for the great "enable i64 on ppc32" 
merge, and using subtarget info for ptr size.

llvm-svn: 23668
 2005-10-08 01:32:34 +00:00
Nate Begeman
77c1ff0239 Remove a file that is no longer used 
llvm-svn: 23666
 2005-10-08 01:21:27 +00:00
Chris Lattner
6809d07aa5 When preselecting, favor things that have low depth to select first. This 
is faster and uses less stack space.  This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel

llvm-svn: 23664
 2005-10-07 22:10:27 +00:00
Chris Lattner
8481412db8 Fix a CQ regression from my patch to split F32/F64 into seperate register 
classes on PPC.  We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced.  This fixes Regression/CodeGen/PowerPC/fpcopy.ll

llvm-svn: 23654
 2005-10-07 05:00:52 +00:00
Chris Lattner
9be9eb2f7f Fix CodeGen/Generic/bool-to-double.ll 
llvm-svn: 23652
 2005-10-07 04:50:48 +00:00
Chris Lattner
f572bec811 Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes. 
llvm-svn: 23650
 2005-10-06 19:07:45 +00:00
Chris Lattner
0e0c65b680 Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes 
llvm-svn: 23649
 2005-10-06 19:03:35 +00:00
Chris Lattner
0e97719aa3 Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes 
llvm-svn: 23648
 2005-10-06 18:56:10 +00:00
Chris Lattner
4b1b6161ef Add a recursive-iterative hybrid stage to attempt to reduce stack space, this 
helps but not enough.

Start pulling cases out of PPC32DAGToDAGISel::Select.  With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes).  Pulling this first function out gets us down to 8224.  More
to come :(

llvm-svn: 23647
 2005-10-06 18:45:51 +00:00
Andrew Lenharth
c9e3e3ee73 This is suppose to work now 
llvm-svn: 23644
 2005-10-06 16:54:29 +00:00
Andrew Lenharth
a3b71accf4 remove VAX compatibility instruction, we will never use this 
llvm-svn: 23643
 2005-10-06 16:53:32 +00:00
Chris Lattner
e4feaa3bea silence some warnings 
llvm-svn: 23637
 2005-10-05 17:15:09 +00:00
Chris Lattner
70ebb767b4 Add a forward def 
llvm-svn: 23621
 2005-10-04 05:09:20 +00:00
Chris Lattner
26a791ec89 Speed up the asm printer a lot by not printing formatted LLVM asm output 
for globals

llvm-svn: 23608
 2005-10-03 07:08:36 +00:00