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Commit Graph

160382 Commits

Author SHA1 Message Date
Serge Pavlov
0f79884a7d Specify namespace for realloc
llvm-svn: 325226
2018-02-15 09:35:36 +00:00
Serge Pavlov
5359575468 Report fatal error in the case of out of memory
Analysis of fails in the case of out of memory errors can be tricky on
Windows. Such error emerges at the point where memory allocation function
fails, but manifests itself when null pointer is used. These two points
may be distant from each other. Besides, next runs may not exhibit
allocation error.

Usual programming practice does not require checking result of 'operator
new' because it throws 'std::bad_alloc' in the case of allocation error.
However, LLVM is usually built with exceptions turned off, so 'new' can
return null pointer. This change installs custom new handler, which causes
fatal error in the case of out of memory. The handler is installed
automatically prior to call to 'main' during construction of a static
object defined in 'lib/Support/ErrorHandling.cpp'. If the application does
not use this file, the handler may be installed manually by a call to
'llvm::install_out_of_memory_new_handler', declared in
'include/llvm/Support/ErrorHandling.h".

There are calls to C allocation functions, malloc, calloc and realloc.
They are used for interoperability with C code, when allocated object has
variable size and when it is necessary to avoid call of constructors. In
many calls the result is not checked against null pointer. To simplify
checks, new functions are defined in the namespace 'llvm' with the
same names as these C function. These functions produce fatal error if
allocation fails. User should use 'llvm::malloc' instead of 'std::malloc'
in order to use the safe variant. This change replaces 'std::malloc'
in the cases when the result of allocation function is not checked against
null pointer.

Finally, there are plain C code, that uses malloc and similar functions. If
the result is not checked, assert statements are added.

Differential Revision: https://reviews.llvm.org/D43010

llvm-svn: 325224
2018-02-15 09:20:26 +00:00
Andrew V. Tischenko
196eec0104 (NFC)[MachineCombiner] Improve debug output.
llvm-svn: 325217
2018-02-15 07:55:02 +00:00
Max Kazantsev
2fec5b71da [NFC] Rename isKnownViaSimpleReasoning to isKnownViaNonRecursiveReasoning
llvm-svn: 325216
2018-02-15 07:47:17 +00:00
Max Kazantsev
f098039f09 [NFC] Fix metadata placement in test
llvm-svn: 325215
2018-02-15 07:13:18 +00:00
Max Kazantsev
43812ac389 [SCEV] Favor isKnownViaSimpleReasoning over constant ranges check
There is a more powerful but still simple function `isKnownViaSimpleReasoning ` that
does constant range check and few more additional checks. We use it some places (e.g.
when proving implications) and in some other places we only check constant ranges.

Currently, indvar simplifier fails to remove the check in following loop:

  int inc = ...;
  for (int i = inc, j = inc - 1; i < 200; ++i, ++j)
    if (i > j) { ... }

This patch replaces all usages of `isKnownPredicateViaConstantRanges` with
`isKnownViaSimpleReasoning` to have smarter proofs. In particular, it fixes the
case above.

Reviewed-By: sanjoy
Differential Revision: https://reviews.llvm.org/D43175

llvm-svn: 325214
2018-02-15 07:09:00 +00:00
Craig Topper
4ae6e567eb [X86] Regnerate test to show scheduling comments. NFC
These must have not been printing the last time the test was re-generated.

llvm-svn: 325198
2018-02-15 02:14:20 +00:00
Craig Topper
be6f3a52c4 [X86] Change 32 and 64 bit versions of LSL instruction have a 16-bit memory operand.
This matches the Intel and AMD documentation and is consistent with the LAR instruction.

llvm-svn: 325197
2018-02-15 01:21:53 +00:00
Craig Topper
0be25c34b3 [X86] Dont' allow 'outs' and 'ins' in at&t syntax without suffixes.
The match would be ambiguous, but at&t asm parsing doesn't support ambiguous matches and will just return the first.

llvm-svn: 325192
2018-02-14 23:53:26 +00:00
Craig Topper
7984086e9a [X86] Don't use 64 bit hex constants in a 32 bit assembler test.
llvm-svn: 325191
2018-02-14 23:53:24 +00:00
Craig Topper
bbe3b80de6 [X86] Reverse the operand order of invlpga in at&t syntax to match gas.
llvm-svn: 325190
2018-02-14 23:53:21 +00:00
Jake Ehrlich
f69705a3db [llvm-objcopy] Fix handling of zero-size segments in llvm-objcopy
Some ELF files produced by lld may have zero-size segment placeholders as shown
below. Since GNU_STACK Offset is 0, the current code makes it the lowest used
offset, and relocates all the segments over the ELF header. The resulting
binary is total garbage.

This change fixes how llvm-objcopy handles PT_PHDR properlly by treating ELF
headers and the program header table as segments to allow the layout algorithm
decide where those should go.

Author: vit9696

Differential Revision: https://reviews.llvm.org/D42872

llvm-svn: 325189
2018-02-14 23:31:33 +00:00
Sanjay Patel
019b67ac3d [InstCombine] clean up fold for X / C -> X * (1.0/C); NFCI
This should work with vector constants too, but it's currently limited to scalar.

llvm-svn: 325187
2018-02-14 23:04:17 +00:00
Vitaly Buka
f35a8dc055 [ThinLTO/CFI] Include TYPE_ID summaries into GLOBALVAL_SUMMARY_BLOCK
Summary:
TypeID summaries are used by CFI and need to be serialized by ThinLTO
indexing for later use by LTO Backend.

Reviewers: tejohnson, pcc

Subscribers: mehdi_amini, inglorion, eraman, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D42611

llvm-svn: 325182
2018-02-14 22:41:15 +00:00
Lang Hames
b8f97b94a0 [ORC] Consolidate RTDyldObjectLinkingLayer GetMemMgr and GetResolver into a
unified GetResources callback.

Having a single 'GetResources' callback will simplify adding new resources in
the future.

llvm-svn: 325180
2018-02-14 22:13:02 +00:00
Lang Hames
df05abc39f [ORC] Switch to shared_ptr ownership for AsynchronousSymbolQueries.
Queries need to stay alive until each owner has set the values they are
responsible for.

llvm-svn: 325179
2018-02-14 22:12:56 +00:00
Craig Topper
1184db4a1c [X86] Don't swap argument on BOUND instruction in at&t syntax.
The bound instruction does not have reversed operands in gas.

Fixes PR27653.

Patch by Maya Madhavan.

Differential Revision: https://reviews.llvm.org/D43243

llvm-svn: 325178
2018-02-14 21:54:58 +00:00
Rafael Espindola
829dbc0aeb Change the BugDriver to store the current module with std::unique_ptr.
While there, change a bunch of helper functions to take references to
avoid adding calls to get().

This should conclude the bugpoint yak shaving.

llvm-svn: 325177
2018-02-14 21:44:34 +00:00
Rafael Espindola
503af7c700 Use std::uniue_ptr. NFC.
llvm-svn: 325176
2018-02-14 21:25:07 +00:00
Rafael Espindola
5d13253310 Use std::unique_ptr. NFC.
llvm-svn: 325174
2018-02-14 21:17:36 +00:00
Rafael Espindola
f4fd7fc5c5 Use std::unique_ptr. NFC.
llvm-svn: 325173
2018-02-14 21:10:29 +00:00
Rafael Espindola
6190942a21 Use std::unique_ptr. NFC.
llvm-svn: 325172
2018-02-14 20:59:39 +00:00
Rafael Espindola
91f68369a7 Use std::unique_ptr. NFC.
llvm-svn: 325170
2018-02-14 20:53:38 +00:00
Krzysztof Parzyszek
d760dbf10e [Hexagon] Split HVX vector pair loads/stores, expand unaligned loads
llvm-svn: 325169
2018-02-14 20:46:06 +00:00
Simon Pilgrim
f687ed1ec6 Removed superfluous semicolon to fix -Wpedantic gcc warning. NFCI.
llvm-svn: 325168
2018-02-14 20:43:47 +00:00
Rafael Espindola
b10eb80a4b Use std::unique_ptr. NFC.
llvm-svn: 325167
2018-02-14 20:25:18 +00:00
Francis Visoiu Mistrih
cae4b1ba28 [CodeGen] Print predecessors, successors, then liveins in -debug printing
Reorder them to match MIR.

Predecessors are only comments, and they're not usually printed in MIR.

llvm-svn: 325166
2018-02-14 20:23:05 +00:00
Rafael Espindola
0e867383d9 Use std::unique_ptr. NFC.
llvm-svn: 325165
2018-02-14 20:21:20 +00:00
Rafael Espindola
5786faace5 Use std::unique_ptr. NFC.
llvm-svn: 325164
2018-02-14 20:13:01 +00:00
Rafael Espindola
5e64a02538 Use std::unique_ptr. NFC.
llvm-svn: 325163
2018-02-14 19:58:41 +00:00
Volkan Keles
d8161883cb GlobalISel: Add templated functions and pattern matcher support for some more opcodes
Summary:
This patch adds templated functions to MachineIRBuilder for some opcodes
and adds pattern matcher support for G_AND and G_OR.

Reviewers: aditya_nandakumar

Reviewed By: aditya_nandakumar

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D43309

llvm-svn: 325162
2018-02-14 19:58:36 +00:00
Sanjay Patel
7662be63cf [InstCombine] add tests and comments for fdiv X, C; NFC
llvm-svn: 325161
2018-02-14 19:54:51 +00:00
Rafael Espindola
710a5e861b Pass a module reference to CloneModule.
It can never be null and most callers were already using references or
std::unique_ptr.

llvm-svn: 325160
2018-02-14 19:50:40 +00:00
Rafael Espindola
1202040fcc Update examples for API change. NFC.
llvm-svn: 325157
2018-02-14 19:23:27 +00:00
Rafael Espindola
7713c013a2 Pass a reference to a module to the bitcode writer.
This simplifies most callers as they are already using references or
std::unique_ptr.

llvm-svn: 325155
2018-02-14 19:11:32 +00:00
Craig Topper
2f7995c340 [RegisterClassInfo] Invalidate the register pressure set limit cache when reserved regs or callee saved regs change
Previously we only invalidated the pressure set limit cached when the TargetRegisterInfo pointer changes. But as reserved regs and callee saved regs are used as part of calculating the limits we should invalidate when those change too.

I encountered this when reverting a patch from the 6.0 branch. One of the x86 test files had a function that used rbp as a frame pointer, making it reserved. It was followed by another function which didn't use rbp but had the same TRI so the pressure set limit cache was not invalidated. If i removed the function that used rbp as a frame pointer from the file, the remaining function then got a different register pressure limit for the GR16 pressure set. This caused the machine scheduler to change the scheduling for the function. This was an unexpected change from just deleting a function.

I don't have a test case for trunk because the particular x86 test case is different enough from the 6.0 branch to not be affected now.

Differential Revision: https://reviews.llvm.org/D43274

llvm-svn: 325153
2018-02-14 18:53:29 +00:00
David Green
ad8913af27 Move llvm::computeLoopSafetyInfo from LICM.cpp to LoopUtils.cpp. NFC
Move computeLoopSafetyInfo, defined in Transforms/Utils/LoopUtils.h,
into the corresponding LoopUtils.cpp, as opposed to LICM where it resides
at the moment. This will allow other functions from Transforms/Utils
to reference it.

llvm-svn: 325151
2018-02-14 18:34:53 +00:00
Simon Pilgrim
0d2a33eaff [X86][SSE] truncateVectorWithPACK - Use src type instead of dst to select between PACK*SDW/PACK*SWB
Try to keep PACK*SDW/PACK*SWB as wide as possible, this helps ComputeNumSignBits as it can only peek through bitcasts to wider types, pre-AVX2 codegen was already doing this as it could peek through bitcasts/subvectors more easily than AVX2 could through shuffles.

This shouldn't affect existing results as calls to truncateVectorWithPACK ensure we have enough sign bits to pack to the same value, but it should make it possible to use truncateVectorWithPACK chains to perform saturation in combineTruncateWithSat with a future patch.

llvm-svn: 325149
2018-02-14 18:23:58 +00:00
Craig Topper
2e34d16069 [InstCombine] Don't fold select(C, Z, binop(select(C, X, Y), W)) -> select(C, Z, binop(Y, W)) if the binop is rem or div.
The select may have been preventing a division by zero or INT_MIN/-1 so removing it might not be safe.

Fixes PR36362.

Differential Revision: https://reviews.llvm.org/D43276

llvm-svn: 325148
2018-02-14 18:08:33 +00:00
Stanislav Mekhanoshin
5f83290ecf [AMDGPU] Remove non-temporal flag from argument loads
Kernel arguments likely read by all workitems and should not bypass
cache. Fixes performance hit in sub-dword argument loads.

Differential Revision: https://reviews.llvm.org/D43249

llvm-svn: 325146
2018-02-14 18:05:14 +00:00
Sanjay Patel
8c5ba41434 [InstCombine] regenerate checks; NFC
llvm-svn: 325144
2018-02-14 17:37:32 +00:00
Paul Robinson
222ff14ae7 [DWARF] Fix incorrect prologue end line record.
The prologue-end line record must be emitted after the last
instruction that is part of the function frame setup code and before
the instruction that marks the beginning of the function body.

Patch by Carlos Alberto Enciso!

Differential Revision: https://reviews.llvm.org/D41762

llvm-svn: 325143
2018-02-14 17:35:52 +00:00
Sanjay Patel
5547176d2d [InstCombine] simplify isFMulOrFDivWithConstant(); NFCI
llvm-svn: 325142
2018-02-14 17:16:33 +00:00
Sanjay Patel
2b94e8c2c3 [InstCombine] replace isa/cast with dyn_cast; NFC
llvm-svn: 325141
2018-02-14 16:56:44 +00:00
Sanjay Patel
f8ec782c8c [InstCombine] refactor folds for mul with negated operands; NFCI
This keeps with our current usage of 'match' and is easier to see that
the optional NSW only applies in the non-constant operand case. 

llvm-svn: 325140
2018-02-14 16:50:55 +00:00
Rafael Espindola
848a52f758 Store defined macros in MCContext.
So that macros defined in inline assembly blocks are available to the
whole file.

This provides a consistent behavior with other assembly directives,
since equations for example are already preserved between inline
assembly blocks.

PR: 36110

Patch by Roger!

llvm-svn: 325139
2018-02-14 16:34:27 +00:00
Sanjay Patel
f030049c69 [x86] add baseline vector compare tests for D42948; NFC
llvm-svn: 325138
2018-02-14 16:15:15 +00:00
Alexander Ivchenko
833b4ee927 [SelectionDAG][X86] Fix incorrect offset generated for VMASKMOV
When creating high MachineMemOperand for MSTORE/MLOAD we supply
it with the original PointerInfo, while the pointer itself had been incremented.
The patch adds the proper offset to the PointerInfo.

llvm-svn: 325135
2018-02-14 15:55:24 +00:00
Alexey Bataev
81e6c94efb [SLP] Allow vectorization of reversed loads.
Summary:
Reversed loads are handled as gathering. But we can just reshuffle
these values. Patch adds support for vectorization of reversed loads.

Reviewers: RKSimon, spatel, mkuper, hfinkel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43022

llvm-svn: 325134
2018-02-14 15:29:15 +00:00
Sjoerd Meijer
1eab012a78 [ARM] f16 stack spill/reloads
This adds support for handling f16 stack spills/reloads.

Differential Revision: https://reviews.llvm.org/D43280

llvm-svn: 325130
2018-02-14 15:09:09 +00:00