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Commit Graph

150338 Commits

Author SHA1 Message Date
Florian Hahn
28cfee69f6 [AArch64] Fix order of checks in shouldScheduleAdjacent.
We need to check the opcode of FirstMI before accessing the operands. This
caused a buildbot failure during bootstrapping on AArch64.

llvm-svn: 305694
2017-06-19 13:45:41 +00:00
Simon Pilgrim
93c2f98ef7 Use range for loops. NFCI.
llvm-svn: 305693
2017-06-19 13:24:12 +00:00
Tom Stellard
4d87648db8 AMDGPU/GlobalISel: Mark G_BITCAST s32 <--> <2 x s16> legal
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D34129

llvm-svn: 305692
2017-06-19 13:15:45 +00:00
Igor Breger
69968c0386 [GlobalISel][X86] Fold FI/G_GEP into LDR/STR instruction addressing mode.
Summary: Implement some of the simplest addressing modes.It should help to test ABI.

Reviewers: zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33888

llvm-svn: 305691
2017-06-19 13:12:57 +00:00
Florian Hahn
d1d5802289 Recommit rL305677: [CodeGen] Add generic MacroFusion pass
Use llvm::make_unique to avoid ambiguity with MSVC.

This patch adds a generic MacroFusion pass, that is used on X86 and
AArch64, which both define target-specific shouldScheduleAdjacent
functions. This generic pass should make it easier for other targets to
implement macro fusion and I intend to add macro fusion for ARM shortly.

Differential Revision: https://reviews.llvm.org/D34144

llvm-svn: 305690
2017-06-19 12:53:31 +00:00
Diana Picus
e4e070d6ae [ARM] GlobalISel: Support G_ICMP for s8 and s16
Widen to s32 (like all other binary ops).

llvm-svn: 305683
2017-06-19 11:47:28 +00:00
Florian Hahn
8e7ee1f5d5 Revert r305677 [CodeGen] Add generic MacroFusion pass.
This causes Windows buildbot failures do an ambiguous call.

llvm-svn: 305681
2017-06-19 11:26:15 +00:00
Florian Hahn
9de5c3ed15 [CodeGen] Add generic MacroFusion pass.
Summary:
This patch adds a generic MacroFusion pass, that is used on X86 and
AArch64, which both define target-specific shouldScheduleAdjacent
functions. This generic pass should make it easier for other targets to
implement macro fusion and I intend to add macro fusion for ARM shortly.

Reviewers: craig.topper, evandro, t.p.northover, atrick, MatzeB

Reviewed By: MatzeB

Subscribers: atrick, aemerson, mgorny, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34144

llvm-svn: 305677
2017-06-19 10:51:38 +00:00
Diana Picus
be5dc529e4 [ARM] GlobalISel: Support G_ICMP for i32 and pointers
Add support throughout the pipeline:
- mark as legal for s32 and pointers
- map to GPRs
- lower to a sequence of instructions, which moves 0 or 1 into the
  result register based on the flags set by a CMPrr

We have copied from FastISel a helper function which maps CmpInst
predicates into ARMCC codes. Ideally, we should be able to move it
somewhere that both FastISel and GlobalISel can use.

llvm-svn: 305672
2017-06-19 09:40:51 +00:00
Guy Blank
512ffd23a1 [X86] Simplify vector-shuffle-v48 test. NFC.
llvm-svn: 305670
2017-06-19 08:58:13 +00:00
Max Kazantsev
ae91dd5d3e [SCEV] Teach SCEVExpander to expand BinPow
Current implementation of SCEVExpander demonstrates a very naive behavior when
it deals with power calculation. For example, a SCEV for x^8 looks like

  (x * x * x * x * x * x * x * x)

If we try to expand it, it generates a very straightforward sequence of muls, like:

  x2 = mul x, x
  x3 = mul x2, x
  x4 = mul x3, x
      ...
  x8 = mul x7, x

This is a non-efficient way of doing that. A better way is to generate a sequence of
binary power calculation. In this case the expanded calculation will look like:

  x2 = mul x, x
  x4 = mul x2, x2
  x8 = mul x4, x4

In some cases the code size reduction for such SCEVs is dramatic. If we had a loop:

  x = a;
  for (int i = 0; i < 3; i++)
    x = x * x;

And this loop have been fully unrolled, we have something like:

  x = a;
  x2 = x * x;
  x4 = x2 * x2;
  x8 = x4 * x4;

The SCEV for x8 is the same as in example above, and if we for some reason
want to expand it, we will generate naively 7 multiplications instead of 3.
The BinPow expansion algorithm here allows to keep code size reasonable.

This patch teaches SCEV Expander to generate a sequence of BinPow multiplications
if we have repeating arguments in SCEVMulExpressions.

Differential Revision: https://reviews.llvm.org/D34025

llvm-svn: 305663
2017-06-19 06:24:53 +00:00
David Blaikie
8c5d5d74a3 [Doc] Fix getelementptr description about arguments
Section "Arguments" of `getelementptr` [1] says the first argument is a
type, the second argument is a pointer or a vector of pointers, and is
the base address to start from. Update `getelementptr` FAQ [2]
accordingly, based on discussion with David on the mailing list [3].

[1] http://llvm.org/docs/LangRef.html#getelementptr-instruction
[2] http://llvm.org/docs/GetElementPtr.html
[3] http://lists.llvm.org/pipermail/llvm-dev/2017-June/114294.html

Patch by Wei-Ren Chen!

Differential Revision: https://reviews.llvm.org/D34325

llvm-svn: 305662
2017-06-19 05:34:21 +00:00
Daniel Berlin
499f6f0651 NewGVN: Fix PR 33461, caused by slightly overzealous verification.
llvm-svn: 305657
2017-06-19 00:24:00 +00:00
Sanjay Patel
4645a21833 [x86] specify triples and auto-generate complete checks; NFC
llvm-svn: 305656
2017-06-18 21:48:44 +00:00
Sanjay Patel
09dd0297d4 [x86] specify triples and auto-generate complete checks; NFC
llvm-svn: 305655
2017-06-18 21:42:19 +00:00
Sanjay Patel
e3b02cba93 [x86] specify triple and auto-generate checks; NFC
llvm-svn: 305654
2017-06-18 21:30:57 +00:00
Zachary Turner
fd4dcd2210 Delete TypeDatabase.
Merge the functionality into the random access type collection.
This class was only being used in 2 places, so getting rid of it
simplifies the code.

llvm-svn: 305653
2017-06-18 20:52:45 +00:00
Craig Topper
3074451310 [APFloat] Move the integerPartWidth constant into APFloatBase. Remove integerPart typedef at file scope and just use the one in APFloatBase everywhere. NFC
llvm-svn: 305652
2017-06-18 18:15:41 +00:00
Craig Topper
87c6dc7c24 [Reassociate] Use APInt::isNullValue() instead of comparing with 0. NFC
This should compile to slightly better code.

llvm-svn: 305651
2017-06-18 18:15:38 +00:00
Kamil Rytarowski
3abb332274 Implement AllocateRWX and ReleaseRWX for NetBSD
Summary:
NetBSD ships with PaX MPROTECT disallowing RWX mappings.
There is a solution to bypass this restriction with double mapping
RX (code) and RW (data) using mremap(2) MAP_REMAPDUP.
The initial mapping must be mmap(2)ed with protection:
PROT_MPROTECT(PROT_EXEC).

This functionality to bypass PaX MPROTECT appeared in NetBSD-7.99.72.

This patch fixes 20 failing tests:
-    LLVM :: DebugInfo/debuglineinfo-macho.test
-    LLVM :: DebugInfo/debuglineinfo.test
-    LLVM :: ExecutionEngine/RuntimeDyld/Mips/ELF_Mips64r2N64_PIC_relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/Mips/ELF_N32_relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/Mips/ELF_N64R6_relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/Mips/ELF_O32R6_relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/Mips/ELF_O32_PIC_relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/COFF_i386.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/COFF_x86_64.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/ELF-relaxed.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/ELF_STT_FILE.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/ELF_x64-64_PC8_relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/ELF_x64-64_PIC_relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/ELF_x86-64_PIC-small-relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/ELF_x86-64_debug_frame.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/ELF_x86_64_StubBuf.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/MachO_empty_ehframe.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/MachO_i386_DynNoPIC_relocations.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/MachO_i386_eh_frame.s
-    LLVM :: ExecutionEngine/RuntimeDyld/X86/MachO_x86-64_PIC_relocations.s

Sponsored by <The NetBSD Foundation>

Reviewers: joerg, lhames

Reviewed By: joerg

Subscribers: sdardis, llvm-commits, arichardson

Differential Revision: https://reviews.llvm.org/D33874

llvm-svn: 305650
2017-06-18 16:52:32 +00:00
Sanjay Patel
a39e48ea2c x86] adjust test constants to maintain coverage; NFC
Increment (add 1) could be transformed to sub -1, and we'd lose coverage for these patterns.

llvm-svn: 305646
2017-06-18 14:45:23 +00:00
Sanjay Patel
71d016fef5 [x86] adjust test constants to maintain coverage; NFC
Increment (add 1) could be transformed to sub -1, and we'd lose coverage for these patterns.

llvm-svn: 305645
2017-06-18 14:23:47 +00:00
Sanjay Patel
f1218bd2d3 [x86] adjust test constants to maintain coverage; NFC
Increment (add 1) could be transformed to sub -1, and we'd lose coverage for these patterns.

llvm-svn: 305644
2017-06-18 14:01:32 +00:00
Ismail Donmez
884b2b3606 Revert r305642
llvm-svn: 305643
2017-06-18 10:15:57 +00:00
Ismail Donmez
7ef4ff0753 Test to correct triple for SUSE on ARMv7
llvm-svn: 305642
2017-06-18 10:00:59 +00:00
Xin Tong
6a56ac682f Add argmononly attribute to strlen and wcslen, i.e. they only read memory (string) passed to them.
Summary:
This allows strlen to be moved out of the loop in case its argument is
not modified in the loop in LICM.

Reviewers: hfinkel, davide, sanjoy, dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34323

llvm-svn: 305641
2017-06-18 03:10:26 +00:00
Galina Kistanova
09768137f0 Fixed the warning introduced by r305625 to make ubuntu-gcc7.1-werror bot green.
llvm-svn: 305640
2017-06-17 21:05:28 +00:00
Sanjoy Das
0855318b79 [SROA] Add support for non-integral pointers
Summary: C.f. http://llvm.org/docs/LangRef.html#non-integral-pointer-type

Reviewers: chandlerc, loladiro

Reviewed By: loladiro

Subscribers: reames, loladiro, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32203

llvm-svn: 305639
2017-06-17 20:28:13 +00:00
Xin Tong
97c5e03580 [TRE] Add assertion for folding trivial return block
llvm-svn: 305637
2017-06-17 16:55:12 +00:00
Xin Tong
a91993e070 [TRE] Update comments. NFC
llvm-svn: 305636
2017-06-17 16:18:36 +00:00
NAKAMURA Takumi
ad9505ab40 [CMake] Get rid of generating obj.*-tblgen if CMake >= 3.9 for Ninja generator.
CMake-3.9 doesn't let compilation units depend on their dependent libraries.

llvm-svn: 305635
2017-06-17 13:45:55 +00:00
NAKAMURA Takumi
e6ce8bcee4 [CMake] Introduce LLVM_TARGET_TRIPLE_ENV as an option to override LLVM_DEFAULT_TARGET_TRIPLE at runtime.
No behavior is changed if LLVM_TARGET_TRIPLE_ENV is blank or undefined.

If LLVM_TARGET_TRIPLE_ENV is "TEST_TARGET_TRIPLE" and $TEST_TARGET_TRIPLE is not blank,
llvm::sys::getDefaultTargetTriple() returns $TEST_TARGET_TRIPLE.
Lit resets config.target_triple and config.environment[LLVM_TARGET_TRIPLE_ENV] to change the default target.

Without changing LLVM_DEFAULT_TARGET_TRIPLE nor rebuilding, lit can be run;

  TEST_TARGET_TRIPLE=i686-pc-win32 bin/llvm-lit -sv path/to/test/
  TEST_TARGET_TRIPLE=i686-pc-win32 ninja check-clang-tools

Differential Revision: https://reviews.llvm.org/D33662

llvm-svn: 305632
2017-06-17 03:19:08 +00:00
Eric Christopher
7db18ea118 Rework logic and comment out the default relocation models for PPC.
llvm-svn: 305630
2017-06-17 02:25:56 +00:00
Eric Christopher
6321be89df Turn a large if block into a smaller early return for clarity.
llvm-svn: 305629
2017-06-17 02:25:55 +00:00
Eric Christopher
16d1a522c8 Remove the old and unused PPC32 and PPC64TargetMachine classes.
llvm-svn: 305628
2017-06-17 02:25:53 +00:00
Eric Christopher
9f6b7ed018 Remove unused forward declaration.
llvm-svn: 305627
2017-06-17 02:25:51 +00:00
Eric Christopher
2de5840f02 Tidy up some calls to getRegister for readability.
llvm-svn: 305626
2017-06-17 02:25:49 +00:00
Matthias Braun
4e4ba838d9 RegScavenging: Add scavengeRegisterBackwards()
Re-apply r276044/r279124/r305516. Fixed a problem where we would refuse
to place spills as the very first instruciton of a basic block and thus
artifically increase pressure (test in
test/CodeGen/PowerPC/scavenging.mir:spill_at_begin)

This is a variant of scavengeRegister() that works for
enterBasicBlockEnd()/backward(). The benefit of the backward mode is
that it is not affected by incomplete kill flags.

This patch also changes
PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register
scavenger in backwards mode.

Differential Revision: http://reviews.llvm.org/D21885

llvm-svn: 305625
2017-06-17 02:08:18 +00:00
Tim Shen
0baf587918 [PPC] Remove isBarrier from CFENCE8's definition.
Summary:
This is my misunderstanding on isBarrier. It's not for memory barriers,
but for other control flow purposes. lwsync doesn't have it either.

This fixes a simple crash with -verify-machineinstrs like below:

  define void @Foo() {
  entry:
    %tmp = load atomic i64, i64* undef acquire, align 8
    unreachable
  }

I deliberately don't want to check in the test, since there is little
chance to regress on such a mistake. Such a test adds noise to the code
base.

I plan to check in first, since it fixes a crash, and the fix is obvious.

Reviewers: kbarton, echristo

Subscribers: sanjoy, nemanjai, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D34314

llvm-svn: 305624
2017-06-17 01:25:34 +00:00
Davide Italiano
6df246515f [SelectionDAG] Update Loop info after splitting critical edges.
The analysis is expected to be preserved by SelectionDAG.

llvm-svn: 305621
2017-06-17 00:56:27 +00:00
Davide Italiano
69ec804250 [InstCombine] Make FPMathOperator working with ConstantExpression(s).
Fixes PR33453.

Differential Revision:  https://reviews.llvm.org/D34303

llvm-svn: 305618
2017-06-17 00:07:22 +00:00
Zachary Turner
d2d96834f2 Don't crash if a type record can't be found.
This was a regression introduced in a previous patch.  Adding
back the code that handles this case.

llvm-svn: 305617
2017-06-17 00:02:24 +00:00
Sam Clegg
9f1012760e [WebAssembly] Use __stack_pointer global when writing wasm binary
This ensures that symbolic relocations are generated for stack
pointer manipulations.

These relocations are of type R_WEBASSEMBLY_GLOBAL_INDEX_LEB.
This change also adds support for reading relocations of this
type in WasmObjectFile.cpp.

Since its a globally imported symbol this does mean that
the get_global/set_global instruction won't be valid until
the objects are linked that global used in no longer an
imported global.

Differential Revision: https://reviews.llvm.org/D34172

llvm-svn: 305616
2017-06-16 23:59:10 +00:00
Zachary Turner
e0445e24ac [CodeView] Fix random access of type names.
Suppose we had a type index offsets array with a boundary at type index
N. Then you request the name of the type with index N+1, and that name
requires the name of index N-1 (think a parameter list, for example). We
didn't handle this, and we would print something like (<unknown UDT>,
<unknown UDT>).

The fix for this is not entirely trivial, and speaks to a larger
problem. I think we need to kill TypeDatabase, or at the very least kill
TypeDatabaseVisitor. We need a thing that doesn't do any caching
whatsoever, just given a type index it can compute the type name "the
slow way". The reason for the bug is that we don't have anything like
that. Everything goes through the type database, and if we've visited a
record, then we're "done". It doesn't know how to do the expensive thing
of re-visiting dependent records if they've not yet been visited.

What I've done here is more or less copied the code (albeit greatly
simplified) from TypeDatabaseVisitor, but wrapped it in an interface
that just returns a std::string. The logic of caching the name is now in
LazyRandomTypeCollection. Eventually I'd like to move the record
database here as well and the visited record bitfield here as well, at
which point we can actually just delete TypeDatabase. I don't see any
reason for it if a "sequential" collection is just a special case of a
random access collection with an empty partial offsets array.

Differential Revision: https://reviews.llvm.org/D34297

llvm-svn: 305612
2017-06-16 23:42:44 +00:00
Zachary Turner
9c736ffa49 Remove some dead code / includes.
I'm trying to get rid of the TypeDatabase class, so the first
step is to minimize its footprint.

llvm-svn: 305611
2017-06-16 23:42:15 +00:00
Sam Clegg
749ad73510 obj2yaml: Improve error reporting
Previously only the error codes were reported which
meant that useful information about malformed inputs
was not shown.

Differential Revision: https://reviews.llvm.org/D34008

llvm-svn: 305609
2017-06-16 23:29:54 +00:00
Yonghong Song
c3a06b2be5 bpf: fix a strict-aliasing issue
Davide Italiano reported the following issue if llvm
is compiled with gcc -Wstrict-aliasing -Werror:
.....
lib/Target/BPF/CMakeFiles/LLVMBPFCodeGen.dir/BPFISelDAGToDAG.cpp.o
../lib/Target/BPF/BPFISelDAGToDAG.cpp: In member function ‘virtual
void {anonymous}::BPFDAGToDAGISel::PreprocessISelDAG()’:
../lib/Target/BPF/BPFISelDAGToDAG.cpp:264:26: warning: dereferencing
type-punned pointer will break strict-aliasing rules
[-Wstrict-aliasing]
       val = *(uint16_t *)new_val;
.....

The error is caused by my previous commit (revision 305560).

This patch fixed the issue by introducing an union to avoid
type casting.

Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 305608
2017-06-16 23:28:04 +00:00
Craig Topper
c4dec681d7 [ConstantRange] Implement getSignedMin/Max in a less complicated and faster way
Summary: As far as I can tell we should be able to implement these almost the same way we do unsigned, but using signed comparisons and checks for min signed value instead of min unsigned value.

Reviewers: pete, davide, sanjoy

Reviewed By: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33815

llvm-svn: 305607
2017-06-16 23:26:23 +00:00
Craig Topper
1b6ccd7bca [SelectionDAG] Use APInt::isSubsetOf. NFC
llvm-svn: 305606
2017-06-16 23:19:14 +00:00
Craig Topper
01a0913b1b [SelectionDAG] Use APInt::isNullValue/isOneValue. NFC
llvm-svn: 305605
2017-06-16 23:19:12 +00:00