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Commit Graph

217776 Commits

Author SHA1 Message Date
Scott Linder
28e61dd3f9 Revert "[ADT] Add makeVisitor to STLExtras.h"
This reverts commit 14a8aa615597ef0aa424ac9545906bf8b9865063.

Mistakenly landed this before a patch it should depend on was accepted.
2021-06-28 19:51:25 +00:00
Nikita Popov
53eb678598 [Verifier] Support opaque pointers for global_ctors
Adjust the assertion to allow opaque pointers.
2021-06-28 21:40:54 +02:00
Scott Linder
a106319b70 [ADT] Add makeVisitor to STLExtras.h
Adds a utility to combine multiple Callables into a single Callable.
This is useful to make constructing a visitor for `std::visit`-like
functions more natural; functions like this will be added in future
patches.

Intended to supercede https://reviews.llvm.org/D99560 by
perfectly-forwarding the combined Callables.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D100670
2021-06-28 19:35:42 +00:00
Akira Hatanaka
252bda7ebd [ObjC][ARC] Ignore operand bundle "clang.arc.attachedcall" on a call if
the call's return type is void

Instead of trying hard to prevent global optimization passes such as
deadargelim from changing the return type to void, just ignore the
bundle if the return type is void. clang currently emits calls to
@llvm.objc.clang.arc.noop.use, which consumes the function call result,
immediately after the function call to prevent changes to the return
type, but optimization passes can delete the call to
@llvm.objc.clang.arc.noop.use if the function call doesn't return, which
enables deadargelim to change the return type.

rdar://76671438

Differential Revision: https://reviews.llvm.org/D103062
2021-06-28 11:02:30 -07:00
Krzysztof Parzyszek
609f5d997c [Hexagon] Add patterns to load i1
This fixes https://llvm.org/PR50853
2021-06-28 12:17:30 -05:00
Anirudh Prasad
544a4eb77e [AsmParser][SystemZ][z/OS] Fix hanging scenario in HLASMAsmParser class
- In the caller of the overridden `parseStatement` function (i.e. the `AsmParser::Run()`) in the case of an error **and** if we're not at the start of the statement, we "eat" up until the end of the current statement, so we don't have to process it again.
- However, in the HLASMAsmParser class what's happening is that, if an error occurs at the very start of the statement (for example, you invoke the HLASMAsmParser to parse a gnu directive), we will error out, but we never really progress in terms of the next token in the statement to parse. We simply keep looping processing the same error over and over again (partly because we're at the start of the statement)
- To remedy this, when the `parseAsHLASMLabel` function fails, before returning, we "eat" until the end of the statement function, so we don't process it anymore.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D104869
2021-06-28 12:47:08 -04:00
Sjoerd Meijer
abcb3f4369 Revert "[AArch64] Custom lower <4 x i8> loads"
This reverts commit 51e434fc2590d1d3ffa6545cd07290a238db2b88 because of a
build bot failure in test-suite::GCC-C-execute-pr60960.test that I need to
investigate.
2021-06-28 17:44:46 +01:00
Sjoerd Meijer
1ab02789b3 [AArch64] Added tests to neon-truncstore.ll. NFC. 2021-06-28 17:44:46 +01:00
Arnold Schwaighofer
317416bce1 [coro] Fix rematerializable instruction sinking to coro.suspend blocks
There is a constraint that coro.suspend instructions need to be in their
own blocks. The coro split pass initially creates IR that obeys this constraint
(which is later checked). Sinking rematerializable instructions into these
blocks breaks that constraint.

Instead rematerialize in the predecessor block to the suspend's single
predecessor block.

Differential Revision: https://reviews.llvm.org/D104051
2021-06-28 09:37:45 -07:00
LLVM GN Syncbot
8356e90c32 [gn build] Port f32f3db9fcbf 2021-06-28 16:30:29 +00:00
Melanie Blower
423a70f3f3 [llvm][clang][fpenv] Create new intrinsic llvm.arith.fence to control FP optimization at expression level
This intrinsic blocks floating point transformations by the optimizer.

Author: Pengfei

Reviewed By: LuoYuanke, Andy Kaylor, Craig Topper, kpn

Differential Revision: https://reviews.llvm.org/D99675
2021-06-28 12:26:52 -04:00
Jay Foad
b73e1f6d9f [AMDGPU] Use opName instead of PseudoName in VOP2 multiclasses. NFC.
This is just for consistency with all other instruction multiclasses
that pass around pseudo names as arguments.
2021-06-28 16:46:35 +01:00
Nico Weber
0b6bfe0ee6 Revert "[DebugInfo] Enable variadic debug value salvaging"
This reverts commit adace79652174d126be290cab42b3122569fe15d.
Still breaks things, see comment on https://reviews.llvm.org/D91722
2021-06-28 11:25:09 -04:00
David Spickett
276c38fd65 [llvm][ARM] Treat xscale arch as an alias of armv5te
Previously xscale was known to everything apart
from the ELF streamer so we would crash as soon
as you tried to output an object file.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D104776
2021-06-28 15:20:24 +00:00
Florian Hahn
412987a7f5 [BasicAA] Add test to cover GetIndexDifference change in D99424.
Precommit test case for a change to GetIndexDifference in D99424.
2021-06-28 16:03:05 +01:00
Stefan Gränitz
374d6c56df [Orc][examples] Temporarily disable LLJITWithRemoteDebugging build and test
The underlying TargetProcessControl API changes with D104694. Once it landed I can patch and re-enable the example.
2021-06-28 16:54:53 +02:00
Zarko Todorovski
a96f500c09 [AIX] Use less than or equal to for some alignment tests on AIX
On AIX the alignment implementation has the storage aligned to the
preferred alignment instead of the alignment of a type. Macro guard
these tests for AIX and have them pass when the "reference alignment" is
less than or equal to the alignment observed. In other words, the
alignment applied is at least as strict as the required alignment.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D104786
2021-06-28 10:32:32 -04:00
Sander de Smalen
a82143ea32 Reland [GlobalISel] NFC: Have LLT::getSizeInBits/Bytes return a TypeSize.
This patch relands https://reviews.llvm.org/D104454, but fixes some failing
builds on Mac OS which apparently has a different definition for size_t,
that caused 'ambiguous operator overload' for the implicit conversion
of TypeSize to a scalar value.

This reverts commit b732e6c9a8438e5204ac96c8ca76f9b11abf98ff.
2021-06-28 15:24:27 +01:00
Ahsan Saghir
74fd9c1f8e Teach peephole optimizer to not emit sub-register defs
Peephole optimizer should not be introducing sub-reg definitions
as they are illegal in machine SSA phase. This patch modifies
the optimizer to not emit sub-register definitions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D103408
2021-06-28 09:24:07 -05:00
Bradley Smith
04a403319c [AArch64][SVE] DAG combine SETCC_MERGE_ZERO of a SETCC_MERGE_ZERO
This helps remove extra comparisons when generating masks for fixed
length masked operations.

Differential Revision: https://reviews.llvm.org/D104910
2021-06-28 15:06:06 +01:00
Reshabh Sharma
4098645bb0 [InferAddressSpaces] NFC: For noop IntToPtr/PtrToInt pair cast to operator instead of PtrToInt
Compiler crashes at an assertion while casting operands to PtrToIntInst at some cases when
ptrtoint is present as an explicit operand to inttoptr. Explicit instruction operator as
operand can not be casted to an Instruction.

This patch replaces cast from PtrToInst to Operator which are later checked for constant
expressions.

Differential Revision: https://reviews.llvm.org/D105002
2021-06-28 19:24:26 +05:30
Joseph Huber
a3e4541847 [OpenMP][NFC] Fix typo in OpenMPOpt 2021-06-28 09:49:14 -04:00
Ben Shi
20d7ad97af [AVR][test] Add a new test: functions with struct return type
Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D99239
2021-06-28 21:19:26 +08:00
Joseph Huber
ab7e4dfd0f [OpenMP][NFC] Fix missing argument 2021-06-28 09:15:01 -04:00
Brendon Cahoon
16a6bb6581 [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX
Adds legalizer, register bank select, and instruction
select support for G_SBFX and G_UBFX. These opcodes generate
scalar or vector ALU bitfield extract instructions for
AMDGPU. The instructions allow both constant or register
values for the offset and width operands.

The 32-bit scalar version is expanded to a sequence that
combines the offset and width into a single register.

There are no 64-bit vgpr bitfield extract instructions, so the
operations are expanded to a sequence of instructions that
implement the operation. If the width is a constant,
then the 32-bit bitfield extract instructions are used.

Moved the AArch64 specific code for creating G_SBFX to
CombinerHelper.cpp so that it can be used by other targets.
Only bitfield extracts with constant offset and width values
are handled currently.

Differential Revision: https://reviews.llvm.org/D100149
2021-06-28 09:06:44 -04:00
Lucas Prates
b8658b0021 [NFC] Fixing short title underline in release notes file 2021-06-28 13:55:00 +01:00
Joseph Huber
877292e5c5 [OpenMP] Increase attributor iterations on the GPU
Increase the number of attributor iterations on a GPU target. I forgot to
change this in D104416.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D104920
2021-06-28 08:50:49 -04:00
Lucas Prates
e6525ee662 [Aarch64] Adding support for Armv9-A Realm Management Extension
This adds support for Armv9-A's Realm Management Extension, including
three new system registers - MFAR_EL3, GPCCR_EL3 and GPTBR_EL3 - and
four new TLBI instructions.

The reference for the Realm Management Extension can be found at: https://developer.arm.com/documentation/ddi0615/aa.

Based on patches by Victor Campos.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D104773
2021-06-28 13:45:22 +01:00
Lucas Prates
ef8e6f8fcb [NFC] Adding test for clobbering of high registers in Thumb
Prior to the changes from D52010, clobbering Thumb's high registers in
inline asm would cause incorrect code to be generated - or an assertion
failure for debug builds. Now that the issue is no longer reproducible,
this patch adds a MIR test to cover that scenario.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D96335
2021-06-28 13:44:44 +01:00
James Henderson
7ca17cf43a [RFC][debuginfo-test] Rename debug-info lit tests for general purposes
Discussion thread:
https://lists.llvm.org/pipermail/llvm-dev/2021-January/148048.html

Move debuginfo-test into a subdirectory of a new top-level directory,
called cross-project-tests. The new name replaces "debuginfo-test" as an
LLVM project enabled via LLVM_ENABLE_PROJECTS.

Differential Revision: https://reviews.llvm.org/D95339

Reviewed by: aprantl
2021-06-28 11:31:40 +01:00
Kerry McLaughlin
b00f0df573 [LoopVectorize] Fix strict reductions where VF = 1
Currently we will allow loops with a fixed width VF of 1 to vectorize
if the -enable-strict-reductions flag is set. However, the loop vectorizer
will not use ordered reductions if `VF.isScalar()` and the resulting
vectorized loop will be out of order.

This patch removes `VF.isVector()` when checking if ordered reductions
should be used. Also, instead of converting the FAdds to reductions if the
VF = 1, operands of the FAdds are changed such that the order is preserved.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D104533
2021-06-28 11:27:10 +01:00
Florian Hahn
e51ded8676 [VPlan] Merge predicated-triangle regions, after sinking.
Sinking scalar operands into predicated-triangle regions may allow
merging regions. This patch adds a VPlan-to-VPlan transform that tries
to merge predicate-triangle regions after sinking.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D100260
2021-06-28 11:10:38 +01:00
LLVM GN Syncbot
39ed7fe00e [gn build] Port 499e39c5983d 2021-06-28 08:50:56 +00:00
David Green
ba04a35893 [ARM] Add an extra fold for f32 extract(vdup(i32))
This adds another small fold for extract of a vdup, between a i32 and a
f32, converting to a BITCAST. This allows some extra folding to happen,
simplifying the resulting code.

Differential Revision: https://reviews.llvm.org/D104857
2021-06-28 08:54:03 +01:00
Igor Kudrin
098ea8995b [llvm-objdump] Print memory operand addresses as regular comments
The patch reuses the common code to print memory operand addresses as
instruction comments. This helps to align the comments and enables using
target-specific comment markers when `evaluateMemoryOperandAddress()` is
implemented for them.

Differential Revision: https://reviews.llvm.org/D104861
2021-06-28 14:25:22 +07:00
Igor Kudrin
7fb2900382 [llvm-objdump] Prefix memory operand addresses with '0x'
This helps to avoid ambiguity when the address contains only digits 0..9.

Differential Revision: https://reviews.llvm.org/D104909
2021-06-28 14:25:21 +07:00
Igor Kudrin
21a491bfe1 [llvm-objdump] Prevent variable locations to overlap short comments
For now, the source variable locations are printed at about the same
space as the comments for disassembled code, which can make some ranges
for variables disappear if a line contains comments, for example:

                                        ┠─ bar = W1
0:  add x0, x2, #2, lsl #12     // =8192┃
4:  add z31.d, z31.d, #65280    // =0xff00
8:  nop                                 ┻

The patch shifts the report a bit to allow printing comments up to
approximately 16 characters without interferences.

Differential Revision: https://reviews.llvm.org/D104700
2021-06-28 14:25:21 +07:00
Igor Kudrin
485c1c4224 [llvm-objdump] Print comments for the disassembled code
LLVM disassembler can generate comments for disassembled instructions.
The patch enables printing these comments for 'llvm-objdump -d'.

Differential Revision: https://reviews.llvm.org/D104699
2021-06-28 14:25:20 +07:00
Min-Yih Hsu
442739c347 Revert "[M68k][GloballSel] Formal arguments lowering in IRTranslator"
This reverts commit 8f43407a07f015ca9a7543c6a0b5bde3918f9a0e due to
failure on its associated test.
2021-06-27 23:22:40 -07:00
Max Kazantsev
ad9ada53fc Revert "[Test] Add XFAIL test for PR50918"
This reverts commit af03f7fb37bf13ed923f893182fd4e2f6c40bfd2.

Looks like the test is passing in some architectures. Reverting to green.
2021-06-28 12:56:13 +07:00
Max Kazantsev
d54dee271f [LSR][NFC] Make sure that after the canonicalization the formula is canonical 2021-06-28 12:50:04 +07:00
Max Kazantsev
f7c5e98dde [Test] Add XFAIL test for PR50918 2021-06-28 12:22:27 +07:00
Max Kazantsev
61451667fe [LoopDeletion] Benefit from branches by undef conditions when symbolically executing 1st iteration
We can exploit branches by `undef` condition. Frankly, the LangRef says that
such branches are UB, so we can assume that all outgoing edges of such blocks
are dead.

However, from practical perspective, we know that this is not supported correctly
in some other places. So we are being conservative about it.

Branch by undef is treated in the following way:
- If it is a loop-exiting branch, we always assume it exits the loop;
- If not, we arbitrarily assume it takes `true` value.

Differential Revision: https://reviews.llvm.org/D104689
Reviewed By: nikic
2021-06-28 11:39:46 +07:00
Sushma Unnibhavi
d5c32f1a56 [M68k][GloballSel] Formal arguments lowering in IRTranslator
Implementation of formal arguments lowering in the IRTranslator for the
M68k backend

Differential Revision: https://reviews.llvm.org/D104542
2021-06-27 16:13:05 -07:00
David Blaikie
a39a37f176 PR50708: Update link to Intel SIMD ABI 2021-06-27 14:55:08 -07:00
David Blaikie
dfefcbf53b PR37255: DebugInfo: LTO with -g inlined into -gmlt combined with Split DWARF without CU cross-references
A combination of features ^ that lead to a mismatch of expectations
about how a subprogram definition DIE would be produced with/without a
declaration when taking full -g debug info and inlining it into a -gmlt
CU - specifically when using Split DWARF that doesn't support cross-CU
references, so we have to put the -g debug info into the -gmlt CU, which
gets confusing about which mode is respected.

This patch comes down on respecting the CU the debug info is emitted
into, rather than preserving the full debug info when it's emitted into
the gmlt CU.
2021-06-27 14:40:38 -07:00
Craig Topper
1d784e01f0 [RISCV] Add tests for __builtin_parity idiom.
We use (and (ctpop X), 1) to represent parity.

The generated code for i32 parity on RV64 has more instructions than
necessary which I hope to improve in a followup patch.

Also add missing test for i64 ctpop.
2021-06-27 12:37:29 -07:00
Nathan Chancellor
a772deb8d1 [BitCode] Add noprofile to getAttrFromCode()
After D104475 / D104658, building the Linux kernel with ThinLTO is
broken:

ld.lld: error: Unknown attribute kind (73) (Producer: 'LLVM13.0.0git'
Reader: 'LLVM 13.0.0git')

getAttrFromCode() has never handled this attribute so it is written
during the ThinLTO phase but it cannot be handled during the linking
phase.

Add noprofile to getAttrFromCode() so that disassembly works properly.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D104995
2021-06-27 11:59:57 -07:00
Nikita Popov
535711de53 [DSE] Preserve address space
Preserve address space when inserting i8* cast.
2021-06-27 20:26:00 +02:00
Nikita Popov
dad5c40176 [MemCpyOpt] Preserve address space
Preserve address space when generating the cast to i8*.
2021-06-27 20:21:19 +02:00