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Commit Graph

136832 Commits

Author SHA1 Message Date
Reid Kleckner
9bc82c817c Fix an instance of -Wmicrosoft-enum-value by making the enum unsigned
llvm-svn: 278843
2016-08-16 20:22:49 +00:00
Haicheng Wu
7d1f02939c [BranchFolding] Change a test case of r278575.
Rename the operands to make the test less brittle.

llvm-svn: 278841
2016-08-16 20:06:25 +00:00
Sjoerd Meijer
c1bf9f4889 [MBP] do not reorder and move up loop latch block
Do not reorder and move up a loop latch block before a loop header
when optimising for size because this will generate an extra 
unconditional branch.

Differential Revision: https://reviews.llvm.org/D22521

llvm-svn: 278840
2016-08-16 19:50:33 +00:00
Kostya Serebryany
8a3b057601 [libFuzzer] new experimental feature: value profiling. Profiles values that affect control flow and treats new values as new coverage.
llvm-svn: 278839
2016-08-16 19:33:51 +00:00
Benjamin Kramer
e89e3eda62 Remove excessive padding from LineNoCacheTy
The struct LineNoCacheTy is in SourceMgr.cpp inside anonymous namespace.
This diff changes the order of fields and removes the excessive padding
(8 bytes).

Patch by Alexander Shaposhnikov!

Differential revision: https://reviews.llvm.org/D23546

llvm-svn: 278838
2016-08-16 19:20:10 +00:00
David Majnemer
b52c8324a5 Make MDNode::intersect faster than O(n * m)
It is pretty easy to get it down to O(nlogn + mlogm).  This
implementation has the added benefit of automatically deduplicating
entries between the two sets.

llvm-svn: 278837
2016-08-16 18:48:37 +00:00
David Majnemer
eb18f1195e Don't passively concatenate MDNodes
I have audited all the callers of concatenate and none require duplicate
entries to service concatenation.
These duplicates serve no purpose but to needlessly embiggen the IR.

N.B. Layering getMostGenericAliasScope on top of concatenate makes it
O(nlogn + mlogm) instead of O(n*m).

llvm-svn: 278836
2016-08-16 18:48:34 +00:00
Krzysztof Parzyszek
783dba3ca3 [Hexagon] Standardize next batch of pseudo instructions
ALIGNA          PS_aligna
ALLOCA          PS_alloca
TFR_FI          PS_fi
TFR_FIA         PS_fia
TFR_PdFalse     PS_false
TFR_PdTrue      PS_true
VMULW           PS_vmulw
VMULW_ACC       PS_vmulw_acc

llvm-svn: 278832
2016-08-16 18:08:40 +00:00
Gor Nishanov
906e6267f2 [Coroutines] Part 7: Split coroutine into subfunctions
Summary:
This patch adds simple coroutine splitting logic to CoroSplit pass.

Documentation and overview is here: http://llvm.org/docs/Coroutines.html.

Upstreaming sequence (rough plan)
1.Add documentation. (https://reviews.llvm.org/D22603)
2.Add coroutine intrinsics. (https://reviews.llvm.org/D22659)
...
7. Split coroutine into subfunctions <= we are here
8. Coroutine Frame Building algorithm
9. Handle coroutine with unwinds
10+. The rest of the logic

Reviewers: majnemer

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23461

llvm-svn: 278830
2016-08-16 18:04:14 +00:00
Sanjay Patel
acac95736d [InstCombine] add helper functions for foldICmpWithConstant; NFCI
Besides breaking up a 700 line function to improve readability,
this sinks the 'FIXME: ConstantInt' check into each helper. So 
now we can independently break that restriction within any of the
helper functions.

As much as possible, the code was only {cut/paste/clang-format}'ed 
to minimize risk (no functional changes intended), so several more
readability improvements are still possible. 

llvm-svn: 278828
2016-08-16 17:54:36 +00:00
Kostya Serebryany
91340fc197 [libFuzzer] refactoring around PCMap, NFC
llvm-svn: 278825
2016-08-16 17:37:13 +00:00
Simon Dardis
f1fa2f71c5 [mips] Enforce compact branch restrictions
Check both operands for use of the $zero register which cannot be used with
a compact branch instruction.

Reviewers: dsanders, vkalintris

Differential Review: https://reviews.llvm.org/D23547

llvm-svn: 278824
2016-08-16 17:16:11 +00:00
Krzysztof Parzyszek
6fb31c961d [Hexagon] Clean up some miscellaneous V60 intrinsics a bit
llvm-svn: 278823
2016-08-16 17:14:44 +00:00
Wolfgang Pieb
8cea807f1d When the inline spiller rematerializes an instruction, take the debug location from the instruction
that immediately follows the rematerialization point.

Patch by Andrea DiBiagio.

Differential Revision: http://reviews.llvm.org/D23539

llvm-svn: 278822
2016-08-16 17:12:50 +00:00
Wei Mi
08cbe18a2f Remove a stale comment from the test, NFC.
llvm-svn: 278821
2016-08-16 16:57:15 +00:00
Vitaly Buka
1717512ef3 [Asan] Unpoison red zones even if use-after-scope was disabled with runtime flag
Summary: PR27453

Reviewers: eugenis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23481

llvm-svn: 278818
2016-08-16 16:24:10 +00:00
Sanjay Patel
7011ae6fd0 [InstCombine] use m_APInt in foldICmpWithConstant; NFCI
There's some formatting and pointer deref ugliness here that I intend to fix in
subsequent patches. The overall goal is to refactor the obnoxiously long switch
and incrementally remove the restriction to scalar types (allow folds for vector
splats). This patch introduces the use of m_APInt which means the RHSV reference
is now a pointer (and may have matched a vector splat), but the check of 'RHS' 
remains, so vector folds are disallowed and no functional change is intended.

llvm-svn: 278816
2016-08-16 16:08:11 +00:00
Krzysztof Parzyszek
a6cf33945d [Hexagon] Standardize vector predicate load/store pseudo instructions
- Remove unused instructions: LDriq_pred_vec_V6, STriq_pred_vec_V6, and
  the 128B counterparts.
- Rename:
    LDriq_pred_V6         PS_vloadrq_ai
    LDriq_pred_V6_128B    PS_vloadrq_ai_128B
    STriq_pred_V6         PS_vstorerq_ai
    STriq_pred_V6_128B    PS_vstorerq_ai_128B

llvm-svn: 278813
2016-08-16 15:43:54 +00:00
Ahmed Bougacha
fbb0e97f1d [AArch64][GlobalISel] Select G_MUL.
llvm-svn: 278810
2016-08-16 14:37:46 +00:00
Ahmed Bougacha
d4da41f2e4 [GlobalISel] Fix G_MUL comment. NFC.
llvm-svn: 278809
2016-08-16 14:37:43 +00:00
Ahmed Bougacha
4f60cd1302 [AArch64][GlobalISel] Factor out unsupported binop check. NFC.
We're going to need it for G_MUL, and, if other targets end up using
something similar, we can easily put it in the generic selector.

llvm-svn: 278808
2016-08-16 14:37:40 +00:00
David Callahan
48aa68965f [ADCE] Modify data structures to support removing control flow
Summary:
This is part of a serious of patches to evolve ADCE.cpp to support
removing of unnecessary control flow.

This patch changes the data structures to hold liveness information to
support the additional information we will eventually need. In
particular we now have a notion of basic blocks being live because
they contain a live operations. This will eventually feed into control
dependence analysis of which branches are live. We cater to getting
from instructions to associated block information and from blocks to
information about their terminators.

This patch also changes the structure of the main loop of the
algorithm so that it alternates propagating liveness between
instructions and usign control dependence information to mark branches
live.

We force all terminators live for now until we add code to handlinge
removing control flow in a later patch.

No changes to effective behavior with this patch

Previous patches:

D23065 [ADCE] Refactor anticipating new functionality (NFC)
D23102 [ADCE] Refactoring for new functionality (NFC)

Reviewers: nadav, majnemer, mehdi_amini

Subscribers: freik, twoh, llvm-commits

Differential Revision: https://reviews.llvm.org/D23225

llvm-svn: 278807
2016-08-16 14:31:51 +00:00
Brendon Cahoon
17a7582d1f [Pipeliner] Fix an asssert due to invalid Phi in the epilog
The pipeliner was generating an invalid Phi name for an operand
in the epilog block, which caused an assert in the live variable
analysis pass. The fix is to the code that generates new Phis
in the epilog block. In this case, there is an existing Phi that
needs to be reused rather than creating a new Phi instruction.

Differential Revision: https://reviews.llvm.org/D23513

llvm-svn: 278805
2016-08-16 14:29:24 +00:00
Ahmed Bougacha
29635e3f55 [AArch64][GlobalISel] Select (variable) shifts.
For now, no support for immediates.

llvm-svn: 278804
2016-08-16 14:02:47 +00:00
Ahmed Bougacha
9abfe90706 [AArch64][GlobalISel] Robustize select tests. NFC.
Using the same register means nothing was checking for operand order.

llvm-svn: 278803
2016-08-16 14:02:44 +00:00
Ahmed Bougacha
c8ea56c27b [AArch64][GlobalISel] Select p0 G_FRAME_INDEX.
And mark it as legal.

llvm-svn: 278802
2016-08-16 14:02:42 +00:00
Ahmed Bougacha
f91d5ffccf [GlobalISel] Mention pointers in LowLevelType.h. NFC.
llvm-svn: 278801
2016-08-16 14:02:36 +00:00
Pierre Gousseau
0c64f65785 [x86] Refactor a PowerPC specific ctlz/srl transformation (NFC).
Following the discussion on D22038, this refactors a PowerPC specific setcc -> srl(ctlz) transformation so it can be used by other targets.

Differential Revision: https://reviews.llvm.org/D23445

llvm-svn: 278799
2016-08-16 13:53:53 +00:00
Simon Pilgrim
3a21f702b3 [X86][AVX] Fixed typo in zero element insertion
llvm-svn: 278798
2016-08-16 13:33:33 +00:00
Ron Lieberman
3fdb0d769a [Hexagon] Improve test to check for @PCREL, only run llc, not opt -> llc.
llvm-svn: 278796
2016-08-16 13:10:09 +00:00
Sagar Thakur
437773c9f5 [MemorySanitizer] [MIPS] Changed memory mapping to support pie executable.
Reviewed by eugenis
Differential: D22994

llvm-svn: 278795
2016-08-16 12:55:38 +00:00
Simon Pilgrim
12daf7514a [X86][SSE] Add support for combining v2f64 target shuffles to VZEXT_MOVL byte rotations
The combine was only matching v2i64 as it assumed lowering to MOVQ - but we have v2f64 patterns that match in a similar fashion

llvm-svn: 278794
2016-08-16 12:52:06 +00:00
Simon Pilgrim
9a388e0746 [X86][AVX512BW] Updated tests to demonstrate AVX512BW's inability to vectorize v64i8 shifts
llvm-svn: 278790
2016-08-16 11:05:47 +00:00
Prakhar Bahuguna
7f12177e67 Correct the upper bound for a CBZ/CBNZ branch target.
Summary:
Fix for the upper bound check that was causing a build failure.

Reviewers: olista01, rengolin, t.p.northover

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23501

llvm-svn: 278789
2016-08-16 10:41:56 +00:00
Prakhar Bahuguna
dd92c8356c [Thumb] Validate branch target for CBZ/CBNZ instructions.
Summary:
The assembler currently does not check the branch target for CBZ/CBNZ
instructions, which only permit branching forwards with a positive offset. This
adds validation for the branch target to ensure negative PC-relative offsets are
not encoded into the instruction, whether specified as a literal or as an
assembler symbol.

Reviewers: rengolin, t.p.northover

Subscribers: llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D23312

llvm-svn: 278788
2016-08-16 10:41:52 +00:00
Simon Pilgrim
c42f8e8f83 [X86][SSE] Add support for combining target shuffles to PALIGNR byte rotations
llvm-svn: 278787
2016-08-16 10:03:23 +00:00
Job Noorman
5f186ceb0a [AVR] Fix compile errors
Differential Revision: https://reviews.llvm.org/D23450

llvm-svn: 278784
2016-08-16 08:41:35 +00:00
Guy Blank
6b866e2b9c [X86] Add xgetbv/xsetbv intrinsics to non-windows platforms
Differential Revision: https://reviews.llvm.org/D21958

llvm-svn: 278782
2016-08-16 06:41:00 +00:00
David Majnemer
4ca4b42bf0 [InstSimplify] Fold gep (gep V, C), (xor V, -1) to C-1
llvm-svn: 278779
2016-08-16 06:13:46 +00:00
Mehdi Amini
d3333b5982 FunctionImport: missed one occurence of ImportListForModule to rename (NFC)
llvm-svn: 278778
2016-08-16 05:49:12 +00:00
Mehdi Amini
65de1fabe6 FunctionImport: rename ImportsForModule to ImportList for consistency (NFC)
llvm-svn: 278777
2016-08-16 05:47:12 +00:00
Mehdi Amini
87829dabc8 [LTO] Simplify APIs and constify (NFC)
Summary:
Multiple APIs were taking a StringMap for the ImportLists containing
the entries for for all the modules while operating on a single entry
for the current module. Instead we can pass the desired ModuleImport
directly. Also some of the APIs were not const, I believe just to be
able to use operator[] on the StringMap.

Reviewers: tejohnson

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23537

llvm-svn: 278776
2016-08-16 05:46:05 +00:00
Sanjay Patel
8812bdbcf4 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278768
2016-08-16 00:48:38 +00:00
Mehdi Amini
e4d1ed48d7 [LTO] Rename variables with meaningul names, i.e. more than one character (NFC)
llvm-svn: 278766
2016-08-16 00:44:46 +00:00
Sanjay Patel
51d59ac664 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278765
2016-08-16 00:27:12 +00:00
Reid Kleckner
08aa2ebc19 [AMDGPU] Give enum an explicit 64-bit type to fix MSVC 2013 failures
Recall that MSVC always gives enums the type 'int', nothing else.  MSVC
2015 does not appear to have this problem anymore.

Clang-cl -Wmicrosoft-enum-value flags this, FWIW, so now I have a true
positive for my warning. :)

llvm-svn: 278762
2016-08-15 23:54:44 +00:00
Teresa Johnson
5f3335a592 [ThinLTO] Fix temp file dumping, enable via llvm-lto and test it
Summary:
Fixed a bug in ThinLTOCodeGenerator's temp file dumping. The Twine
needs to be passed directly as an argument, or a copy saved into a
std::string.

It doesn't seem there are any consumers of this, so I added a new option
to llvm-lto to enable saving of temp files during ThinLTO, and augmented
a test to use it to check post-import but pre-opt bitcode.

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23525

llvm-svn: 278761
2016-08-15 23:24:57 +00:00
Reid Kleckner
07d8b8d360 Don't use %llc_dwarf with -mtriple, they don't combine
llvm-svn: 278758
2016-08-15 22:54:26 +00:00
Sanjay Patel
e77fd8052f [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278757
2016-08-15 22:43:52 +00:00
Justin Bogner
ffbde92613 Linker: Avoid some ridiculous indentation by using a temporary. NFC
This was indented really awkwardly, and clang-format didn't seem to
know how to do any better. Avoid the issue with a temporary variable.

llvm-svn: 278756
2016-08-15 22:41:42 +00:00