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Commit Graph

54121 Commits

Author SHA1 Message Date
Craig Topper
f9811e8f28 Tidy up by removing some 'else' after 'return'
llvm-svn: 155336
2012-04-23 06:57:04 +00:00
Craig Topper
c315e7b6db Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen.
llvm-svn: 155333
2012-04-23 06:38:28 +00:00
Craig Topper
f27c3223f7 Add a couple llvm_unreachables.
llvm-svn: 155332
2012-04-23 03:42:40 +00:00
Craig Topper
6c6ee67efe Remove some tab characers.
llvm-svn: 155331
2012-04-23 03:28:34 +00:00
Craig Topper
16829bb004 Remove some 'else' after 'return'. No functional change.
llvm-svn: 155330
2012-04-23 03:26:18 +00:00
Chris Lattner
4c6722a8a7 Don't die with an assertion if the Result bitwidth is already correct. This
fixes an assert reading "1239123123123123" when the result is already 64-bit.

llvm-svn: 155329
2012-04-23 00:27:54 +00:00
Bill Wendling
0f9f58c75a Cleanup whitespace.
llvm-svn: 155328
2012-04-23 00:23:33 +00:00
Bill Wendling
2b77fec649 Limit the number of times we recurse through this algorithm. All of the
intructions are processed. So there's no need to look at them if they're used as
operands of other instructions.

llvm-svn: 155327
2012-04-23 00:22:55 +00:00
Craig Topper
2dedfa7805 Make Extract128BitVector and Insert128BitVector take an unsigned instead of an ConstantNode SDValue. getConstant was almost always called just before only to have the functions take it apart and build a new ConstantSDNode.
llvm-svn: 155325
2012-04-22 20:55:18 +00:00
Craig Topper
5669044c57 Convert getNode(UNDEF) to getUNDEF.
llvm-svn: 155321
2012-04-22 19:29:34 +00:00
Craig Topper
a9994377f2 Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to getUNDEF instead of requerying. Use &Mask[0] instead of Mask.data().
llvm-svn: 155320
2012-04-22 19:17:57 +00:00
Craig Topper
5c4c8b1f81 Tidy up. 80 columns and argument alignment.
llvm-svn: 155319
2012-04-22 18:51:37 +00:00
Craig Topper
58aeb7b7c3 Simplify code by converting multiple places that were manually concatenating 128-bit vectors to use either CONCAT_VECTORS or a helper function. CONCAT_VECTORS will itself be lowered to the same pattern as before. The helper function is needed for concats of BUILD_VECTORs since getNode(CONCAT_VECTORS) will just return a large BUILD_VECTOR and we may be trying to lower large BUILD_VECTORS when this occurs.
llvm-svn: 155318
2012-04-22 18:15:59 +00:00
Benjamin Kramer
76a9040c03 ARM: Initialize the HasRAS bit.
Found by valgrind.

llvm-svn: 155313
2012-04-22 11:52:41 +00:00
Elena Demikhovsky
35721fc4f8 ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2
llvm-svn: 155309
2012-04-22 09:39:03 +00:00
Bill Wendling
86e03eac0d Remove some potential warnings about variables used uninitialized.
llvm-svn: 155307
2012-04-22 07:23:04 +00:00
Bill Wendling
8d86028029 Add a flag to the struct type finder to collect only those types which have
names. This saves collecting types we normally don't care about.

llvm-svn: 155300
2012-04-21 23:59:16 +00:00
Chris Lattner
d6dfc5dfbc No need for "else if" after a return. Autosense "0o123" as octal in
StringRef::getAsInteger

llvm-svn: 155298
2012-04-21 22:03:05 +00:00
Nadav Rotem
97bbbe3368 Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors.
llvm-svn: 155296
2012-04-21 20:08:32 +00:00
Craig Topper
96407e19f5 Make some fixed arrays const. Use array_lengthof in a couple places instead of a hardcoded number.
llvm-svn: 155294
2012-04-21 18:58:38 +00:00
Craig Topper
2a70ca9377 Tidy up. 80 columns and some other spacing issues.
llvm-svn: 155291
2012-04-21 18:13:35 +00:00
NAKAMURA Takumi
a5df77be2f llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build on MSVC.
Thanks to Andy Gibbs, to report the issue.

llvm-svn: 155287
2012-04-21 15:31:45 +00:00
NAKAMURA Takumi
8de1f2e9c7 HexagonISelLowering.cpp: Reorder #includes.
llvm-svn: 155286
2012-04-21 15:31:36 +00:00
Nuno Lopes
2abd7ffa22 move Signals to .rodata
llvm-svn: 155283
2012-04-21 14:45:37 +00:00
NAKAMURA Takumi
64df5a26b4 HexagonInstPrinter.cpp: Suppress -Wunused-variable warnings with -Asserts.
llvm-svn: 155281
2012-04-21 11:24:55 +00:00
Benjamin Kramer
c685340181 YAMLParser: silence warning about tautological comparison on unsigned-char platforms.
No functionality change.

llvm-svn: 155280
2012-04-21 10:51:42 +00:00
Jim Grosbach
ba84724346 ARM: tblgen'erate more NEON two-operand aliases.
VMUL and VEXT.

llvm-svn: 155258
2012-04-20 23:46:33 +00:00
Jakob Stoklund Olesen
adfc8212cf Fix PR12599.
The X86 target is editing the selection DAG while isel is selecting
nodes following a topological ordering. When the DAG hacking triggers
CSE, nodes can be deleted and bad things happen.

llvm-svn: 155257
2012-04-20 23:36:09 +00:00
Jim Grosbach
5329904457 ARM: tblgen'erate more NEON two-operand aliases.
llvm-svn: 155254
2012-04-20 23:30:14 +00:00
Bill Wendling
be493e63ea Revert r155241, which is causing some breakage.
llvm-svn: 155253
2012-04-20 23:11:38 +00:00
Jakob Stoklund Olesen
21b2b2d965 Make ISelPosition a local variable.
Now that multiple DAGUpdateListeners can be active at the same time,
ISelPosition can become a local variable in DoInstructionSelection.

We simply register an ISelUpdater with CurDAG while ISelPosition exists.

llvm-svn: 155249
2012-04-20 22:08:50 +00:00
Jakob Stoklund Olesen
1947930692 Register DAGUpdateListeners with SelectionDAG.
Instead of passing listener pointers to RAUW, let SelectionDAG itself
keep a linked list of interested listeners.

This makes it possible to have multiple listeners active at once, like
RAUWUpdateListener was already doing. It also makes it possible to
register listeners up the call stack without controlling all RAUW calls
below.

DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG
list of active listeners.

llvm-svn: 155248
2012-04-20 22:08:46 +00:00
Bill Wendling
bb9c301c28 If we discover all of the named structs in a module, then don't bother to
process any more Values.

llvm-svn: 155241
2012-04-20 21:56:24 +00:00
Jakob Stoklund Olesen
e93e6ab7f6 Print <def,read-undef> to avoid confusion.
The <undef> flag on a def operand only applies to partial register
redefinitions. Only print the flag when relevant, and print it as
<def,read-undef> to make it clearer what it means.

llvm-svn: 155239
2012-04-20 21:45:33 +00:00
Andrew Trick
6e57806ea9 New and improved comment.
llvm-svn: 155229
2012-04-20 20:24:33 +00:00
Andrew Trick
56264ae675 SparseSet: Add support for key-derived indexes and arbitrary key types.
This nicely handles the most common case of virtual register sets, but
also handles anticipated cases where we will map pointers to IDs.

The goal is not to develop a completely generic SparseSet
template. Instead we want to handle the expected uses within llvm
without any template antics in the client code. I'm adding a bit of
template nastiness here, and some assumption about expected usage in
order to make the client code very clean.

The expected common uses cases I'm designing for:
- integer keys that need to be reindexed, and may map to additional
  data
- densely numbered objects where we want pointer keys because no
  number->object map exists.

llvm-svn: 155227
2012-04-20 20:05:28 +00:00
Andrew Trick
2e8365f6d2 misched: initialize BB
llvm-svn: 155226
2012-04-20 20:05:21 +00:00
Jim Grosbach
e33d0c7063 ARM: Update NEON assembly two-operand aliases.
Use the new TwoOperandAliasConstraint to handle lots of the two-operand aliases
for NEON instructions. There's still more to go, but this is a good chunk of
them.

llvm-svn: 155210
2012-04-20 18:12:54 +00:00
Gabor Greif
f1b29d4778 effectively back out my last change (r155190)
llvm-svn: 155195
2012-04-20 11:41:38 +00:00
Gabor Greif
42a6b79fea fix obviously bogus (IMO) operand index of the load in asserts
(load only has one operand) and smuggle in some whitespace changes too

NB: I am obviously testing the water here, and believe that the unguarded
    cast is still wrong, but why is the getZExtValue of the load's operand
    tested against zero here? Any review is appreciated.
llvm-svn: 155190
2012-04-20 08:58:49 +00:00
Craig Topper
90d95a9142 Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
llvm-svn: 155188
2012-04-20 07:30:17 +00:00
Craig Topper
a0bf6c3af3 Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
llvm-svn: 155186
2012-04-20 06:31:50 +00:00
Jakob Stoklund Olesen
3d22f26e88 Revert r155136 "Defer some shl transforms to DAGCombine."
While the patch was perfect and defect free, it exposed a really nasty
bug in X86 SelectionDAG that caused an llc crash when compiling lencod.

I'll put the patch back in after fixing the SelectionDAG problem.

llvm-svn: 155181
2012-04-20 00:38:45 +00:00
Jim Grosbach
c935649d5c ARM some VFP tblgen'erated two-operand aliases.
llvm-svn: 155178
2012-04-20 00:15:00 +00:00
Jim Grosbach
38a7540e4f ARM let TableGen handle a few two-operand aliases.
No need for these explicit aliases anymore. Nuke 'em.

llvm-svn: 155173
2012-04-19 23:59:26 +00:00
Bill Wendling
fd7c52fe58 Put this expensive check below the less expensive ones.
llvm-svn: 155166
2012-04-19 23:31:07 +00:00
Dan Gohman
f4472e9a1f Avoid a bug in the path count computation, preventing an infinite
loop repeatedlt making the same change. This is for rdar://11256239.

llvm-svn: 155160
2012-04-19 21:50:46 +00:00
Jakob Stoklund Olesen
1507d20c57 Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.

Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.

These transformations are deferred:

  (X >>? C) << C   --> X & (-1 << C)  (When X >> C has multiple uses)
  (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2)   (When C2 > C1)
  (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2)  (When C1 > C2)

The corresponding exact transformations are preserved, just like
div-exact + mul:

  (X >>?,exact C) << C   --> X
  (X >>?,exact C1) << C2 --> X << (C2-C1)
  (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)

The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.

llvm-svn: 155136
2012-04-19 16:46:26 +00:00
Gabor Greif
fbd5c515a0 zap tabs
llvm-svn: 155128
2012-04-19 15:16:31 +00:00
Andrew Trick
93005d8a61 Allow targets to select the default scheduler by name.
llvm-svn: 155090
2012-04-19 01:34:10 +00:00
Kevin Enderby
7d41dd85c3 Fixed the llvm-mv X86 disassembler so the 'C' API gets jumps properly
symbolicated.  These have and operand type of TYPE_RELv which was not handled
as isBranch in translateImmediate() in X86Disassembler.cpp.  rdar://11268426 

llvm-svn: 155074
2012-04-18 23:12:11 +00:00
Dan Gohman
a99c119e05 Don't crash on code where the user put __attribute__((constructor)) on
a function with arguments. This fixes rdar://11265785.

llvm-svn: 155073
2012-04-18 22:24:33 +00:00
Chandler Carruth
090e90a242 This reverts a long string of commits to the Hexagon backend. These
commits have had several major issues pointed out in review, and those
issues are not being addressed in a timely fashion. Furthermore, this
was all committed leading up to the v3.1 branch, and we don't need piles
of code with outstanding issues in the branch.

It is possible that not all of these commits were necessary to revert to
get us back to a green state, but I'm going to let the Hexagon
maintainer sort that out. They can recommit, in order, after addressing
the feedback.

Reverted commits, with some notes:

Primary commit r154616: HexagonPacketizer
  - There are lots of review comments here. This is the primary reason
    for reverting. In particular, it introduced large amount of warnings
    due to a bad construct in tablegen.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154622: CMake fixes
    - r154660: Fix numerous build warnings in release builds.
  - Please don't resubmit this until the three commits above are
    included, and the issues in review addressed.

Primary commit r154695: Pass to replace transfer/copy ...
  - Reverted to minimize merge conflicts. I'm not aware of specific
    issues with this patch.

Primary commit r154703: New Value Jump.
  - Primarily reverted due to merge conflicts.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154703: Remove iostream usage
    - r154758: Fix CMake builds
    - r154759: Fix build warnings in release builds
  - Please incorporate these fixes and and review feedback before
    resubmitting.

Primary commit r154829: Hexagon V5 (floating point) support.
  - Primarily reverted due to merge conflicts.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154841: Remove unused variable (fixing build warnings)

There are also accompanying Clang commits that will be reverted for
consistency.

llvm-svn: 155047
2012-04-18 21:31:19 +00:00
Pete Cooper
d839376c4b LiveIntervalUpdate validators weren't recorded after the calls to std::for_each. Turns out std::for_each doesn't update the variable passed in for the functor but instead copy constructs a new one.
llvm-svn: 155041
2012-04-18 20:29:17 +00:00
Benjamin Kramer
a6185ae07f SourceMgr: Colorize diagnostics.
Same color scheme as clang uses. The colors are only enabled if the output is a tty.

llvm-svn: 155035
2012-04-18 19:04:15 +00:00
Akira Hatanaka
04ae6ce257 Mark instruction classes ArithLogicR, ArithLogicI and LoadUpper as isRematerializable.
llvm-svn: 155031
2012-04-18 18:52:10 +00:00
Akira Hatanaka
bf0ed70c91 Delete blank line.
llvm-svn: 155030
2012-04-18 18:47:17 +00:00
Jim Grosbach
4a25fa4ea9 Fix copy/paste-o.
llvm-svn: 155016
2012-04-18 18:09:53 +00:00
Jim Grosbach
33eec19f56 TableGen add warning diagnostic helper functions.
llvm-svn: 155012
2012-04-18 17:46:31 +00:00
Silviu Baranga
f810ee56fb Added support for disassembling unpredictable swp/swpb ARM instructions.
llvm-svn: 155004
2012-04-18 14:18:57 +00:00
Silviu Baranga
2bbf74b42f Fix the bahavior of the disassembler when decoding unpredictable mrs instructions on ARM. Now the diasassembler emmits warnings instead of errors.
llvm-svn: 155002
2012-04-18 14:09:07 +00:00
Silviu Baranga
82d7afd0d2 Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them.
llvm-svn: 155001
2012-04-18 13:12:50 +00:00
Silviu Baranga
8e0ebc8ed7 Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocessor number was removed for this instruction.
llvm-svn: 155000
2012-04-18 13:02:55 +00:00
Silviu Baranga
2ab693789b Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instructions in the disassembler.
llvm-svn: 154999
2012-04-18 12:48:43 +00:00
Benjamin Kramer
ffa121d1ea SmallPtrSet: Reuse DenseMapInfo's pointer hash function instead of inventing a bad one ourselves.
DenseMap's hash function uses slightly more entropy and reduces hash collisions
significantly.  I also experimented with Hashing.h, but it didn't gave a lot of
improvement while being much more expensive to compute.

llvm-svn: 154996
2012-04-18 10:37:32 +00:00
Bill Wendling
c37741ca5a Use a heavy hammer to fix PR12573.
If the loop contains invoke instructions, whose unwind edge escapes the loop,
then don't try to unswitch the loop. Doing so may cause the unwind edge to be
split, which not only is non-trivial but doesn't preserve loop simplify
information.

Fixes PR12573

llvm-svn: 154987
2012-04-18 06:00:09 +00:00
Craig Topper
7c784d86eb Remove AVX vpermil intrinsics. I removed their uses from clang headers and builtins a while back.
llvm-svn: 154985
2012-04-18 05:24:00 +00:00
Andrew Trick
a5981a21f9 loop-reduce: Add an early bailout to catch extremely large loops.
This introduces a threshold of 200 IV Users, which is very
conservative but should be sufficient to avoid serious compile time
sink or stack overflow. The llvm test-suite with LTO never exceeds 190
users per loop.

The bug doesn't relate to a specific type of loop. Checking in an
arbitrary giant loop as a unit test would be silly.

Fixes rdar://11262507.

llvm-svn: 154983
2012-04-18 04:00:10 +00:00
Seth Cantrell
ab055545e1 fix error check in assert
llvm-svn: 154971
2012-04-18 00:40:23 +00:00
David Blaikie
8cb1bde617 C++ has newlines at the end of files (including include files).
llvm-svn: 154962
2012-04-17 23:46:51 +00:00
Joe Groff
cc9c07aacc fix pr12559: mark unavailable win32 math libcalls
also fix SimplifyLibCalls to use TLI rather than compile-time conditionals to enable optimizations on floor, ceil, round, rint, and nearbyint

llvm-svn: 154960
2012-04-17 23:05:54 +00:00
Joel Jones
73aa4ce484 Fixes a problem in instruction selection with testing whether or not the
transformation:

(X op C1) ^ C2 --> (X op C1) & ~C2 iff (C1&C2) == C2

should be done.  

This change has been tested:
 Using a debug+asserts build:
   on the specific test case that brought this bug to light
   make check-all
   lnt nt
   using this clang to build a release version of clang
 Using the release+asserts clang-with-clang build:
   on the specific test case that brought this bug to light
   make check-all
   lnt nt

Checking in because Evan wants it checked in.  Test case forthcoming after
scrubbing.

llvm-svn: 154955
2012-04-17 22:23:10 +00:00
Chad Rosier
0f345d4c3a Typo.
llvm-svn: 154953
2012-04-17 21:48:36 +00:00
Danil Malyshev
8b77bb6238 Fix incorrect call of resolveRelocation() for ARM ELF stub relocations.
llvm-svn: 154948
2012-04-17 20:10:16 +00:00
Seth Cantrell
1cc53344a6 platform support for counting column widths and checking isprint
llvm-svn: 154944
2012-04-17 20:03:03 +00:00
Akira Hatanaka
9389bddb8c Delete latter half of CMakeLists.txt.
llvm-svn: 154936
2012-04-17 18:18:09 +00:00
Akira Hatanaka
ecb1cd1ce4 Add disassembler to MIPS.
Patch by Vladimir Medic. 

llvm-svn: 154935
2012-04-17 18:03:21 +00:00
Manuel Klimek
47de8bd0ef Goodbye, JSONParser...
llvm-svn: 154930
2012-04-17 17:21:17 +00:00
Jay Foad
0ed30bb33d Remove unused CCIfSubtarget.
llvm-svn: 154921
2012-04-17 11:29:05 +00:00
James Molloy
44927f5296 Fix bad EXTRACT_SUBREG in instruction selection for extending-loads on NEON.
llvm-svn: 154915
2012-04-17 08:18:00 +00:00
Benjamin Kramer
550faddc94 Revert "SCEV: When expanding a GEP the final addition to the base pointer has NUW but not NSW."
This isn't right either, reverting for now.

llvm-svn: 154910
2012-04-17 06:33:57 +00:00
Craig Topper
ada065b23b Don't decode vperm2i128 or vperm2f128 into a shuffle if bit 3 or 7 of the immediate is set.
llvm-svn: 154907
2012-04-17 05:54:54 +00:00
Lang Hames
c9489b786a SlotIndexes used to store the index list in a crufty custom linked-list. I can't
for the life of me remember why I wrote it this way, but I can't see any good
reason for it now. This patch replaces the custom linked list with an ilist.

This change should preserve the existing numberings exactly, so no generated code
should change (if it does, file a bug!).

llvm-svn: 154904
2012-04-17 04:15:51 +00:00
Kevin Enderby
d64ba28e41 Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)
instructions with writebacks. And add test a case for all opcodes handed by
DecodeVLD2DupInstruction() in ARMDisassembler.cpp .

llvm-svn: 154884
2012-04-17 00:49:27 +00:00
Eric Christopher
2ec1742f9b Typo.
llvm-svn: 154879
2012-04-16 23:54:31 +00:00
Eric Christopher
00c02f1556 Make comment here more clear.
llvm-svn: 154878
2012-04-16 23:54:23 +00:00
Jim Grosbach
13a45d88e5 ARM two-operand forms for vhadd and vhsub instructions.
rdar://11252521

llvm-svn: 154875
2012-04-16 23:00:25 +00:00
Preston Gurd
01328a277e Temporarily turn off anti-dependency checking
during Post RA scheduling in X86,
until the X86 target is changed to properly set up
post RA liveness.

llvm-svn: 154874
2012-04-16 22:52:28 +00:00
Preston Gurd
0a341aa416 Add files which were not included by commit 154868.
llvm-svn: 154872
2012-04-16 22:26:48 +00:00
Preston Gurd
e52a5ca15b Implement GDB integration for source level debugging of code JITed using
the MCJIT execution engine.

The GDB JIT debugging integration support works by registering a loaded
object image with a pre-defined function that GDB will monitor if GDB
is attached. GDB integration support is implemented for ELF only at this
time. This integration requires GDB version 7.0 or newer.

Patch by Andy Kaylor!

 

llvm-svn: 154868
2012-04-16 22:12:58 +00:00
Chandler Carruth
5780b826b0 Fix updateTerminator to be resiliant to degenerate terminators where
both fallthrough and a conditional branch target the same successor.
Gracefully delete the conditional branch and introduce any unconditional
branch needed to reach the actual successor. This fixes memory
corruption in 2009-06-15-RegScavengerAssert.ll and possibly other tests.

Also, while I'm here fix a latent bug I spotted by inspection. I never
applied the same fundamental fix to this fallthrough successor finding
logic that I did to the logic used when there are no conditional
branches. As a consequence it would have selected landing pads had they
be aligned in just the right way here. I don't have a test case as
I spotted this by inspection, and the previous time I found this
required have of TableGen's source code to produce it. =/ I hate backend
bugs. ;]

Thanks to Jim Grosbach for helping me reason through this and reviewing
the fix.

llvm-svn: 154867
2012-04-16 22:03:00 +00:00
Jim Grosbach
9e97ef84db MC assembly parser handling for trailing comma in macro instantiation.
A trailing comma means no argument at all (i.e., as if the comma were not
present), not an empty argument to the invokee.

rdar://11252521

llvm-svn: 154863
2012-04-16 21:18:49 +00:00
Jim Grosbach
8cd93be234 ARM handle :lower16: and :upper16: after a '#' prefix.
rdar://11252521

llvm-svn: 154862
2012-04-16 21:18:46 +00:00
Duncan Sands
518668bd76 Remove support for the special 'fast' value for fpmath accuracy for the moment.
llvm-svn: 154850
2012-04-16 19:39:33 +00:00
Richard Smith
971d090cbb Fix incorrect atomics codegen introduced in r154705, and extend test to catch it.
llvm-svn: 154845
2012-04-16 18:43:53 +00:00
David Blaikie
61910e5c8e Remove unused variable
llvm-svn: 154841
2012-04-16 18:10:13 +00:00
Jim Grosbach
b6c95c9f42 ARM assembly two-operand forms for VRSHL.
rdar://11252521

llvm-svn: 154840
2012-04-16 18:03:16 +00:00
Akira Hatanaka
0f31530336 Do not add offset in applyFixup. This has already been accounted for in Value.
llvm-svn: 154838
2012-04-16 18:00:19 +00:00
Jim Grosbach
d961988871 ARM two-operand aliases for VRHADD instructions.
rdar://11252521

llvm-svn: 154832
2012-04-16 17:14:11 +00:00
Sirish Pande
051c2d4395 Hexagon V5 (Floating Point) Support.
llvm-svn: 154829
2012-04-16 17:05:06 +00:00
Duncan Sands
f61d49df40 Make it possible to indicate relaxed floating point requirements at the IR level
through the use of 'fpmath' metadata.  Currently this only provides a 'fpaccuracy'
value, which may be a number in ULPs or the keyword 'fast', however the intent is
that this will be extended with additional information about NaN's, infinities
etc later.  No optimizations have been hooked up to this so far.

llvm-svn: 154822
2012-04-16 16:28:59 +00:00
Chandler Carruth
728acc9bd9 Flip the new block-placement pass to be on by default.
This is mostly to test the waters. I'd like to get results from FNT
build bots and other bots running on non-x86 platforms.

This feature has been pretty heavily tested over the last few months by
me, and it fixes several of the execution time regressions caused by the
inlining work by preventing inlining decisions from radically impacting
block layout.

I've seen very large improvements in yacr2 and ackermann benchmarks,
along with the expected noise across all of the benchmark suite whenever
code layout changes. I've analyzed all of the regressions and fixed
them, or found them to be impossible to fix. See my email to llvmdev for
more details.

I'd like for this to be in 3.1 as it complements the inliner changes,
but if any failures are showing up or anyone has concerns, it is just
a flag flip and so can be easily turned off.

I'm switching it on tonight to try and get at least one run through
various folks' performance suites in case SPEC or something else has
serious issues with it. I'll watch bots and revert if anything shows up.

llvm-svn: 154816
2012-04-16 13:49:17 +00:00
Chandler Carruth
fbb6219d5b Add a somewhat hacky heuristic to do something different from whole-loop
rotation. When there is a loop backedge which is an unconditional
branch, we will end up with a branch somewhere no matter what. Try
placing this backedge in a fallthrough position above the loop header as
that will definitely remove at least one branch from the loop iteration,
where whole loop rotation may not.

I haven't seen any benchmarks where this is important but loop-blocks.ll
tests for it, and so this will be covered when I flip the default.

llvm-svn: 154812
2012-04-16 13:33:36 +00:00
Hal Finkel
5e614e7520 Fix style violation in BBVectorize (pointed out by Bill Wendling)
llvm-svn: 154810
2012-04-16 12:39:17 +00:00
Chandler Carruth
33b200ad13 Tweak the loop rotation logic to check whether the loop is naturally
laid out in a form with a fallthrough into the header and a fallthrough
out of the bottom. In that case, leave the loop alone because any
rotation will introduce unnecessary branches. If either side looks like
it will require an explicit branch, then the rotation won't add any, do
it to ensure the branch occurs outside of the loop (if possible) and
maximize the benefit of the fallthrough in the bottom.

llvm-svn: 154806
2012-04-16 09:31:23 +00:00
Benjamin Kramer
a72a6005f8 Reapply 'Add reverseColor to raw_ostream'.
To be used in printing unprintable source in clang diagnostics.
Patch by Seth Cantrell, with a minor fix for mingw by me.

llvm-svn: 154805
2012-04-16 08:56:50 +00:00
Argyrios Kyrtzidis
4950ffbb4f Revert r154800 which breaks windows builders.
llvm-svn: 154802
2012-04-16 07:59:39 +00:00
Craig Topper
db4fcf7088 Replace vpermd/vpermps intrinic patterns with custom lowering to target specific nodes.
llvm-svn: 154801
2012-04-16 07:13:00 +00:00
Argyrios Kyrtzidis
3d576f296a Add reverseColor to raw_ostream.
To be used in printing unprintable source in clang diagnostics.
Patch by Seth Cantrell!

llvm-svn: 154800
2012-04-16 07:07:38 +00:00
Craig Topper
a986fc78e2 Change type profile for vpermv back to using operand type for the mask argument to match intrinsic behavior. Add a bitcast to the lowering code to convert mask from v8i32 to v8f32 for vpermps.
llvm-svn: 154798
2012-04-16 06:43:40 +00:00
Craig Topper
129dccdc84 Flip the arguments when converting vpermd/vpermps intrinsics into instructions. The intrinsic has the mask as the last operand, but the instruction has it as the second.
llvm-svn: 154797
2012-04-16 06:26:15 +00:00
Bill Wendling
66282c6d7f Add a Fixme.
llvm-svn: 154793
2012-04-16 04:23:52 +00:00
Hal Finkel
4f7adc1f50 Simplify checking for pointer types in BBVectorize (this change was suggested by Duncan).
llvm-svn: 154787
2012-04-16 03:49:42 +00:00
Hal Finkel
457fbe481c Remove dead SD nodes after the combining pass. Fixes PR12201.
llvm-svn: 154786
2012-04-16 03:33:22 +00:00
Chandler Carruth
fc5ab5d388 Rewrite how machine block placement handles loop rotation.
This is a complex change that resulted from a great deal of
experimentation with several different benchmarks. The one which proved
the most useful is included as a test case, but I don't know that it
captures all of the relevant changes, as I didn't have specific
regression tests for each, they were more the result of reasoning about
what the old algorithm would possibly do wrong. I'm also failing at the
moment to craft more targeted regression tests for these changes, if
anyone has ideas, it would be welcome.

The first big thing broken with the old algorithm is the idea that we
can take a basic block which has a loop-exiting successor and a looping
successor and use the looping successor as the layout top in order to
get that particular block to be the bottom of the loop after layout.
This happens to work in many cases, but not in all.

The second big thing broken was that we didn't try to select the exit
which fell into the nearest enclosing loop (to which we exit at all). As
a consequence, even if the rotation worked perfectly, it would result in
one of two bad layouts. Either the bottom of the loop would get
fallthrough, skipping across a nearer enclosing loop and thereby making
it discontiguous, or it would be forced to take an explicit jump over
the nearest enclosing loop to earch its successor. The point of the
rotation is to get fallthrough, so we need it to fallthrough to the
nearest loop it can.

The fix to the first issue is to actually layout the loop from the loop
header, and then rotate the loop such that the correct exiting edge can
be a fallthrough edge. This is actually much easier than I anticipated
because we can handle all the hard parts of finding a viable rotation
before we do the layout. We just store that, and then rotate after
layout is finished. No inner loops get split across the post-rotation
backedge because we check for them when selecting the rotation.

That fix exposed a latent problem with our exitting block selection --
we should allow the backedge to point into the middle of some inner-loop
chain as there is no real penalty to it, the whole point is that it
*won't* be a fallthrough edge. This may have blocked the rotation at all
in some cases, I have no idea and no test case as I've never seen it in
practice, it was just noticed by inspection.

Finally, all of these fixes, and studying the loops they produce,
highlighted another problem: in rotating loops like this, we sometimes
fail to align the destination of these backwards jumping edges. Fix this
by actually walking the backwards edges rather than relying on loopinfo.

This fixes regressions on heapsort if block placement is enabled as well
as lots of other cases where the previous logic would introduce an
abundance of unnecessary branches into the execution.

llvm-svn: 154783
2012-04-16 01:12:56 +00:00
Craig Topper
1b15347812 Merge vpermps/vpermd and vpermpd/vpermq SD nodes.
llvm-svn: 154782
2012-04-16 00:41:45 +00:00
Craig Topper
c217784dc3 Fix SDTypeProfile for vpermps. The mask operand should be v8i32.
llvm-svn: 154781
2012-04-16 00:12:20 +00:00
Craig Topper
e274a2cc61 Spacing fixes and 80 column fixes. Use 0 instead of 0x80 for undef indices in vpermps/vpermd. Hardware only looks at lower 3-bits.
llvm-svn: 154780
2012-04-15 23:48:57 +00:00
Craig Topper
788250eec1 Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with normal shuffle vectors.
llvm-svn: 154778
2012-04-15 22:43:31 +00:00
Nadav Rotem
2a4e2ef10c Fix PR12529. The Vxx family of instructions are only supported by AVX.
Use non-vex instructions for SSE4.

llvm-svn: 154770
2012-04-15 19:36:44 +00:00
Benjamin Kramer
d4a8bf07d5 Wire up support for diagnostic ranges in the ARMAsmParser.
As an example, attach range info to the "invalid instruction" message:

$ clang -arch arm -c asm.c
asm.c:2:11: error: invalid instruction
  __asm__("foo r0");
          ^
<inline asm>:1:2: note: instantiated into assembly here
        foo r0
        ^~~

llvm-svn: 154765
2012-04-15 17:04:27 +00:00
Nadav Rotem
b8710ee43f When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type.
llvm-svn: 154764
2012-04-15 15:08:09 +00:00
Elena Demikhovsky
92fb3e613e Added VPERM optimization for AVX2 shuffles
llvm-svn: 154761
2012-04-15 11:18:59 +00:00
NAKAMURA Takumi
0133680b3d HexagonCopyToCombine.cpp: Silence two warnings, -Wunused-variable, with -Asserts.
llvm-svn: 154759
2012-04-15 05:33:43 +00:00
NAKAMURA Takumi
ddf2dc407e Target/Hexagon: Tweak to fix msvc build.
llvm-svn: 154758
2012-04-15 05:09:09 +00:00
Duncan Sands
40d080e3b7 Rename "fpaccuracy" metadata to the more generic "fpmath". That's because I'm
thinking of generalizing it to be able to specify other freedoms beyond accuracy
(such as that NaN's don't have to be respected).  I'd like the 3.1 release (the
first one with this metadata) to have the more generic name already rather than
having to auto-upgrade it in 3.2.

llvm-svn: 154744
2012-04-14 12:36:06 +00:00
Hal Finkel
028d6e153e Fix an error in BBVectorize important for vectorizing pointer types.
When vectorizing pointer types it is important to realize that potential
pairs cannot be connected via the address pointer argument of a load or store.
This is because even after vectorization, the address is still a scalar because
the address of the higher half of the pair is implicit from the address of the
lower half (it need not be, and should not be, explicitly computed).

llvm-svn: 154735
2012-04-14 07:32:50 +00:00
Hal Finkel
c55edb7b35 Enhance BBVectorize to more-properly handle pointer values and vectorize GEPs.
llvm-svn: 154734
2012-04-14 07:32:43 +00:00
Andrew Trick
550cf63beb misched: Added CanHandleTerminators.
This is a special flag for targets that really want their block
terminators in the DAG. The default scheduler cannot handle this
correctly, so it becomes the specialized scheduler's responsibility to
schedule terminators.

llvm-svn: 154712
2012-04-13 23:29:54 +00:00
Richard Smith
d5004a79d9 Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x & y.
llvm-svn: 154705
2012-04-13 22:47:00 +00:00
Sirish Pande
fc7e619733 Remove iostream from New Value Jump.
llvm-svn: 154703
2012-04-13 21:01:35 +00:00
Hal Finkel
12b4c41203 Add support to BBVectorize for vectorizing selects.
llvm-svn: 154700
2012-04-13 20:45:45 +00:00
Sirish Pande
6c3fc0ca53 Add support for Hexagon Architectural feature, New Value Jump.
llvm-svn: 154696
2012-04-13 20:22:31 +00:00
Sirish Pande
01b53a9593 Pass to replace tranfer/copy instructions into combine instruction where possible.
llvm-svn: 154695
2012-04-13 20:22:19 +00:00
Benjamin Kramer
191fe619aa Reduce malloc traffic in DwarfAccelTable
- Don't copy offsets into HashData, the underlying vector won't change once the table is finalized.
- Allocate HashData and HashDataContents in a BumpPtrAllocator.
- Allocate string map entries in the same allocator.
- Random cleanups.

llvm-svn: 154694
2012-04-13 20:06:17 +00:00
Evan Cheng
3499593c7e On Darwin targets, only use vfma etc. if the source use fma() intrinsic explicitly.
llvm-svn: 154689
2012-04-13 18:59:28 +00:00
Dan Gohman
0387e6b701 Add some comments, and fix a few places that missed setting Changed.
llvm-svn: 154687
2012-04-13 18:57:48 +00:00
Kevin Enderby
84e97c7df2 For ARM disassembly only print 32 unsigned bits for the address of branch
targets so if the branch target has the high bit set it does not get printed as:
	 beq     0xffffffff8008c404

llvm-svn: 154685
2012-04-13 18:46:37 +00:00
Dan Gohman
d5743c7fd0 Consider ObjC runtime calls objc_storeWeak and others which make a copy of
their argument as "escape" points for objc_retainBlock optimization.
This fixes rdar://11229925.

llvm-svn: 154682
2012-04-13 18:28:58 +00:00
Hal Finkel
f8611de2a6 By default, use Early-CSE instead of GVN for vectorization cleanup.
As has been suggested by Duncan and others, Early-CSE and GVN should
do similar redundancy elimination, but Early-CSE is much less expensive.
Most of my autovectorization benchmarks show a performance regresion, but
all of these are < 0.1%, and so I think that it is still worth using
the less expensive pass.

llvm-svn: 154673
2012-04-13 17:15:33 +00:00
Benjamin Kramer
9087b1f54a Remove unused variable.
llvm-svn: 154661
2012-04-13 08:09:12 +00:00
Craig Topper
7c0af9b204 Silence various build warnings from Hexagon backend that show up in release builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds.
llvm-svn: 154660
2012-04-13 06:38:11 +00:00
Dan Gohman
81ac0c921f Use the new Use-aware dominates method to apply the objc runtime
library return value optimization for phi uses. Even when the
phi itself is not dominated, the specific use may be dominated.

llvm-svn: 154647
2012-04-13 01:08:28 +00:00
Bill Wendling
8659a23f4a Code-gen may inject code into the IR before it emits the ASM. The linker
obviously cannot know that this code is present, let alone used. So prevent the
internalize pass from internalizing those global values which code-gen may
insert.

llvm-svn: 154645
2012-04-13 01:06:27 +00:00
Dan Gohman
6a5b02f8ee Don't move objc_autorelease calls past autorelease pool boundaries when
optimizing autorelease calls on phi nodes with null operands.
This fixes rdar://11207070.

llvm-svn: 154642
2012-04-13 00:59:57 +00:00
Dan Gohman
cde3a46455 Def here is an Instruction, so !isa<Instruction>(Def) is always false,
as Eli noticed.

llvm-svn: 154641
2012-04-13 00:50:57 +00:00
Dan Gohman
c0a906405e Add forms of dominates and isReachableFromEntry that accept a Use
directly instead of a user Instruction. This allows them to test
whether a def dominates a particular operand if the user instruction
is a PHI.

llvm-svn: 154631
2012-04-12 23:31:46 +00:00
Kevin Enderby
5118ccf4c7 Fix a few more places in the ARM disassembler so that branches get
symbolic operands added when using the C disassembler API.

llvm-svn: 154628
2012-04-12 23:13:34 +00:00
Ted Kremenek
de82fd5282 Update CMake build.
llvm-svn: 154622
2012-04-12 22:15:23 +00:00
Evandro Menezes
dcd4bebf98 Hexagon: fix CMake error.
llvm-svn: 154620
2012-04-12 21:44:58 +00:00