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4048 Commits

Author SHA1 Message Date
Eric Christopher
339499f8f3 Don't handle -arm-long-calls in fast isel for now. 
llvm-svn: 121919
 2010-12-15 23:47:29 +00:00
Bill Wendling
63ebdf4786 If we're changing the frame register to a physical register other than SP, we 
need to use tLDRi and tSTRi instead of tLDRspi and tSTRspi respectively.

llvm-svn: 121915
 2010-12-15 23:32:27 +00:00
Bill Wendling
ed6c88ead9 Whitespace cleanups. 
llvm-svn: 121914
 2010-12-15 23:31:24 +00:00
Bob Wilson
438a9a1367 Add Neon VCVT instructions for f32 <-> f16 conversions. 
Clang is now providing intrinsics for these and so we need to support them
in the backend.  Radar 8068427.

llvm-svn: 121902
 2010-12-15 22:14:12 +00:00
Jim Grosbach
30e7f0d09e Tweak a few pseudo-inst pattern base classes. 
llvm-svn: 121878
 2010-12-15 19:03:16 +00:00
Jim Grosbach
8278d5692a The new t2LEApcrel* pseudo instructions need the size specified. 
rdar://8768390

llvm-svn: 121876
 2010-12-15 18:48:45 +00:00
Owen Anderson
202d654195 Implement cleanups suggested by Daniel. 
llvm-svn: 121875
 2010-12-15 18:48:27 +00:00
Bill Wendling
ab9df10ee5 Add fixups for Thumb LDR/STR instructions. 
llvm-svn: 121858
 2010-12-15 08:51:02 +00:00
Bill Wendling
258739db7e Reapply r121808 now that the missing patterns have been supplied. 
llvm-svn: 121820
 2010-12-15 01:03:19 +00:00
Bill Wendling
2764f25c78 Add some missing patterns now that tLDRB and tLDRH are split into reg and 
immediate versions.

llvm-svn: 121819
 2010-12-15 00:58:57 +00:00
Bill Wendling
ad13b53237 Revert r121808 until I can fix the build. 
llvm-svn: 121815
 2010-12-15 00:04:00 +00:00
Jim Grosbach
386d8fc22c thumb adr fixup needs alignment just like the t2 version. 
llvm-svn: 121812
 2010-12-14 23:47:35 +00:00
Bill Wendling
ab3d22ba7f Comments and cleaning. 
llvm-svn: 121809
 2010-12-14 23:42:48 +00:00
Bill Wendling
2883bbb8c0 Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In 
particular, we want

   ldr r2, [r3]

to be equivalent to

   ldr r2, [r3, #0]

and not

   ldr r2, [r3, r0]

llvm-svn: 121808
 2010-12-14 23:40:49 +00:00
Jim Grosbach
1e943cc60d Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 
llvm-svn: 121798
 2010-12-14 22:28:03 +00:00
Bill Wendling
213a3d080d Fix comment. 
llvm-svn: 121797
 2010-12-14 22:26:49 +00:00
Bill Wendling
7e589d4753 Multiclassify the LDR/STR encoding patterns. The only functionality difference 
is the addition of the FoldableAsLoad & Rematerializable flags to some of the
load instructions. ARM has these flags set for them.

llvm-svn: 121794
 2010-12-14 22:10:49 +00:00
Jim Grosbach
70721628b4 trailing whitespace 
llvm-svn: 121792
 2010-12-14 21:28:29 +00:00
Jim Grosbach
e84e95e6d2 Refactor a bit for legibility. 
llvm-svn: 121790
 2010-12-14 21:10:47 +00:00
Jim Grosbach
ef58d5968e trailing whitespace. 
llvm-svn: 121789
 2010-12-14 20:46:39 +00:00
Jim Grosbach
13d82ea2b1 Make sure to propagate the predicate operands for LEApcrel to ADR. 
llvm-svn: 121788
 2010-12-14 20:45:47 +00:00
Owen Anderson
4ce4ce2f60 Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions. 
llvm-svn: 121784
 2010-12-14 19:42:53 +00:00
Daniel Dunbar
3f9b9dc852 MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup. 
llvm-svn: 121772
 2010-12-14 17:37:16 +00:00
Jim Grosbach
88727a93a8 Trailing whitespace 
llvm-svn: 121769
 2010-12-14 16:25:15 +00:00
Bill Wendling
4fe39bae17 Use the integer scheduling intrinsic for integer loads and stores. 
llvm-svn: 121765
 2010-12-14 12:33:05 +00:00
Bill Wendling
61720b79f9 The tLDR et al instructions were emitting either a reg/reg or reg/imm 
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.

The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.

There are some obvious cleanups here, which will happen shortly.

llvm-svn: 121747
 2010-12-14 03:36:38 +00:00
Evan Cheng
6a2bed92f5 bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663 
llvm-svn: 121746
 2010-12-14 03:22:07 +00:00
Owen Anderson
c84f8c23b3 Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering much later, which makes the entire 
process cleaner.

llvm-svn: 121735
 2010-12-14 00:36:49 +00:00
Bob Wilson
33e5e902b0 Remove the rest of the *_sfp Neon instruction patterns. 
Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions.
This change made a big difference in the code generated for the
CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing
a fine job, but some instructions that were previously moved outside the loop
are not moved now.  It's using fewer VFP registers now, which is generally
a good thing, so I think the estimates for register pressure changed and that
affected the LICM behavior.  Since that isn't obviously wrong, I've just
changed the test file.  This completes the work for Radar 8711675.

llvm-svn: 121730
 2010-12-13 23:02:37 +00:00
Bob Wilson
b189b77d9b Simplify N2VSPat, removing some unnecessary type arguments. 
llvm-svn: 121729
 2010-12-13 23:02:31 +00:00
Owen Anderson
af1dde2673 Revert r121721, which broke buildbots. 
llvm-svn: 121726
 2010-12-13 22:51:08 +00:00
Owen Anderson
c298c8ed4d Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR, 
which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.

llvm-svn: 121721
 2010-12-13 22:29:52 +00:00
Bob Wilson
203303291f Delete a line that I forgot to revert previously. 
llvm-svn: 121719
 2010-12-13 22:05:55 +00:00
Bob Wilson
074095ddf2 Use COPY_TO_REGCLASS instead of pseudo instructions for Neon FP patterns. 
Jakob Olesen suggested that we can avoid the need for separate pseudo
instructions here by using COPY_TO_REGCLASS in the patterns.  The pattern
gets pretty ugly but it seems to work well.  Partial fix for Radar 8711675.

llvm-svn: 121718
 2010-12-13 21:58:05 +00:00
Bob Wilson
56b41f8b81 Use pseudo instructions for 2-register Neon instructions for scalar FP. 
Partial fix for Radar 8711675.

llvm-svn: 121716
 2010-12-13 21:05:52 +00:00
Bob Wilson
9a6d75a499 Remove unused instruction class arguments. 
llvm-svn: 121715
 2010-12-13 21:05:44 +00:00
Evan Cheng
c90b20fb74 Generalize BFI isel lowering a bit. 
llvm-svn: 121714
 2010-12-13 20:32:54 +00:00
Owen Anderson
4ec912b842 In Thumb2, direct branches can be encoded as either a "short" conditional branch with a null predicate, or 
as a "long" direct branch.  While the mnemonics are the same, they encode the branch offset differently, and
the Darwin assembler appears to prefer the "long" form for direct branches.  Thus, in the name of bitwise
equivalence, provide encoding and fixup support for it.

llvm-svn: 121710
 2010-12-13 19:31:11 +00:00
Jim Grosbach
9a282f2202 Use 32-bit types for 32-bit values. 
llvm-svn: 121709
 2010-12-13 19:25:46 +00:00
Jim Grosbach
ad058bd082 Trailing whitespace. 
llvm-svn: 121708
 2010-12-13 19:18:13 +00:00
Evan Cheng
b6773d7e1f (or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == #shamt. rdar://8752056 
llvm-svn: 121606
 2010-12-11 04:11:38 +00:00
Jim Grosbach
98dcdf10c2 Add FIXME 
llvm-svn: 121598
 2010-12-10 23:41:10 +00:00
Owen Anderson
47a78db79b Attempt to get Thumb2 branch fixups working properly. 
llvm-svn: 121593
 2010-12-10 23:02:28 +00:00
Owen Anderson
8424ab65e2 Fix merge error in my last fix to Thumb2 vldr fixups. 
llvm-svn: 121588
 2010-12-10 22:53:48 +00:00
Owen Anderson
f310c92333 Fixups for Thumb2 vldr's need to have the effective PC aligned as well. 
llvm-svn: 121587
 2010-12-10 22:46:47 +00:00
Bill Wendling
7f1cea7009 The MCFixupKindInfo table needs to be in the order that the enums were 
declared. Add a note specifying this and spruce up the list a bit.

llvm-svn: 121586
 2010-12-10 22:37:19 +00:00
Owen Anderson
e85fabac75 Provide the necessary post-encoder hook for Thumb2 encodings of VMOV and friends. 
llvm-svn: 121585
 2010-12-10 22:32:08 +00:00
Bob Wilson
d30768fe3e Add float patterns for Neon vld1-lane/dup and vst1-lane operations. 
llvm-svn: 121583
 2010-12-10 22:13:32 +00:00
Bob Wilson
ae683e722f Remove unused arguments. 
llvm-svn: 121582
 2010-12-10 22:13:24 +00:00
Owen Anderson
aaf97da84b Fix encoding of Thumb1 LDRB and STRB. 
llvm-svn: 121581
 2010-12-10 22:11:13 +00:00