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25173 Commits

Author SHA1 Message Date
Dan Gohman
3bcb327e9c Mark lea fi# as being really rematerializable. 
llvm-svn: 56698
 2008-09-26 21:30:20 +00:00
Evan Cheng
5ce14d532c unpckhps requires sse1, punpckhdq requires sse2. 
llvm-svn: 56697
 2008-09-26 21:26:30 +00:00
Dan Gohman
401470e0c7 Fix X86FastISel's address folding to check displacement 
values for overflow.

llvm-svn: 56686
 2008-09-26 20:04:15 +00:00
Evan Cheng
9946443460 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0. 
llvm-svn: 56683
 2008-09-26 19:48:35 +00:00
Oscar Fuentes
94d058ba4a CMake: Builds all examples. Corrected name of CBackend target. 
llvm-svn: 56682
 2008-09-26 19:48:03 +00:00
Dale Johannesen
9ce0f3e4b3 Generated files for previous patch. 
llvm-svn: 56679
 2008-09-26 19:32:34 +00:00
Dale Johannesen
423053d8a7 Another file I forgot. 
llvm-svn: 56678
 2008-09-26 19:31:53 +00:00
Dale Johannesen
3f62c40108 Add "inreg" field to CallSDNode (doesn't increase 
its size).  Adjust various lowering functions to
pass this info through from CallInst.  Use it to
implement sseregparm returns on X86.  Remove
X86_ssecall calling convention.

llvm-svn: 56677
 2008-09-26 19:31:26 +00:00
Dan Gohman
56b0c33a9d Factor out the code for determining when symblic addresses 
require RIP-relative addressing and use it to fix a bug
in X86FastISel in x86-64 PIC mode, where it was trying to
use base/index registers with RIP-relative addresses. This
fixes a bunch of x86-64 testsuite failures.

llvm-svn: 56676
 2008-09-26 19:15:30 +00:00
Evan Cheng
b4d6625c85 Avoid spilling EBP / RBP twice in the prologue. 
llvm-svn: 56675
 2008-09-26 19:14:21 +00:00
Owen Anderson
70a6539add We don't need to insert copies for implicit_def's. 
llvm-svn: 56674
 2008-09-26 18:50:46 +00:00
Evan Cheng
0d612aad67 X86 address displacement field must be interpreted as a 32-bit value. 
llvm-svn: 56665
 2008-09-26 16:58:16 +00:00
Oscar Fuentes
65859a84d0 CMake: Builds all targets. 
llvm-svn: 56641
 2008-09-26 04:40:32 +00:00
Dan Gohman
37bd5a0d40 Disable support for x86_f80 in X86FastISel. Supporting it would 
require more work.

llvm-svn: 56637
 2008-09-26 01:39:32 +00:00
Bill Wendling
bf75299f0a If we have a function with an unreachable statement such that the ending debug 
information is in an unreachable block, then it's possible that the high/low pc
values won't be set for the dwarf information. E.g., this function:

void abort(void) __attribute__((__noreturn__));
void dead_beef(void) __attribute__ ((noreturn));

int *b;

void dead_beef(void) {
  *b=0xdeadbeef;
  abort();
}

has a call to "@llvm.dbg.region.end" only in the unreachable block:

define void @dead_beef() noreturn nounwind  {
entry:
	call void @llvm.dbg.func.start(...)
	call void @llvm.dbg.stoppoint(...)
...
	call void @abort( ) noreturn nounwind 
	unreachable

return:		; No predecessors!
	call void @llvm.dbg.stoppoint(...)
	call void @llvm.dbg.region.end(...)
	ret void
}

The dwarf information emitted is something like:

0x00000084:     TAG_subprogram [5]  
                 AT_name( "dead_beef" )
                 AT_external( 0x01 )
                 AT_prototyped( 0x01 )
                 AT_decl_file( 0x01 )
                 AT_decl_line( 0x08 )

Note that this is *not* the best fix for this problem, but a band-aid for an
gaping wound. This code needs to be changed when we revamp our debugging
information.

llvm-svn: 56628
 2008-09-26 00:28:12 +00:00
Evan Cheng
c8674dcfd0 Prefer movlhps over punpcklqdq, etc. in more cases. 
llvm-svn: 56627
 2008-09-25 23:35:16 +00:00
Dan Gohman
524c506db3 Fix a bug in which address displacements were being added to the 
load from the stub, instead of the result of the load from the stub.

llvm-svn: 56626
 2008-09-25 23:34:02 +00:00
Bill Wendling
8b4fecfb09 Make pointer parameter const for isUsedInBasicBlock. 
llvm-svn: 56625
 2008-09-25 22:42:01 +00:00
Devang Patel
64dd7a2e89 Large mechanical patch. 
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622
 2008-09-25 21:00:45 +00:00
Anton Korobeynikov
7367de00cf Reapply 56585:56589 with proper fix for some gcc versions 
llvm-svn: 56621
 2008-09-25 21:00:33 +00:00
Evan Cheng
d190aeb62d With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps 
llvm-svn: 56620
 2008-09-25 20:50:48 +00:00
Dale Johannesen
62f64ab4c8 Accept 'inreg' attribute on x86 functions as 
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0).  Update documentation
to reflect reality.

llvm-svn: 56619
 2008-09-25 20:47:45 +00:00
Dan Gohman
f03be3916e Avoid a spurious extra space character when printing empty structs. 
llvm-svn: 56616
 2008-09-25 17:37:20 +00:00
Dan Gohman
9bb92ce6e9 Support for i1 XOR in FastISel. It is actually safe because 
i1 operands are assumed to already by zero-extended.

llvm-svn: 56615
 2008-09-25 17:22:52 +00:00
Dan Gohman
51cd436ad8 Don't print fast-isel debug messages by default. Thanks Chris! 
llvm-svn: 56614
 2008-09-25 17:21:42 +00:00
Dan Gohman
5ee9d9af7f Don't forget the newline in debug output. 
llvm-svn: 56613
 2008-09-25 17:17:27 +00:00
Dan Gohman
b63e6de501 FastISel support for debug info. 
llvm-svn: 56610
 2008-09-25 17:05:24 +00:00
Richard Pennington
1db9263b05 bug 2812: Segmentation fault on a big emdiam processor. 
llvm-svn: 56609
 2008-09-25 16:15:10 +00:00
Dan Gohman
6f5c6be90f PIC support in X86FastISel. 
llvm-svn: 56608
 2008-09-25 15:24:26 +00:00
Evan Cheng
12a67b5226 Temporarily backing out 56585:56589 to unbreak the build. 
llvm-svn: 56607
 2008-09-25 07:38:08 +00:00
Dan Gohman
1776533304 Fix a recent fast-isel coverage regression - don't bail out before 
giving the target a chance to materialize constants.

llvm-svn: 56605
 2008-09-25 01:28:51 +00:00
Dan Gohman
ed3216739e Enable DeadMachineInstructionElim when Fast-ISel is enabled. 
llvm-svn: 56604
 2008-09-25 01:14:49 +00:00
Dan Gohman
32c4066d62 Add debug output to this pass. 
llvm-svn: 56602
 2008-09-25 01:06:50 +00:00
Evan Cheng
d8a6a7beaa pmovsxbq etc. requires sse4.1. 
llvm-svn: 56600
 2008-09-25 00:49:51 +00:00
Dan Gohman
57dc5e1698 Refactor the code that adds standard LLVM codegen passes into 
a separate function, eliminating duplication between the
add-passes-for-file and add-passes-for-machine-code code.

llvm-svn: 56599
 2008-09-25 00:37:07 +00:00
Evan Cheng
bac8250ba4 <rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!") 
llvm-svn: 56597
 2008-09-25 00:14:04 +00:00
Dan Gohman
4855b659d9 Give LowerSubregs.cpp a top-level description. 
llvm-svn: 56596
 2008-09-24 23:44:12 +00:00
Evan Cheng
efd1f614ff Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD. 
llvm-svn: 56594
 2008-09-24 23:27:55 +00:00
Evan Cheng
1d0ed88bf9 X86ISD::VZEXT_LOAD should produce and fold a chain. 
llvm-svn: 56593
 2008-09-24 23:26:36 +00:00
Dale Johannesen
4184c23365 Remove SelectionDag early allocation of registers 
for earlyclobbers.  Teach Local RA about earlyclobber,
and add some tests for it.

llvm-svn: 56592
 2008-09-24 23:13:09 +00:00
Anton Korobeynikov
ff74ae04b1 Minor cleanup 
llvm-svn: 56588
 2008-09-24 22:22:54 +00:00
Anton Korobeynikov
1c1eeb6b7b Get rid of virtual inheritance for ARM TAI 
llvm-svn: 56587
 2008-09-24 22:22:27 +00:00
Anton Korobeynikov
3f07365446 Get rid of virtual inheritance for PPC TAI 
llvm-svn: 56586
 2008-09-24 22:22:03 +00:00
Anton Korobeynikov
9e5cbcc134 Use crazy template-based inheritance instead of virtual one. 
llvm-svn: 56585
 2008-09-24 22:21:39 +00:00
Anton Korobeynikov
ccd9174b23 Use helper 
llvm-svn: 56584
 2008-09-24 22:21:04 +00:00
Anton Korobeynikov
f465171596 SmallPtrSet will be better 
llvm-svn: 56583
 2008-09-24 22:20:46 +00:00
Anton Korobeynikov
b9294473f0 Get rid of ReadOnlySection duplicate 
llvm-svn: 56582
 2008-09-24 22:20:27 +00:00
Anton Korobeynikov
abf1e5277b Use named sections, where they should be 
llvm-svn: 56581
 2008-09-24 22:19:13 +00:00
Anton Korobeynikov
9b9c3a38ad Get rid of now unused {Four,Eight,Sixteen}ByteConstantSection 
llvm-svn: 56580
 2008-09-24 22:18:54 +00:00
Anton Korobeynikov
f95cbd4834 Use generic section-handling stuff to emit constant pool entries 
llvm-svn: 56579
 2008-09-24 22:17:59 +00:00
Anton Korobeynikov
154a35a723 Cleanup 
llvm-svn: 56578
 2008-09-24 22:17:27 +00:00
Anton Korobeynikov
1b3c67c5cf Get rid of duplicate char*/Section* stuff for TLS sections 
llvm-svn: 56577
 2008-09-24 22:17:06 +00:00
Anton Korobeynikov
021a7eed86 Cleanup, no functionality change 
llvm-svn: 56576
 2008-09-24 22:16:33 +00:00
Anton Korobeynikov
dca16f3acf Get rid of duplicate char*/Section* DataSection 
llvm-svn: 56575
 2008-09-24 22:16:16 +00:00
Anton Korobeynikov
83fa257f55 Get rid of duplicate char*/Section* TextSection 
llvm-svn: 56574
 2008-09-24 22:15:21 +00:00
Anton Korobeynikov
c7ac49c632 Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic. 
llvm-svn: 56573
 2008-09-24 22:14:23 +00:00
Anton Korobeynikov
9e5d24042c Drop obsolete hook and change all usage to new interface 
llvm-svn: 56572
 2008-09-24 22:13:07 +00:00
Anton Korobeynikov
ff79214785 Provide direct function to switch to Section 
llvm-svn: 56571
 2008-09-24 22:12:10 +00:00
Anton Korobeynikov
5c9283696b SPU section handling is really huge mess. Replace remaining TAI calls for sections with explicit names in order not to block existing backends during section handling migration. SPU folks! Please consider using new section handling facility someday. 
llvm-svn: 56570
 2008-09-24 22:11:42 +00:00
Anton Korobeynikov
a76d9f547f Remove dead code for PIC16 (preparation to switch to new section handling stuff) 
llvm-svn: 56569
 2008-09-24 22:11:26 +00:00
Anton Korobeynikov
24b906c8a3 XMM6-XMM15 are callee-saved on Win64. Patch by Nicolas Capens! 
llvm-svn: 56568
 2008-09-24 22:03:04 +00:00
Owen Anderson
2cfce89777 Fix off-by-one error when updating live intervals. 
llvm-svn: 56567
 2008-09-24 21:30:38 +00:00
Evan Cheng
0ed8f5b185 Add DisableGVCompilation which forces the JIT to assert when it tries to allocate space for a GlobalVariable. 
llvm-svn: 56557
 2008-09-24 16:25:55 +00:00
Bill Wendling
7c60c6e7bf Reapplying r56550 
llvm-svn: 56553
 2008-09-24 10:25:02 +00:00
Bill Wendling
236c4d0204 Forgot this part with my last patch. Sorry about the breakage. 
llvm-svn: 56552
 2008-09-24 10:16:24 +00:00
Eric Christopher
8ffa64fdb5 Temporarily revert r56550 until missing commit can be added. 
llvm-svn: 56551
 2008-09-24 08:30:44 +00:00
Bill Wendling
456b33b615 Refactor the constant folding code into it's own function. And call it from both 
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.

This is *not* in response to a bug, so there isn't a testcase.

llvm-svn: 56550
 2008-09-24 07:11:26 +00:00
Evan Cheng
99c7d558a5 Commit CodeGenPrepare.cpp changes which was accidentially left out of 56526. 
llvm-svn: 56549
 2008-09-24 06:48:55 +00:00
Eric Christopher
463646c8aa Fix fallout in CodeGenPrepare from 56526. Will likely need more work. 
llvm-svn: 56546
 2008-09-24 05:32:41 +00:00
Eric Christopher
c53ff83d48 Fix fallout from revision r56535. 
llvm-svn: 56545
 2008-09-24 04:55:49 +00:00
Oscar Fuentes
4e4ae7ef78 CMake: Lists of source files updated. Removed bogus dependency from 
lib/VMCore/CMakeLists.txt

llvm-svn: 56541
 2008-09-24 01:58:12 +00:00
Dale Johannesen
bc29bec7f8 Next round of earlyclobber handling. Approach the 
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539
 2008-09-24 01:07:17 +00:00
Devang Patel
f0bda74eca s/ParamAttrsWithIndex/FnAttributeWithIndex/g 
llvm-svn: 56535
 2008-09-24 00:55:02 +00:00
Devang Patel
64a2547c42 s/ParamAttributeListImpl/AttributeListImpl/g 
llvm-svn: 56532
 2008-09-24 00:29:49 +00:00
Dan Gohman
a7a04d8ae6 Refactor the logic for testing if an instruction is dead into a 
separate method.

llvm-svn: 56531
 2008-09-24 00:27:38 +00:00
Dan Gohman
49becd6c31 Set SetStore to false, to allow this pass to delete 
dead loads.

llvm-svn: 56529
 2008-09-24 00:07:08 +00:00
Dan Gohman
0cf7b31c69 Add a method to MachineInstr for testing whether it makes 
any volatile memory references.

llvm-svn: 56528
 2008-09-24 00:06:15 +00:00
Devang Patel
25ecdc49d9 Put FN_NOTE_AlwaysInline and others in FnAttr namespace. 
llvm-svn: 56527
 2008-09-24 00:06:15 +00:00
Evan Cheng
f942615847 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. 
llvm-svn: 56526
 2008-09-24 00:05:32 +00:00
Devang Patel
b39defd763 Move FN_NOTE_AlwaysInline and other out of ParamAttrs namespace. 
Do not check isDeclaration() in hasNote(). It is clients' responsibility.

llvm-svn: 56524
 2008-09-23 23:52:03 +00:00
Devang Patel
1b09ba231f 80 cols 
llvm-svn: 56521
 2008-09-23 23:32:15 +00:00
Devang Patel
3ce6525647 s/ParameterAttributes/Attributes/g 
llvm-svn: 56520
 2008-09-23 23:25:44 +00:00
Devang Patel
a3e9bf1bca s/ParameterAttributes/Attributes/g 
llvm-svn: 56513
 2008-09-23 23:03:40 +00:00
Devang Patel
ad8ca34acd Use parameter attribute store (soon to be renamed) for 
Function Notes also. Function notes are stored at index ~0.

llvm-svn: 56511
 2008-09-23 22:35:17 +00:00
Dan Gohman
583938816c Now that DeadMachineInstructionElim is basically working 
correctly, it's not necessary to explicitly remove registers
from their use-def lists.

llvm-svn: 56509
 2008-09-23 22:04:18 +00:00
Dan Gohman
01a070f9c7 Arrange for FastISel code to have access to the MachineModuleInfo 
object. This will be needed to support debug info.

llvm-svn: 56508
 2008-09-23 21:53:34 +00:00
Dan Gohman
3242b7c44c Track local physical register liveness. This is not the most 
efficient implementation possible, but it's pretty simple and
good enough for the time being.

llvm-svn: 56504
 2008-09-23 21:40:44 +00:00
Chris Lattner
b5ced46ab8 regenerate 
llvm-svn: 56502
 2008-09-23 21:18:31 +00:00
Chris Lattner
7d905c615f allow inreg on the result of a function 
llvm-svn: 56501
 2008-09-23 21:18:08 +00:00
Dan Gohman
52a9adb3fa Replace the LiveRegs SmallSet with a simple counter that keeps 
track of the number of live registers, which is all the set was
being used for.

llvm-svn: 56498
 2008-09-23 18:50:48 +00:00
Dan Gohman
a712c8d29e Fix these enums' starting values to reflect the way that 
instruction opcodes are now numbered. No functionality change.

llvm-svn: 56497
 2008-09-23 18:42:32 +00:00
Dan Gohman
e21054687a Delete an unused function. 
llvm-svn: 56495
 2008-09-23 18:26:47 +00:00
Dan Gohman
6bed18a334 Move the code for initializing the global base reg out of 
X86ISelDAGToDAG.cpp and into X86InstrInfo.cpp. This will allow
it to be reused by FastISel.

llvm-svn: 56494
 2008-09-23 18:22:58 +00:00
Duncan Sands
2c9f6ab06d Rationalize the names of passes that print information: 
-callgraph => print-callgraph
    -callscc   => print-callgraph-sccs
    -cfgscc    => print-cfg-sccs
    -externalfnconstants => print-externalfnconstants
    -print               => print-function
    -print-alias-sets (no change)
    -print-callgraph     => dot-callgraph
    -print-cfg           => dot-cfg
    -print-cfg-only      => dot-cfg-only
    -print-dom-info (no change)
    -printm              => print-module
    -printusedtypes      => print-used-types

llvm-svn: 56487
 2008-09-23 12:47:39 +00:00
Matthijs Kooijman
5782b4b1b0 Fix indendation. 
llvm-svn: 56486
 2008-09-23 08:54:41 +00:00
Owen Anderson
5405b59bcd Add initial support for inserting last minute copies. 
llvm-svn: 56485
 2008-09-23 04:37:10 +00:00
Evan Cheng
5bf702d20a Support x86 specific inline asm modifier 'J'. 
llvm-svn: 56483
 2008-09-22 23:57:37 +00:00
Dan Gohman
28970ed355 Fix the alignment of loads from constant pool entries when the 
load address has an offset from the base of the constant pool
entry.

llvm-svn: 56479
 2008-09-22 22:40:08 +00:00
Devang Patel
c7fc5ed65f Add hasNote() to check note associated with a function. 
llvm-svn: 56477
 2008-09-22 22:32:29 +00:00
Evan Cheng
0cfe303607 Livestacks really does preserve everything. 
llvm-svn: 56476
 2008-09-22 22:26:15 +00:00
Evan Cheng
1ded8b6ad6 Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators. 
llvm-svn: 56475
 2008-09-22 22:21:38 +00:00
Owen Anderson
67df9bc5b8 Significant improvements to the logic for merging live intervals. This code can't 
just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.

llvm-svn: 56472
 2008-09-22 21:58:58 +00:00
Dale Johannesen
3722f4c14c Make log, log2, log10, exp, exp2 use Expand by 
default.

llvm-svn: 56471
 2008-09-22 21:57:32 +00:00
Evan Cheng
3bcf0cdd72 Mark several codegen passes as preserving all analysis. 
llvm-svn: 56469
 2008-09-22 20:58:04 +00:00
Dale Johannesen
375ba5ee63 More refactoring. Yawn. 
llvm-svn: 56468
 2008-09-22 20:51:30 +00:00
Dale Johannesen
a28dd108a4 Refactor FP intrinisic setup. Per review feedback. 
llvm-svn: 56456
 2008-09-22 19:51:58 +00:00
Oscar Fuentes
e51d9c0c3a CMake build system: support for parallel builds. 
llvm-svn: 56453
 2008-09-22 18:21:51 +00:00
Evan Cheng
638ae1be58 Per review feedback: Only perform 
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

llvm-svn: 56452
 2008-09-22 18:19:24 +00:00
Arnold Schwaighofer
49f49e2086 Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC. 
llvm-svn: 56436
 2008-09-22 14:50:07 +00:00
Oscar Fuentes
0f25988689 Initial support for the CMake build system. 
llvm-svn: 56419
 2008-09-22 01:08:49 +00:00
Bill Wendling
3ee08ff81e Add helper function to get a 32-bit floating point constant. No functionality change. 
llvm-svn: 56418
 2008-09-22 00:44:35 +00:00
Chris Lattner
6e5b4c609c Fold immediates into X86 shifts with fast isel. This generates: 
sarl    $3, %ecx

instead of:

movl    $3, %ecx
sarl    %cl, %edx

This shrinks fast isel 176.gcc by about 2000 instructions (.3%)

llvm-svn: 56413
 2008-09-21 21:44:29 +00:00
Dan Gohman
98a22f8a8f Factor out code into HandleVirtRegDef, for consistency with 
Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.

llvm-svn: 56412
 2008-09-21 21:11:41 +00:00
Dan Gohman
c8477ceabe Instead of building a list and sorting it just to find a maximum element, 
compute the maximum element directly.

llvm-svn: 56411
 2008-09-21 21:01:49 +00:00
Owen Anderson
981113c401 Fetch the starting index of the block when assigning intervals. This gets live-in indices 
correct in the presence of things like EH labels.

llvm-svn: 56410
 2008-09-21 20:43:24 +00:00
Chris Lattner
01cab96cba don't print GlobalAddressSDNode's with an offset of zero as "foo0". 
llvm-svn: 56399
 2008-09-21 18:38:31 +00:00
Chris Lattner
c018045520 add a note 
llvm-svn: 56391
 2008-09-20 19:17:53 +00:00
Duncan Sands
38b44d2a40 Implement review feedback from Devang: make use 
of mayReadFromMemory and mayWriteToMemory.

llvm-svn: 56387
 2008-09-20 16:45:58 +00:00
Dale Johannesen
4a0054dc9a Teach coalescer about earlyclobber bits. 
Check bits for preferred register.

llvm-svn: 56384
 2008-09-20 02:03:04 +00:00
Evan Cheng
270178bdda Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. 
llvm-svn: 56381
 2008-09-20 01:28:05 +00:00
Evan Cheng
6a86ec1ef0 No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it. 
llvm-svn: 56378
 2008-09-20 00:13:45 +00:00
Evan Cheng
7bcd8409b7 80 column violation. 
llvm-svn: 56377
 2008-09-20 00:13:08 +00:00
Dan Gohman
af1eeb6421 Fix a FastISel GlobalVariable CSE bug. 
llvm-svn: 56376
 2008-09-19 23:42:04 +00:00
Evan Cheng
23e36297d6 Continue after removing the current MI. 
llvm-svn: 56372
 2008-09-19 22:49:39 +00:00
Dan Gohman
f66b3277d3 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This 
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

llvm-svn: 56371
 2008-09-19 22:16:54 +00:00
Dale Johannesen
312df3aa6d Make earlyclobber stuff work when virtual regs 
have previously been assigned conflicting physreg.

llvm-svn: 56364
 2008-09-19 18:52:31 +00:00
Evan Cheng
14493ffe78 Re-materalized definition instructions may be dead. Whack them. 
llvm-svn: 56352
 2008-09-19 17:38:47 +00:00
Gabor Greif
984ba5a313 backing out my last commit, it was not intended to go on the trunk 
llvm-svn: 56349
 2008-09-19 15:13:20 +00:00
Gabor Greif
67fa076542 first shot at removing Use::Val 
untested, Use::swap() is definitely not done yet

llvm-svn: 56348
 2008-09-19 15:03:57 +00:00
Duncan Sands
b2b5ddfaf6 Remove the MarkModRef pass (use AddReadAttrs instead). 
Unfortunately this means removing one regression test
of GlobalsModRef because I couldn't work out how to
perform it without MarkModRef.

llvm-svn: 56342
 2008-09-19 08:23:44 +00:00
Duncan Sands
c2ff9ca568 Add a new pass AddReadAttrs which works out which functions 
can get the readnone/readonly attributes, and gives them it.
The plan is to remove markmodref (which did the same thing
by querying GlobalsModRef) and delete the analogous
functionality from GlobalsModRef.

llvm-svn: 56341
 2008-09-19 08:17:05 +00:00
Dale Johannesen
214ddc92d0 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis 
and redo as linked list walk.  Logic moved into RA.
Per review feedback.

llvm-svn: 56326
 2008-09-19 01:02:35 +00:00
Devang Patel
1e7ddf5d31 splitLoop does not handle split condition EQ. 
Fixes PR 2805

llvm-svn: 56321
 2008-09-18 23:45:14 +00:00
Dan Gohman
71b1f15917 Address-mode folding for X86FastISel. It's pretty basic, but it 
catches a fair number of common cases. Note that this currently
causes Fast-ISel to leave behind lots of dead instructions.
Those will be dealt with in subsequent commits.

llvm-svn: 56320
 2008-09-18 23:23:44 +00:00
Bill Wendling
aadf9b22a7 Decrementing the iterator here could be wrong if the worklist is empty after the "erase". 
Thanks to Ji Young Park for the patch!

llvm-svn: 56316
 2008-09-18 23:04:18 +00:00
Devang Patel
201223af46 Try to place hoisted instructions befoe icmp instruction. 
llvm-svn: 56315
 2008-09-18 22:50:42 +00:00
Evan Cheng
bcd694a1b4 Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. 
llvm-svn: 56314
 2008-09-18 22:38:47 +00:00
Dan Gohman
e1c4ad399a Simplify this code. The FastISel class has its own TD member. 
llvm-svn: 56311
 2008-09-18 18:26:43 +00:00
Dan Gohman
9dc56fbe40 Don't consider instructions with implicit physical register 
defs to be necessarily live.

llvm-svn: 56310
 2008-09-18 18:22:32 +00:00
Dan Gohman
b7c5b0f44b Add a new "fast" scheduler. This is currently basically just a 
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.

llvm-svn: 56307
 2008-09-18 16:26:26 +00:00
Evan Cheng
a0459a1c5a Preliminary support for systems which require changing JIT memory regions privilege from read / write to read / executable. 
llvm-svn: 56303
 2008-09-18 07:54:21 +00:00
Evan Cheng
6acdef5d11 Duh. Default to ARMCC::AL (always). 
llvm-svn: 56301
 2008-09-18 07:28:19 +00:00
Evan Cheng
99a186e39f Clean up. 
llvm-svn: 56300
 2008-09-18 07:27:23 +00:00
Evan Cheng
b44e839f76 Cosmetic. 
llvm-svn: 56299
 2008-09-18 07:24:33 +00:00
Dan Gohman
5fbd0e95f3 FastISel: For calls, prefer using the callee's address as a constant 
over having it in a register. And wait until after checking type
legality before requesting that the callee address be placed in a
register. Also, fix support for calls with void return type.

This speeds up fast-isel isel time by about 15% and reduces
instruction counts by about 3% overall on certain testcases. It also
changes many indirect calls to direct calls.

llvm-svn: 56292
 2008-09-17 21:18:49 +00:00
Dale Johannesen
99091ed94f Add a bit to mark operands of asm's that conflict 
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
 2008-09-17 21:13:11 +00:00
Evan Cheng
d3225118a6 Unallocatable registers do not have live intervals. 
llvm-svn: 56287
 2008-09-17 18:36:25 +00:00
Devang Patel
88efee2dcc Do not hoist instruction above branch condition. The instruction may use branch condition. 
llvm-svn: 56286
 2008-09-17 18:21:49 +00:00
Devang Patel
50c22bf69b Do not ignore iv uses outside the loop. 
This one slipped through cracks very well.

llvm-svn: 56284
 2008-09-17 17:53:47 +00:00
Dan Gohman
4bef47e8c3 Don't worry about clobbering physical register defs that aren't used. 
llvm-svn: 56281
 2008-09-17 15:25:49 +00:00
Evan Cheng
f2c04a10e6 Fix addrmode1 instruction encodings; fix bx_ret encoding. 
llvm-svn: 56277
 2008-09-17 07:53:38 +00:00
Evan Cheng
d268288d39 Specify instruction encoding using range list to avoid endianess issues. 
llvm-svn: 56276
 2008-09-17 07:16:21 +00:00
Dan Gohman
9475c22537 Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw 
up some new ascii art to illustrate what it does. This change
currently has no effect on generated code.

llvm-svn: 56270
 2008-09-17 01:39:10 +00:00
Dan Gohman
d0c6cb65e8 Add a new MachineInstr-level DCE pass. It is very simple, and is intended to 
be used with fast-isel.

llvm-svn: 56268
 2008-09-17 00:43:24 +00:00
Bill Wendling
b2701e541c Add trampoline support to PPC. GCC simply calls the "__trampoline_setup" 
function with appropriate parameters. This allows us to support blocks on PPC.

llvm-svn: 56267
 2008-09-17 00:30:57 +00:00
Evan Cheng
6cfbecd1fa When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. 
llvm-svn: 56258
 2008-09-16 23:12:11 +00:00
Dan Gohman
9cbb3f591a Change SelectionDAG::getConstantPool to always set the alignment of the 
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.

In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.

This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)

Patch by Paul Redmond!

llvm-svn: 56253
 2008-09-16 22:05:41 +00:00
Bill Wendling
932818c75a Reverting r56249. On further investigation, this functionality isn't needed. 
Apologies for the thrashing.

llvm-svn: 56251
 2008-09-16 21:48:12 +00:00
Dan Gohman
6da3227304 Include the alignment value when displaying ConstantPoolSDNodes. 
llvm-svn: 56250
 2008-09-16 21:18:22 +00:00
Bill Wendling
1a240c8033 - Change "ExternalSymbolSDNode" to "SymbolSDNode". 
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249
 2008-09-16 21:12:30 +00:00
Dan Gohman
f89b35c261 Fix these comments to reflect current reality. Surprisingly, 
MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.

llvm-svn: 56248
 2008-09-16 20:45:53 +00:00
Dan Gohman
885e592e9b Finally re-apply r46959. This is made feasible by the combination 
of r56230, r56232, and r56246.

llvm-svn: 56247
 2008-09-16 18:52:57 +00:00
Dan Gohman
c598e29a1c Improve instcombine's handling of integer min and max in two ways: 
- Recognize expressions like "x > -1 ? x : 0" as min/max and turn them
   into expressions like "x < 0 ? 0 : x", which is easily recognizable
   as a min/max operation.
 - Refrain from folding expression like "y/2 < 1" to "y < 2" when the
   comparison is being used as part of a min or max idiom, like
   "y/2 < 1 ? 1 : y/2". In that case, the division has another use, so
   folding doesn't eliminate it, and obfuscates the min/max, making it
   harder to recognize as a min/max operation.

These benefit ScalarEvolution, CodeGen, and anything else that wants to
recognize integer min and max.

llvm-svn: 56246
 2008-09-16 18:46:06 +00:00
Evan Cheng
f80fc084ef AllocateRWXMemory -> AllocateRWX. 
llvm-svn: 56244
 2008-09-16 17:28:18 +00:00
Dan Gohman
37457ca74b Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls 
are not enabled. Instead just omit the tail call flag when calls are
created.

llvm-svn: 56235
 2008-09-16 01:42:28 +00:00
Dan Gohman
54ef20348e Re-enables the new vector select in the bitcode reader, by modifying the 
bitcode reader/writer as follows:

- add and use new bitcode FUNC_CODE_INST_VSELECT to handle the llvm
select opcode using either i1 or [N x i1] as the selector.
- retain old BITCODE FUNC_CODE_INST_SELECT in the bitcode reader to
handle select on i1 for backwards compatibility with existing bitcode
files.
- re-enable the vector-select.ll test program.

Also, rename the recently added bitcode opcode FUNC_CODE_INST_VCMP to
FUNC_CODE_INST_CMP2 and make the bitcode writer use it to handle
fcmp/icmp on scalars or vectors. In the bitcode writer, use
FUNC_CODE_INST_CMP for vfcmp/vicmp only. In the bitcode reader, have
FUNC_CODE_INST_CMP handle icmp/fcmp returning bool, for backwards
compatibility with existing bitcode files.

Patch by Preston Gurd!

llvm-svn: 56233
 2008-09-16 01:01:33 +00:00
Dan Gohman
0045cec2ba Teach ScalarEvolution to consider loop preheaders in the search for 
an if statement that guards a loop, to allow indvars to avoid smax
operations in more situations.

llvm-svn: 56232
 2008-09-15 22:18:04 +00:00
Owen Anderson
553caa6ed4 Live intervals for live-in registers should begin at the beginning of a basic block, not at the first 
instruction.  Also, their valno's should have an unknown def.  This has no effect currently, but was
causing issues when StrongPHIElimination was enabled.

llvm-svn: 56231
 2008-09-15 22:00:38 +00:00
Dan Gohman
faa15214e0 Teach LSR to optimize away SMAX operations for tripcounts in common 
cases.  See the comment above OptimizeSMax for the full story, and
the testcase for an example. This cancels out a pessimization
commonly attributed to indvars, and will allow us to lift some of
the artificial throttles in indvars, rather than add new ones.

llvm-svn: 56230
 2008-09-15 21:22:06 +00:00
Bruno Cardoso Lopes
f6ad396dfa Fixed Bug 2751 
http://llvm.org/bugs/show_bug.cgi?id=2751

Abicall was enabled even when static code model was provided 
in the command line.
The correct behavior is to disable abicall when static is
specified.

llvm-svn: 56228
 2008-09-15 21:06:55 +00:00
Dan Gohman
f38d63884f Re-enable SelectionDAG CSE for calls. It matters in the case of 
libcalls, as in this testcase on ARM.

llvm-svn: 56226
 2008-09-15 19:46:03 +00:00
Evan Cheng
db1693cb14 Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#. 
llvm-svn: 56199
 2008-09-15 06:28:41 +00:00
Dan Gohman
6418cb3998 Fix WriteAsOperand to not emit a leading space character. Adjust 
its callers to emit a space character before calling it when a
space is needed.

This fixes several spurious whitespace issues in
ScalarEvolution's debug dumps. See the test changes for
examples.

This also fixes odd space-after-tab indentation in the output
for switch statements, and changes calls from being printed like
this:
  call void @foo( i32 %x )
to this:
  call void @foo(i32 %x)

llvm-svn: 56196
 2008-09-14 17:21:12 +00:00
Dale Johannesen
57fc1bdfdc adjust last patch per review feedback 
llvm-svn: 56194
 2008-09-14 01:44:36 +00:00
Dan Gohman
fa32c7c6d9 Remove isImm(), isReg(), and friends, in favor of 
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
 2008-09-13 17:58:21 +00:00
Duncan Sands
8d5640ac90 Fix PR2792: treat volatile loads as writing memory somewhere. 
Treat stores as reading memory, just to play safe.

llvm-svn: 56188
 2008-09-13 12:45:50 +00:00
Evan Cheng
63b98ccd5e Fix random abort. 
llvm-svn: 56184
 2008-09-13 01:55:59 +00:00
Dan Gohman
3450a8252f Define CallSDNode, an SDNode subclass for use with ISD::CALL. 
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
 2008-09-13 01:54:27 +00:00
Evan Cheng
775a37e4b4 Typo. 
llvm-svn: 56182
 2008-09-13 01:44:01 +00:00
Evan Cheng
200cdea934 Rely on instruction format to determine so_reg operand for now. 
llvm-svn: 56181
 2008-09-13 01:38:29 +00:00
Evan Cheng
0a3a595612 Revert 56176. All those instruction formats are still needed. 
llvm-svn: 56180
 2008-09-13 01:35:33 +00:00
Evan Cheng
1ac0a5f278 Accidentially flipped the condition. 
llvm-svn: 56179
 2008-09-13 01:29:57 +00:00
Evan Cheng
d68f2947a9 Add debug dumps. 
llvm-svn: 56178
 2008-09-13 01:15:21 +00:00
Evan Cheng
18fd8337b3 Eliminate unnecessary instruction formats. 
llvm-svn: 56176
 2008-09-12 23:15:39 +00:00
Evan Cheng
66e7651a16 Addrmode 1 S bit can be dynamically set. Look for CPSR def. 
llvm-svn: 56172
 2008-09-12 22:45:55 +00:00
Evan Cheng
adf6720626 Rewrite address mode 1 code emission routines. 
llvm-svn: 56171
 2008-09-12 22:01:15 +00:00
Evan Cheng
07046dae41 On some targets, non-move instructions can become move instructions because of coalescing. e.g. 
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1   // after coalescing vr0 with vr1

Update the value# of the destination register with the copy instruction if that happens.

llvm-svn: 56165
 2008-09-12 18:13:14 +00:00
Dan Gohman
082879cfde Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and 
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.

llvm-svn: 56162
 2008-09-12 18:08:03 +00:00
Dale Johannesen
6395da3510 Pass "earlyclobber" bit through to machine 
representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161
 2008-09-12 17:49:03 +00:00
Dan Gohman
89660301e3 Rename ConstantSDNode::getValue to getZExtValue, for consistency 
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
 2008-09-12 16:56:44 +00:00
Duncan Sands
94a4573005 Rather than marking all internal globals "Ref" 
when a readonly declaration is called, set a
flag.  This is faster and uses less memory.
In theory it is less accurate, because before
only those internal globals that were read
by someone were being marked "Ref", but now
all are.  But in practice, thanks to other
passes, all internal globals of the kind
considered here will be both read and stored
to: those only read will have been turned
into constants, and those only stored to will
have been deleted.

llvm-svn: 56143
 2008-09-12 07:29:58 +00:00
Dale Johannesen
fbc17046ff The sequence for ppcf128 compares was not IEEE 
safe in the presence of NaNs.

llvm-svn: 56136
 2008-09-12 00:30:56 +00:00
Dan Gohman
0b6d3a9a9b On 64-bit targets, change 32-bit getelementptr indices to be 64-bit 
getelementptr indices, inserting an explicit cast if necessary.
This helps expose the sign-extension operation to other optimizations.

llvm-svn: 56133
 2008-09-11 23:06:38 +00:00
Dan Gohman
5e154a591d Fix a vectorshuffle instcombine bug introduced by r55995. 
Patch by Nicolas Capens!

llvm-svn: 56129
 2008-09-11 22:47:57 +00:00
Jim Grosbach
a25a322741 udpate header comment: s/VP/VFP/ 
llvm-svn: 56126
 2008-09-11 21:41:29 +00:00
Arnold Schwaighofer
adfb111f10 When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case. 
llvm-svn: 56119
 2008-09-11 20:28:43 +00:00
Evan Cheng
5c7e3783ef Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. 
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.

llvm-svn: 56118
 2008-09-11 20:07:10 +00:00
Owen Anderson
743d45821a Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel. 
llvm-svn: 56117
 2008-09-11 19:44:55 +00:00
Duncan Sands
0a66a0ae55 Fix comment typo. 
llvm-svn: 56116
 2008-09-11 19:41:10 +00:00
Duncan Sands
39a7ae3d01 Intrinsics don't touch internal global variables 
(unless passed one via a parameter), even if they
are IntrWriteMem.

llvm-svn: 56115
 2008-09-11 19:35:55 +00:00
Dan Gohman
4ae5fa57b4 Fix a copy+paste bug that Duncan spotted. For several 
cases it was still getting lucky and detecting overflow
but it was clearly incorrect.

llvm-svn: 56113
 2008-09-11 18:53:02 +00:00
Evan Cheng
99be914c9a Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check. 
llvm-svn: 56112
 2008-09-11 18:40:32 +00:00
Duncan Sands
908b7525fa Intrinsics don't read these kinds of global 
variables.

llvm-svn: 56105
 2008-09-11 15:43:12 +00:00
Evan Cheng
9de997d5de Fix a 80 column violation. 
llvm-svn: 56097
 2008-09-11 05:58:06 +00:00
Dale Johannesen
10e1cf3df2 The version of AtomicSDNode::AtomicSDNode used (only) for 
cmp-and-swap reversed the Cmp and Swap arguments; comments
make it clear this is unintentional.  Unfortunately, the
x86 BE had a compensating reversal, which is removed here.
PPC is OK.

From inspection of the Alpha code I think it is OK, but
if somebody has that platform please check it out.  I
cannot test on that platform.

llvm-svn: 56091
 2008-09-11 03:12:59 +00:00
Owen Anderson
139baa5f74 If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on 
X86-64 in fast isel.

llvm-svn: 56088
 2008-09-11 02:41:37 +00:00
Dale Johannesen
8ac17c1f77 Succumb utterly to compatibility and implement 
__sync_fetch_and_nand as ANDC, even though that's
not what nand means.

llvm-svn: 56087
 2008-09-11 02:15:03 +00:00
Evan Cheng
b879f93ba5 Propagate subreg index when promoting a load to a copy. 
llvm-svn: 56085
 2008-09-11 01:02:12 +00:00
Dan Gohman
36e01356ec In my analysis for r56076 I missed the case where the original 
multiplication overflows.

llvm-svn: 56082
 2008-09-11 00:25:00 +00:00
Dan Gohman
ebfb483309 Fix an icmp+sdiv optimization to check for and handle an overflow 
condition. This fixes PR2740.

llvm-svn: 56076
 2008-09-10 23:30:57 +00:00
Dan Gohman
9eca554828 X86FastISel support for double->float and float->double casts. 
llvm-svn: 56070
 2008-09-10 21:02:08 +00:00
Dan Gohman
ad5824104b FastISel support for i1 PHI nodes. 
llvm-svn: 56069
 2008-09-10 21:01:31 +00:00
Dan Gohman
5a6134a875 FastISel support for i1 constants. 
llvm-svn: 56068
 2008-09-10 21:01:08 +00:00
Owen Anderson
6bcc01b3eb Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This 
was exposed by fast isel's handling of shifts on X86-64.  With this, FreeBench/pcompress2 passes on X86-64 in fast isel.

llvm-svn: 56067
 2008-09-10 20:41:13 +00:00
Dan Gohman
3ccdde5eef Add X86FastISel support for static allocas, and refences 
to static allocas. As part of this change, refactor the
address mode code for laods and stores.

llvm-svn: 56066
 2008-09-10 20:11:02 +00:00
Evan Cheng
474ba35954 Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices on machine operands. 
llvm-svn: 56065
 2008-09-10 20:08:45 +00:00
Evan Cheng
83c694fbe7 Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc. 
llvm-svn: 56061
 2008-09-10 18:25:29 +00:00
Dale Johannesen
3e4bbf01d0 Handle new intrinsics with vector arguments. 
Patch by Paul Redmond.

llvm-svn: 56059
 2008-09-10 17:31:40 +00:00
Dan Gohman
5211f1f5fc Add a break statement that I accidentally deleted when 
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.

llvm-svn: 56057
 2008-09-10 15:52:34 +00:00
Devang Patel
092285d4e4 fix white spaces. 
llvm-svn: 56056
 2008-09-10 14:49:55 +00:00
Duncan Sands
6e9362aeaa Fix name. 
llvm-svn: 56055
 2008-09-10 13:22:10 +00:00
Duncan Sands
c3de6e13df Add trampoline support for the new FastCC calling 
convention (not related to recent Ada testsuite
failures).

llvm-svn: 56054
 2008-09-10 13:11:09 +00:00
Duncan Sands
63ef24bfb1 Turn off the new FastCC for the moment. It causes 
a slew of Ada testsuite failures on x86-32 linux.
Seems to be related to the use of float.

llvm-svn: 56053
 2008-09-10 13:09:24 +00:00
Bill Wendling
c7c5d73866 Remove unnecessary bit-wise AND from the limited precision work. 
llvm-svn: 56049
 2008-09-10 06:26:10 +00:00
Daniel Dunbar
df44fb835c Fix 80 col violation. 
llvm-svn: 56048
 2008-09-10 04:16:29 +00:00
Dan Gohman
3809753d3b Fix a warning about comparing signed and unsigned values. 
llvm-svn: 56040
 2008-09-10 01:09:32 +00:00
Evan Cheng
1ac90281be Fix typo. 
llvm-svn: 56037
 2008-09-10 00:30:50 +00:00
Bill Wendling
4dc9d148b5 Check that both operands are f32 before attempting to lower. 
llvm-svn: 56036
 2008-09-10 00:24:59 +00:00
Bill Wendling
aa39e64468 Implement "visitPow". This is mainly used to see if we have a pow() call of this 
form:

          powf(10.0f, x);

If this is the case, and also we want limited precision floating-point
calculations, then lower to do the limited-precision stuff.

llvm-svn: 56035
 2008-09-10 00:20:20 +00:00
Evan Cheng
150ee094e2 A few more places where FPOW is being ignored. 
llvm-svn: 56032
 2008-09-09 23:35:53 +00:00
Dan Gohman
5b55c46044 Change -fast-isel-no-abort to -fast-isel-abort, which now defaults 
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.

llvm-svn: 56029
 2008-09-09 23:05:00 +00:00
Evan Cheng
ba11945234 Legalizer was missing code that expand fpow to a libcall. 
llvm-svn: 56028
 2008-09-09 23:02:14 +00:00
Bill Wendling
5d6d774240 Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2 
function.

llvm-svn: 56025
 2008-09-09 22:39:21 +00:00
Dale Johannesen
ba2bbe0c55 Move the uglier parts of deciding not to emit a 
UsedDirective for some symbols in llvm.used into
Darwin-specific code.  I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.

llvm-svn: 56024
 2008-09-09 22:29:13 +00:00
Bill Wendling
103d08d4ce Add support for 6-, 12-, and 18-bit limited precision calculations of exp for 
floating-point numbers.

llvm-svn: 56023
 2008-09-09 22:13:54 +00:00
Dan Gohman
2799e1dc63 Add a new option, -fast-isel-verbose, that can be used with 
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.

llvm-svn: 56021
 2008-09-09 22:06:46 +00:00
Evan Cheng
f3a3ee6d01 Clear preference when it no longer makes sense. 
llvm-svn: 56019
 2008-09-09 21:44:23 +00:00
Devang Patel
7365754925 if loop induction variable is always sign or zero extended then 
extend the type of induction variable.

llvm-svn: 56017
 2008-09-09 21:41:07 +00:00
Devang Patel
b08f098957 Add assertion check. 
llvm-svn: 56016
 2008-09-09 21:38:40 +00:00
Devang Patel
36ad68421e fix overflow check. 
llvm-svn: 56011
 2008-09-09 20:54:34 +00:00
Owen Anderson
0bdc9407ca Clean this up, based on Evan's suggestions. 
llvm-svn: 56009
 2008-09-09 20:47:17 +00:00
Bill Wendling
929486349f - Add support for 6-, 12-, and 18-bit limited precision floating-point "log" 
values.
- Refactored some of the code.

llvm-svn: 56008
 2008-09-09 20:39:27 +00:00
Evan Cheng
304fba81c9 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. 
llvm-svn: 56006
 2008-09-09 20:22:01 +00:00
Anton Korobeynikov
6ad8b060d0 Make safer variant of alias resolution routine to be default 
llvm-svn: 56005
 2008-09-09 20:05:04 +00:00
Duncan Sands
f9234f2a22 Simplify this some more. No functionality change. 
llvm-svn: 56003
 2008-09-09 19:56:34 +00:00
Anton Korobeynikov
4676c09dc8 Resolve aliases, when possible 
llvm-svn: 56001
 2008-09-09 19:04:59 +00:00
Bill Wendling
727b25981a Add limited precision floating-point conversions of log10 for 6- and 18-bit 
precisions.

llvm-svn: 56000
 2008-09-09 18:42:23 +00:00
Dan Gohman
88053b82e5 Mark IMPLICIT_DEF as being rematerializable and cheap-as-a-move. 
It's already special-cased and treated as rematerializable within
LiveIntervals; this allows it to be handled by other passes
such as TwoAddressInstrctionPass.

llvm-svn: 55999
 2008-09-09 18:25:28 +00:00
Anton Korobeynikov
bcf0165453 Fix typo 
llvm-svn: 55998
 2008-09-09 18:24:07 +00:00
Anton Korobeynikov
3a24741034 Fix incorrect linker behaviour: we shouldn't resolve weak aliases. 
llvm-svn: 55997
 2008-09-09 18:23:48 +00:00