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Commit Graph

200319 Commits

Author SHA1 Message Date
David Blaikie
3cfbc95ca8 [llvm] Add contains(KeyType) -> bool methods to SetVector
Matches C++20 API addition.

Differential Revision: https://reviews.llvm.org/D83449
2020-07-17 11:26:27 -07:00
David Blaikie
f4752de569 [llvm] Add contains(KeyType) -> bool methods to DenseSet
Matches C++20 API addition.

Differential Revision: https://reviews.llvm.org/D83449
2020-07-17 11:26:26 -07:00
Stanislav Mekhanoshin
27cd2159b8 Fixed warning about signed/unsigned comparison
I've got the report clang11 issues signed/unsigned mismatch
warning here. For some reason only clang11 seems to issue
this warning.

Differential Revision: https://reviews.llvm.org/D83916
2020-07-17 11:03:42 -07:00
George Rokos
314bec7af9 Added missing API call to OpenMP test 2020-07-17 10:40:11 -07:00
Dmitry Preobrazhensky
baa6e7486c [AMDGPU] Removed s_mov_regrd and mov_fed opcodes
These opcodes are not intended for public use.

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D81659
2020-07-17 19:52:54 +03:00
Yonghong Song
51c6311d11 BPF: generate .rodata BTF datasec for certain initialized local var's
Currently, BTF datasec type for .rodata is generated only if there are
user-defined readonly global variables which have debuginfo generated.

Certain readonly global variables may be generated from initialized
local variables. For example,
  void foo(const void *);
  int test() {
    const struct {
      unsigned a[4];
      char b;
    } val = { .a = {2, 3, 4, 5}, .b = 6 };
    foo(&val);
    return 0;
  }

The clang will create a private linkage const global to store
the initialized value:
  @__const.test.val = private unnamed_addr constant %struct.anon
      { [4 x i32] [i32 2, i32 3, i32 4, i32 5], i8 6 }, align 4

This global variable eventually is put in .rodata ELF section.

If there is .rodata ELF section, libbpf expects a BTF .rodata
datasec as well even though it may be empty meaning there are no
global readonly variables with proper debuginfo. Martin reported
a bug where without this empty BTF .rodata datasec, the bpftool
gen will exit with an error.

This patch fixed the issue by generating .rodata BTF datasec
if there exists local var intial data which will result in
.rodata ELF section.

Differential Revision: https://reviews.llvm.org/D84002
2020-07-17 09:45:57 -07:00
Fangrui Song
3744006268 [OptTable] Support grouped short options
POSIX.1-2017 12.2 Utility Syntax Guidelines, Guideline 5 says:

> One or more options without option-arguments, followed by at most one option that takes an option-argument, should be accepted when grouped behind one '-' delimiter.

i.e. -abc represents -a -b -c. The grouped short options are very common.  Many
utilities extend the syntax by allowing (an option with an argument) following a
sequence of short options.

This patch adds the support to OptTable, similar to cl::Group for CommandLine
(D58711).  llvm-symbolizer will use the feature (D83530). CommandLine is exotic
in some aspects. OptTable is preferred if the user wants to get rid of the
behaviors.

* `cl::opt<bool> i(...)` can be disabled via -i=false or -i=0, which is
  different from conventional --no-i.
* Handling --foo & --no-foo requires a comparison of argument positions,
  which is a bit clumsy in user code.

OptTable::parseOneArg (non-const reference InputArgList) is added along with
ParseOneArg (const ArgList &). The duplicate does not look great at first
glance. However, The implementation can be simpler if ArgList is mutable.
(ParseOneArg is used by clang-cl (FlagsToInclude/FlagsToExclude) and lld COFF
(case-insensitive). Adding grouped short options can make the function even more
complex.)

The implementation allows a long option following a group of short options. We
probably should refine the code to disallow this in the future. Allowing this
seems benign for now.

Reviewed By: grimar, jhenderson

Differential Revision: https://reviews.llvm.org/D83639
2020-07-17 09:32:43 -07:00
Nico Weber
74cfe04a0f [gn build] Run git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format 2020-07-17 12:31:42 -04:00
Nikita Popov
9f13e86ec9 [IR] Fix MSVC warning (NFC)
As requested by Andrew Kaylor, rewrite this code in a way that does
not warn on old MSVC versions.

Avoid the buggy constexpr warning by just not using constexpr and
removing the static_assert that depends on it.
2020-07-17 18:27:39 +02:00
Nico Weber
598efdf414 [gn build] (manually) merge 6c43ed608 2020-07-17 12:27:21 -04:00
Nico Weber
1fb7448577 [gn build] Make sync_source_lists_from_cmake handle one-line sources lines
sync_source_lists_from_cmake now also looks for source files in
`sources += [ "foo.cc" ]` lines, which allows us to remove most
`# Make `gn format` not collapse this` comments.

(sync_source_lists_from_cmake doesn't look for `foo_headers += [...]`
still, so the comment is still needed in two places for that.)

No intentional behavior change.
2020-07-17 11:53:42 -04:00
Sanjay Patel
98ef1ef387 [InstSimplify] add tests for fcmp with infinity; NFC 2020-07-17 11:51:41 -04:00
Matt Arsenault
ca2be9d697 AMDGPU: Fix promoting f16 fpowi with legal f16 2020-07-17 11:29:05 -04:00
Nico Weber
5e45050636 [gn format] (manually) merge 6bddd099ac 2020-07-17 11:21:42 -04:00
Sameer Arora
4336e89619 Introducing llvm-libtool-darwin
This diff starts the implementation of llvm-libtool-darwin
(an llvm based replacement of cctool's libtool).
Libtool is used for creating static and dynamic libraries
from a bunch of object files given as input.

Reviewed by alexshap, smeenai, jhenderson, MaskRay

Differential Revision: https://reviews.llvm.org/D82923
2020-07-17 08:07:02 -07:00
LLVM GN Syncbot
02ac158b95 [gn build] Port 6bddd099ac1 2020-07-17 14:58:08 +00:00
Clement Courbet
17ad6e2f24 Revert "[llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more precise measurements."
From @erichkeane:
```
This patch doesn't seem to build for me:
/iusers/ekeane1/workspaces/llvm-project/llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp: In function ‘llvm::Error llvm::exegesis::parseDataBuffer(const char*, size_t, const void*, const void*, llvm::SmallVector<long int, 4>*)’:
/iusers/ekeane1/workspaces/llvm-project/llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp:99:37: error: ‘struct perf_branch_entry’ has no member named ‘cycles’

CycleArray->push_back(Entry.cycles);
I'm on RHEL7, so I have kernel 3.10, so it doesn't have 'cycles'.

According ot this: https://elixir.bootlin.com/linux/v4.3/source/include/uapi/linux/perf_event.h#L963 kernel 4.3 is the first time that 'cycles' appeared in this structure.
```
2020-07-17 16:55:17 +02:00
Sjoerd Meijer
28b4443df5 [ARM][MVE] Reorg of the LV tail-folding tests
It was getting difficult to see which test was in which file, so this
reorganises the test files so that now all filenames start with tail-folding-*
followed by a more descriptive name what that group of tests check.
2020-07-17 15:54:15 +01:00
Florian Hahn
68534ef790 [Matrix] Only run matrix lowering early with -O0.
Currently matrix lowering is run twice if OptLevel > 0. Fix that and
also add a test for OptLevel > 0 with matrix lowering enabled.
2020-07-17 15:53:16 +01:00
LLVM GN Syncbot
bd49fc9d37 [gn build] Port c7562e77b3a 2020-07-17 14:38:56 +00:00
David Tenty
b0aea9c3d7 [z/OS][AIX] Move lambda definition to fix build problem
This is a follow on change to eed19bd8 and contains a fix for a build
failure that occurs on both z/OS and AIX as a result of this commit:

https://reviews.llvm.org/rG670915094462d831e3733e5b01a76471b8cf6dd8.
2020-07-17 10:08:01 -04:00
Sidharth Baveja
c84735516f [Loop Simplify] Resolve an issue where metadata is not applied to a loop latch.
Summary:
This patch resolves an issue where the metadata of a loop is not added to the
new loop latch, and not removed from the old loop latch. This issue occurs in
the SplitBlockPredecessors function, which  adds a new block in a loop, and
in the case that the block passed into this function is the header of the loop,
the loop can be modified such that the latch of the loop is replaced.
This patch applies to the Loop Simplify pass since it ensures that each loop
has exit blocks which only have predecessors that are inside of the loop. In
the case that this is not true, the pass will create a new exit block for the
loop. This guarantees that the loop preheader/header will dominate the exit blocks.

Author: sidbav (Sidharth Baveja)

Reviewers: asbirlea (Alina Sbirlea), chandlerc (Chandler Carruth), Whitney (Whitney Tsang), bmahjour (Bardia Mahjour)

Reviewed By:  asbirlea (Alina Sbirlea)

Subscribers: hiraditya (Aditya Kumar), llvm-commits

Tag: LLVM

Differential Revision: https://reviews.llvm.org/D83869
2020-07-17 14:02:14 +00:00
Sam Parker
ef04808683 [NFC][ARM] Add SimplifyCFG test 2020-07-17 14:07:40 +01:00
Eric Astor
a399653f34 [ms] [llvm-ml] Remove unused function
Summary: Remove unused function

Reviewed By: lbenes

Differential Revision: https://reviews.llvm.org/D83898
2020-07-17 09:06:37 -04:00
Anna Welker
4602a7766d [LV] Enable the LoopVectorizer to create pointer inductions
This patch enables the LoopVectorizer to build a phi of pointer
type and provide the vector loads and stores with vector type
getelementptrs built from the pointer induction variable, which
produces much less instructions than the previous approach of
creating scalar getelementpointers and glue them together to a
vector.

Differential Revision: https://reviews.llvm.org/D81267
2020-07-17 13:35:07 +01:00
Georgii Rymar
1b5aa47a6f [llvm-readobj] - Add proper testing for the SHT_MIPS_ABIFLAGS section.
This rewrites the mips-abiflags.test to stop using recompiled objects,
adds testing for all missed bits and also adds two missing enum values
to lib/ObjectYAML, which are used in the new test.

Differential revision: https://reviews.llvm.org/D83954
2020-07-17 15:24:39 +03:00
Jay Foad
cf3e70d78a [AMDGPU] Add some missing check prefixes and tweak test
The test needed some extra ALU instructions to prevent it from being
memory bound.
2020-07-17 12:57:47 +01:00
Jay Foad
e4b72f8289 [AMDGPU] Add some missing check prefixes 2020-07-17 12:56:29 +01:00
Sanjay Patel
bbbeeb92be [x86] add tests for FMA with FMF; NFC 2020-07-17 07:52:29 -04:00
Benjamin Kramer
1ba25f1bd7 Make helpers static. NFC. 2020-07-17 13:49:11 +02:00
Hans Wennborg
c9528722ad Add -flang flag to the test-release.sh script
The flag is off by default.
2020-07-17 13:30:14 +02:00
Sam Tebbs
6329f986c9 [HWLoops] Stop converting to a while loop when it would be unsafe to
There were cases where a do-while loop would be converted to a while
loop before finding out that it would be unsafe to expand the SCEV in
this situation and then bailing out of hardware loop conversion.

This patch checks if it would be unsafe to expand the SCEV and if so stops converting the do-while into a while, allowing conversion to a hardware loop.

Differential Revision: https://reviews.llvm.org/D83953
2020-07-17 11:47:08 +01:00
Jay Foad
e0b62e4d14 [AMDGPU] Avoid splitting FLAT offsets in unsafe ways
As explained in the comment:

// For a FLAT instruction the hardware decides whether to access
// global/scratch/shared memory based on the high bits of vaddr,
// ignoring the offset field, so we have to ensure that when we add
// remainder to vaddr it still points into the same underlying object.
// The easiest way to do that is to make sure that we split the offset
// into two pieces that are both >= 0 or both <= 0.

In particular FLAT (as opposed to SCRATCH and GLOBAL) instructions have
an unsigned immediate offset field, so we can't use it to help split a
negative offset.

Differential Revision: https://reviews.llvm.org/D83394
2020-07-17 11:44:10 +01:00
Jay Foad
f65d86c32b [TableGen] Report an error instead of asserting
This gives a nice error if you accidentally try to use an empty list for
the RegTypes of a RegisterClass.

Differential Revision: https://reviews.llvm.org/D78285
2020-07-17 11:32:46 +01:00
Max Kazantsev
632293dfd7 [InstCombine][Test] Test for fix of replacing select with Phis when branch has the same labels
An additional test that allows to check the correctness of handling the case of the same
branch labels in the dominator when trying to replace select with phi-node.

Patch By: Kirill Polushin
Differential Revision: https://reviews.llvm.org/D84006
Reviewed By: mkazantsev
2020-07-17 17:16:28 +07:00
Jay Foad
3f23d4b8c3 [MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristics
tryLatency compares two sched candidates. For the top zone it prefers
the one with lesser depth, but only if that depth is greater than the
total latency of the instructions we've already scheduled -- otherwise
its latency would be hidden and there would be no stall.

Unfortunately it only tests the depth of one of the candidates. This can
lead to situations where the TopDepthReduce heuristic does not kick in,
but a lower priority heuristic chooses the other candidate, whose depth
*is* greater than the already scheduled latency, which causes a stall.

The fix is to apply the heuristic if the depth of *either* candidate is
greater than the already scheduled latency.

All this also applies to the BotHeightReduce heuristic in the bottom
zone.

Differential Revision: https://reviews.llvm.org/D72392
2020-07-17 11:02:13 +01:00
Florian Hahn
42cb8128e2 [ScheduleDAG] Move DBG_VALUEs after first term forward.
MBBs are not allowed to have non-terminator instructions after the first
terminator. Currently in some cases (see the modified test),
EmitSchedule can add DBG_VALUEs after the last terminator, for example
when referring a debug value that gets folded into a TCRETURN
instruction on ARM.

This patch updates EmitSchedule to move inserted DBG_VALUEs just before
the first terminator. I am not sure if there are terminators produce
values that can in turn be used by a DBG_VALUE. In that case, moving the
DBG_VALUE might result in referencing an undefined register. But in any
case, it seems like currently there is no way to insert a proper DBG_VALUEs
for such registers anyways.

Alternatively it might make sense to just remove those extra DBG_VALUES.

I am not too familiar with the details of debug info in the backend and
would appreciate any suggestions on how to address the issue in the best
possible way.

Reviewers: vsk, aprantl, jpaquette, efriedma, paquette

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D83561
2020-07-17 10:27:43 +01:00
Kai Luo
71e1d22d77 [PowerPC] Precommit test case for PR46759. NFC. 2020-07-17 08:41:15 +00:00
Marco Elver
155722cf56 [TSan] Add option for emitting compound read-write instrumentation
This adds option -tsan-compound-read-before-write to emit different
instrumentation for the write if the read before that write is omitted
from instrumentation. The default TSan runtime currently does not
support the different instrumentation, and the option is disabled by
default.

Alternative runtimes, such as the Kernel Concurrency Sanitizer (KCSAN)
can make use of the feature. Indeed, the initial motivation is for use
in KCSAN as it was determined that due to the Linux kernel having a
large number of unaddressed data races, it makes sense to improve
performance and reporting by distinguishing compounded operations. E.g.
the compounded instrumentation is typically emitted for compound
operations such as ++, +=, |=, etc. By emitting different reports, such
data races can easily be noticed, and also automatically bucketed
differently by CI systems.

Reviewed By: dvyukov, glider

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83867
2020-07-17 10:24:20 +02:00
Simon Wallis
071d6b613d [ARM] halfword store hits llvm_unreachable with big-endian
Summary:
[ARM] halfword store hits llvm_unreachable with big-endian

Provide missing case in getFixupKindContainerSizeBytes().

This stops execution reaching llvm_unreachable("Unknown fixup kind!")

D83947

Reviewers: olista01, ostannard

Reviewed By: ostannard

Subscribers: ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83947

Change-Id: I598aa1fb51fd1c6f424c557c85d6df6d1958bc62
2020-07-17 08:56:44 +01:00
Max Kazantsev
e9d1a19025 [InstCombine] Fix replace select with Phis when branch has the same labels
```
define i32 @test(i1 %cond) {
entry:
  br i1 %cond, label %exit, label %exit
exit:
  %result = select i1 %cond, i32 123, i32 456
  ret i32 %result
}
```
In this test, after applying transformation of replacing select with Phis,
the result will be:

```
define i32 @test(i1 %cond) {
entry:
  br i1 %cond, label %exit, label %exit
exit:
  %result = i32 phi [123, %exit], [123, %exit]
  ret i32 %result
}
```
That is, select is transformed into an invalid Phi, which will then be
reduced to 123 and the second value will be lost. But it is worth
noting that this problem will arise only if select is in the InstCombine
worklist will be before the branch. Otherwise, InstCombine will replace
the branch condition with false and transformation will not be applied.

The fix is to check the target labels in the branch condition for equality.

Patch By: Kirill Polushin
Differential Revision: https://reviews.llvm.org/D84003
Reviewed By: mkazantsev
2020-07-17 14:04:58 +07:00
hsmahesha
95efa5a025 Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size"
This reverts commit cc9d69385659be32178506a38b4f2e112ed01ad4.
2020-07-17 12:20:37 +05:30
Igor Kudrin
da3ec54200 [DebugInfo] Fix a misleading usage of DWARF forms with DIEExpr. NFCI.
For now, DIEExpr is used only in two places:

 1) in the debug info library unit test suite to emit
    a DW_AT_str_offsets_base attribute with the DW_FORM_sec_offset
    form, see dwarfgen::DIE::addStrOffsetsBaseAttribute();

 2) in DwarfCompileUnit::addLocationAttribute() to generate the location
    attribute for a TLS variable.

The later case used an incorrect DWARF form of DW_FORM_udata, which
implies storing an uleb128 value, not a 4/8 byte constant. The generated
result was as expected because DIEExpr::SizeOf() did not handle the used
form, but returned the size of the code pointer by default.

The patch fixes the issue by using more appropriate DWARF forms for
the problematic case and making DIEExpr::SizeOf() more straightforward.

Differential Revision: https://reviews.llvm.org/D83958
2020-07-17 13:49:27 +07:00
Craig Topper
5326734b74 [X86] Change the scheduler model for 'pentium4' to SandyBridgeModel.
I meant to do this in D83913, but missed it while updating the
feature list.

Interestingly I think this is disabling the postRA scheduler. But
it does match our default 64-bit behavior.

Reviewed By: echristo

Differential Revision: https://reviews.llvm.org/D83996
2020-07-16 22:04:29 -07:00
Craig Topper
270ec5454e [X86] Reorder how the subtarget map key is created.
We use a SmallString<512> and attempted to reserve enough space
for CPU plus Features, but that doesn't account for all the things
that get added to the string.

Reorder the string so the shortest things go first which shouldn't
exceed the small size. Finally add the feature string at the end
which might be long. This should ensure at most one heap allocation
without needing to use reserve.

I don't know if this matters much in practice, but I was looking
into something else that will require more code here and noticed
the odd reserve call.
2020-07-16 21:41:45 -07:00
Jonas Devlieghere
16a18d9f67 [llvm] Add RISCVTargetParser.def to the module map
This fixes the modules build.
2020-07-16 21:39:13 -07:00
Juneyoung Lee
567f280d45 [ValueTracking] Let isGuaranteedNotToBeUndefOrPoison consider noundef
This patch adds support for noundef arguments.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D83752
2020-07-17 12:53:08 +09:00
Juneyoung Lee
65e5933ae8 Add a test for D83752 2020-07-17 12:50:40 +09:00
Xing GUO
9e9b375895 [DWARFYAML] Merge forms that use same encodings. NFC. 2020-07-17 11:31:49 +08:00
Juneyoung Lee
a4af7cf1e9 [LangRef] Mention that freeze does not consider aggregate's paddings
Make explicit that freeze does not touch paddings of an aggregate.
(Relevant comment: https://reviews.llvm.org/D83752#2152550)

This implies that `v = freeze(load p); store v, q` may still leave undef bits
or poison in memory if `v` is an aggregate, but it still happens for
non-byte integers such as i1.

Differential Revision: https://reviews.llvm.org/D83927
2020-07-17 11:53:26 +09:00