Chris Lattner
0d40275b0e
enable the branch folding pass for the JIT.
...
llvm-svn: 31777
2006-11-16 01:00:07 +00:00
Evan Cheng
43ba439abd
Fix an incorrectly inverted condition.
...
llvm-svn: 31773
2006-11-16 00:08:20 +00:00
Evan Cheng
3ba3e10448
Match live variable changes.
...
llvm-svn: 31762
2006-11-15 20:55:15 +00:00
Evan Cheng
cf45b9fa95
Minor updates.
...
llvm-svn: 31761
2006-11-15 20:54:29 +00:00
Evan Cheng
7b19d271c4
A register def can be partially dead when the whole register has use(s) but a subreg does not.
...
llvm-svn: 31760
2006-11-15 20:54:11 +00:00
Evan Cheng
d79427b22c
Do away with kill / dead maps. Move kill / dead info onto MI's.
...
llvm-svn: 31759
2006-11-15 20:51:59 +00:00
Chris Lattner
ccbbe940eb
Simplify IntrinsicLowering and clarify that it is only for use by the
...
CBE and interpreter.
llvm-svn: 31755
2006-11-15 18:00:10 +00:00
Chris Lattner
286bb6e482
remove dead #include
...
llvm-svn: 31753
2006-11-15 17:51:15 +00:00
Evan Cheng
0e82270ff2
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Evan Cheng
7cabf9d02c
- Let MachineInstr ctors add implicit def and use operands. Other operands
...
will be inserted before these operands. If the opcode changes (by
setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
that move kill / dead info to MachineInstr's.
llvm-svn: 31711
2006-11-13 23:34:06 +00:00
Reid Spencer
60a8a2e025
Make an assert comment match the tested assertion.
...
llvm-svn: 31686
2006-11-11 20:07:59 +00:00
Evan Cheng
7dab9abfb8
Add methods to add implicit def use operands to a MI.
...
llvm-svn: 31675
2006-11-11 10:20:02 +00:00
Chris Lattner
edfc824673
disallow preinc of a frameindex. This is not profitable and causes 2-addr
...
pass to explode. This fixes a bunch of llc-beta failures on ppc last night.
llvm-svn: 31661
2006-11-11 01:00:15 +00:00
Chris Lattner
bf0c3e3a02
reduce indentation by using early exits. No functionality change.
...
llvm-svn: 31660
2006-11-11 00:56:29 +00:00
Chris Lattner
671ea7a93b
move big chunks of code out-of-line, no functionality change.
...
llvm-svn: 31658
2006-11-11 00:39:41 +00:00
Chris Lattner
1f61c6c84d
Fix a dag combiner bug exposed by my recent instcombine patch. This fixes
...
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast
llvm-svn: 31644
2006-11-10 21:37:15 +00:00
Evan Cheng
013597778d
Add implicit def / use operands to MachineInstr.
...
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
Evan Cheng
78ba99caa5
When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle.
...
llvm-svn: 31631
2006-11-10 08:28:11 +00:00
Chris Lattner
efb62464b9
commentate
...
llvm-svn: 31627
2006-11-10 04:41:34 +00:00
Evan Cheng
17dd6dd46c
Don't attempt expensive pre-/post- indexed dag combine if target does not support them.
...
llvm-svn: 31598
2006-11-09 19:10:46 +00:00
Evan Cheng
c050bb298f
Add a mechanism to specify whether a target supports a particular indexed load / store.
...
llvm-svn: 31597
2006-11-09 18:56:43 +00:00
Evan Cheng
22bb3ba200
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31596
2006-11-09 18:44:21 +00:00
Evan Cheng
89ee587963
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31595
2006-11-09 17:55:04 +00:00
Jim Laskey
8a5a95d868
Allows debugging llc self hosted.
...
llvm-svn: 31594
2006-11-09 16:32:26 +00:00
Jim Laskey
19fb42c34d
Merging dwarf info to a single compile unit.
...
llvm-svn: 31593
2006-11-09 14:52:14 +00:00
Evan Cheng
6b7d127df9
getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT.
...
llvm-svn: 31584
2006-11-09 04:29:46 +00:00
Evan Cheng
8743c67826
Remove M_2_ADDR_FLAG.
...
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
Evan Cheng
fcef896f6e
Match more post-indexed ops.
...
llvm-svn: 31569
2006-11-08 20:27:27 +00:00
Jim Laskey
28fec74f1b
Remove redundant <cmath>.
...
llvm-svn: 31561
2006-11-08 19:16:44 +00:00
Jim Laskey
4d636f03f7
Now can re-enable debug label folding.
...
llvm-svn: 31549
2006-11-08 14:17:45 +00:00
Evan Cheng
1f5c4a6c43
- When performing pre-/post- indexed load/store transformation, do not worry
...
about whether the new base ptr would be live below the load/store. Let two
address pass split it back to non-indexed ops.
- Minor tweaks / fixes.
llvm-svn: 31544
2006-11-08 08:30:28 +00:00
Evan Cheng
acc6a98286
Fixed a minor bug preventing some pre-indexed load / store transformation.
...
llvm-svn: 31543
2006-11-08 06:56:05 +00:00
Reid Spencer
da1f5b882a
For PR950:
...
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.
llvm-svn: 31542
2006-11-08 06:47:33 +00:00
Evan Cheng
e50f5e4c05
Fix a obscure post-indexed load / store dag combine bug.
...
llvm-svn: 31537
2006-11-08 02:38:55 +00:00
Chris Lattner
f71921c79d
optimize single MBB loops better. In particular, produce:
...
LBB1_57: #bb207.i
movl 72(%esp), %ecx
movb (%ecx,%eax), %cl
movl 80(%esp), %edx
movb %cl, 1(%edx,%eax)
incl %eax
cmpl $143, %eax
jne LBB1_57 #bb207.i
jmp LBB1_64 #cond_next255.i
intead of:
LBB1_57: #bb207.i
movl 72(%esp), %ecx
movb (%ecx,%eax), %cl
movl 80(%esp), %edx
movb %cl, 1(%edx,%eax)
incl %eax
cmpl $143, %eax
je LBB1_64 #cond_next255.i
jmp LBB1_57 #bb207.i
This eliminates a branch per iteration of the loop. This hurted PPC
particularly, because the extra branch meant another dispatch group for each
iteration of the loop.
llvm-svn: 31530
2006-11-08 01:03:21 +00:00
Jim Laskey
f0843a78c4
Accidently reran commit.
...
llvm-svn: 31516
2006-11-07 21:58:55 +00:00
Jim Laskey
5264310433
Missed a label map, reverting till covered.
...
llvm-svn: 31514
2006-11-07 21:37:31 +00:00
Jim Laskey
54a8f6f998
Missed a label map, reverting till covered.
...
llvm-svn: 31512
2006-11-07 20:53:05 +00:00
Jim Laskey
7e0f0b2d24
1. Add a pass to fold debug label instructions so a debug info client can detect
...
empty ranges.
2. Reorg how MachineDebugInfo maintains changes to debug labels.
3. Have dwarf writer use debug label info to simplify scopes and source line
coorespondence.
4. Revert the merging of compile units until I can get the bugs ironed out.
llvm-svn: 31507
2006-11-07 19:33:46 +00:00
Chris Lattner
3e2e03ef34
Enable improved spilling costs by default. This speeds up viterbi on x86
...
by 40%, FreeBench/fourinarow by 20%, and many other programs 10-25%.
On PPC, this speeds up fourinarow by 18%, and probably other things as well.
llvm-svn: 31504
2006-11-07 18:04:58 +00:00
Jim Laskey
4b1aff4aec
Use correct value for float HUGH_VAL.
...
llvm-svn: 31500
2006-11-07 12:25:45 +00:00
Evan Cheng
3db2b3aab9
Add post-indexed load / store transformations.
...
llvm-svn: 31498
2006-11-07 09:03:05 +00:00
Chris Lattner
f966846d10
Add a new llcbeta option. This speeds up viterbi from 12.34 to 8.76s on
...
X86. If happy, I'll enable this by default.
llvm-svn: 31493
2006-11-07 07:18:40 +00:00
Reid Spencer
03e18e905e
Unbreak X86/ELF Debugging. Somehow this line got lost in Jim's cleanup.
...
llvm-svn: 31492
2006-11-07 06:36:36 +00:00
Chris Lattner
c8d5fc4461
Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll.
...
The low part goes in the first operand of expandop, not the second one.
llvm-svn: 31487
2006-11-07 04:11:44 +00:00
Evan Cheng
ef1c22b6fa
Remove dead code; added a missing null ptr check.
...
llvm-svn: 31478
2006-11-06 21:33:46 +00:00
Jim Laskey
1f3ff6bcfe
Tab interferes with uniqueness.
...
NOTE: There doesn't seem to be consistency for whether a leading tab
is present in a section heading.
llvm-svn: 31475
2006-11-06 16:23:59 +00:00
Jim Laskey
2008b25d7e
D'oh - reversed logic.
...
llvm-svn: 31474
2006-11-06 13:20:29 +00:00
Evan Cheng
f191d53a9a
Add comment.
...
llvm-svn: 31473
2006-11-06 08:14:30 +00:00
Jeff Cohen
e1003da1a2
Unbreak VC++ build.
...
llvm-svn: 31464
2006-11-05 19:31:28 +00:00
Evan Cheng
bf7db95159
Added pre-indexed store support.
...
llvm-svn: 31459
2006-11-05 09:31:14 +00:00
Evan Cheng
ae357e5044
Added getIndexedStore.
...
llvm-svn: 31458
2006-11-05 09:30:09 +00:00
Jim Laskey
1c8b925a87
Live local variables are being dropped because the begin or end labels marking
...
their scope are being deleted. Workaround is to widen scope to full function.
llvm-svn: 31454
2006-11-04 10:48:07 +00:00
Evan Cheng
42cb1fd0ac
Changes to use operand constraints to process two-address instructions.
...
llvm-svn: 31453
2006-11-04 09:44:31 +00:00
Evan Cheng
4328919c08
Fixed some spiller bugs exposed by the recent two-address code changes. Now
...
there may be other def(s) apart from the use&def two-address operand. We need
to check if the register reuse for a use&def operand may conflicts with another
def. Provide a mean to recover from the conflict if it is detected when the
defs are processed later.
llvm-svn: 31439
2006-11-04 00:21:55 +00:00
Chris Lattner
7628decccf
this will work better
...
llvm-svn: 31419
2006-11-03 19:15:55 +00:00
Chris Lattner
8bf77463ea
Fix the build on xcode < 2.4
...
llvm-svn: 31417
2006-11-03 19:13:59 +00:00
Evan Cheng
047a33d3e3
Fix comments.
...
llvm-svn: 31414
2006-11-03 07:31:32 +00:00
Evan Cheng
466e20fca2
Rename
...
llvm-svn: 31413
2006-11-03 07:21:16 +00:00
Reid Spencer
8cac48e619
Remove dead variable. Fix 80 column violations.
...
llvm-svn: 31412
2006-11-03 03:30:34 +00:00
Evan Cheng
a0133317f7
Added DAG combiner transformation to generate pre-indexed loads.
...
llvm-svn: 31410
2006-11-03 03:06:21 +00:00
Evan Cheng
b9ed18642c
Added isPredecessor.
...
llvm-svn: 31409
2006-11-03 03:05:24 +00:00
Evan Cheng
79570c731a
Proper check for two-addressness.
...
llvm-svn: 31408
2006-11-03 03:04:46 +00:00
Chris Lattner
d4881b4e2d
silence warning
...
llvm-svn: 31397
2006-11-03 01:28:29 +00:00
Reid Spencer
0f30aec7d3
Make CodeGen libs -pedantic clean.
...
llvm-svn: 31387
2006-11-02 23:56:21 +00:00
Jim Laskey
599ad8b222
1. Hash not quite right for DIEValues.
...
2. Not going to use Usage (no significant benefit.)
llvm-svn: 31384
2006-11-02 21:48:18 +00:00
Reid Spencer
8f92705113
Remove unused variable.
...
llvm-svn: 31382
2006-11-02 20:55:40 +00:00
Reid Spencer
4bafa71dc1
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
llvm-svn: 31380
2006-11-02 20:25:50 +00:00
Jim Laskey
14437996b7
General clean up of teh dwarf writer.
...
1. Most significant is the folding of debug information entries. This
reduced self hosted -g SelectionDAGISel.s from 120M to 13M and pretty
close to matching .o file sizes with gcc.
2. Debug information entry printing for debugging the dwarf code.
3. Bring all the code closer to llvm standards.
4. Misc. fixes and doc clean ups.
llvm-svn: 31379
2006-11-02 20:12:39 +00:00
Reid Spencer
1abf69e923
For PR950:
...
Replace the REM instruction with UREM, SREM and FREM.
llvm-svn: 31369
2006-11-02 01:53:59 +00:00
Chris Lattner
35cd439221
Allow the getRegForInlineAsmConstraint method to return a register class with
...
no fixes physreg. Treat this as permission to use any register in the register
class. When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time. This eliminates a ton
of copies around common inline asms. For example:
int test2(int Y, int X) {
asm("foo %0, %1" : "=r"(X): "r"(X));
return X;
}
now compiles to:
_test2:
foo r3, r4
blr
instead of:
_test2:
mr r2, r4
foo r2, r2
mr r3, r2
blr
GCC produces:
_test2:
foo r4, r4
mr r3,r4
blr
llvm-svn: 31366
2006-11-02 01:41:49 +00:00
Evan Cheng
1da5ee8485
Rename
...
llvm-svn: 31364
2006-11-01 23:18:32 +00:00
Evan Cheng
e57c89ede0
Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together.
...
llvm-svn: 31363
2006-11-01 23:06:55 +00:00
Evan Cheng
1f18eca4f5
Clean up.
...
llvm-svn: 31359
2006-11-01 22:39:30 +00:00
Evan Cheng
5479bb9fc4
CopyFromReg starts a live range so its use should not be considered a floater.
...
llvm-svn: 31356
2006-11-01 22:17:06 +00:00
Chris Lattner
f20968bc33
give branch folding a simple heuristic to decide which block to split so that
...
it inserts an uncond branch where it is less likely to cause a problem. This
fixes some perf issues on ppc.
llvm-svn: 31354
2006-11-01 19:36:29 +00:00
Evan Cheng
83b0827a2e
Add a printSetLabel that takes two id's.
...
llvm-svn: 31347
2006-11-01 09:23:08 +00:00
Evan Cheng
67c04b1f2a
Print jumptable index.
...
llvm-svn: 31340
2006-11-01 04:48:30 +00:00
Chris Lattner
b459c08384
make tail merging more aggressive. If two blocks share a common tail, but the
...
tail is not an entire block for either of them, pick one, split it, then
merge the common part.
llvm-svn: 31336
2006-11-01 01:16:12 +00:00
Chris Lattner
5651528580
enable branch folding with an option
...
llvm-svn: 31335
2006-11-01 00:38:31 +00:00
Chris Lattner
850ef9955d
Compile CodeGen/PowerPC/fp-branch.ll to:
...
_intcoord_cond_next55:
LBB1_3: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
li r3, 1
blr
LBB1_2: ;cond_next62.exitStub
li r3, 0
blr
instead of:
_intcoord_cond_next55:
LBB1_3: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
li r3, 1
blr
LBB1_2: ;cond_next62.exitStub
li r3, 0
blr
llvm-svn: 31330
2006-10-31 23:06:00 +00:00
Chris Lattner
3131b7d6d1
look through isunordered to inline it into branch blocks.
...
llvm-svn: 31328
2006-10-31 22:37:42 +00:00
Chris Lattner
3bc1ad2c4a
handle global address constant sdnodes
...
llvm-svn: 31323
2006-10-31 20:01:56 +00:00
Chris Lattner
a44a27dc47
TargetLowering::isOperandValidForConstraint
...
llvm-svn: 31319
2006-10-31 19:41:18 +00:00
Chris Lattner
d9afd310a6
Change the prototype for TargetLowering::isOperandValidForConstraint
...
llvm-svn: 31318
2006-10-31 19:40:43 +00:00
Anton Korobeynikov
e6ba8a819c
1. Clean up code due to changes in SwitchTo*Section(2)
...
2. Added partial debug support for mingw\cygwin targets (the same as
Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
for storing debug info by default, thus many (runtime) libraries has
this information included. These formats shouldn't be mixed in one binary
('stabs' & 'DWARF'), otherwise binutils tools will be confused.
llvm-svn: 31311
2006-10-31 08:31:24 +00:00
Chris Lattner
a9f10b25cc
Turn an assert into an error message. This is commonly triggered when
...
we don't support a specific constraint yet. When this happens, print the
unsupported constraint.
llvm-svn: 31310
2006-10-31 07:33:13 +00:00
Evan Cheng
3da8d26445
Fix a typo which can break jumptables.
...
llvm-svn: 31305
2006-10-31 02:31:00 +00:00
Reid Spencer
fe7c10d900
Fix a problem introduced by a last-minute change (logic negation).
...
llvm-svn: 31302
2006-10-30 23:34:32 +00:00
Reid Spencer
db06ed9156
Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4
...
generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.
llvm-svn: 31299
2006-10-30 22:32:30 +00:00
Jim Laskey
df32faedf7
Switch abbreviations to use the folding set.a.
...
llvm-svn: 31296
2006-10-30 15:59:54 +00:00
Jim Laskey
1ccb7c5d03
Simplify DwarfWriter header.
...
llvm-svn: 31295
2006-10-30 13:35:07 +00:00
Evan Cheng
972f469722
Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the target custom lower it.
...
llvm-svn: 31293
2006-10-30 08:00:44 +00:00
Evan Cheng
7437ed9f30
Added a new SDNode type: BR_JT for jumptable branch.
...
llvm-svn: 31292
2006-10-30 07:59:36 +00:00
Chris Lattner
e1b2b2127b
Make CanFallThrough more intelligent (so it can handle blocks with (e.g.) no
...
successors), and make island block movement more general.
This compiles CodeGen/X86/2006-04-27-ISelFoldingBug.ll to:
_loadAndRLEsource_no_exit_2E_1_label_2E_0:
subl $8, %esp
movl %esi, 4(%esp)
movl %ebx, (%esp)
movl 16(%esp), %eax
movl 12(%esp), %ecx
LBB1_3: #label.0
movl _last, %edx
movl %edx, %esi
incl %esi
movl %esi, _last
movl %ecx, %ebx
# TRUNCATE movb %bl, %bl
movl _block, %esi
movb %bl, 1(%esi,%edx)
cmpl %eax, _last
jge LBB1_2 #codeRepl5.exitStub
LBB1_4: #label.0
cmpl $257, %ecx
je LBB1_2 #codeRepl5.exitStub
LBB1_1: #label.0.no_exit.1_crit_edge.exitStub
movl $1, %eax
movl (%esp), %ebx
movl 4(%esp), %esi
addl $8, %esp
ret
LBB1_2: #codeRepl5.exitStub
xorl %eax, %eax
movl (%esp), %ebx
movl 4(%esp), %esi
addl $8, %esp
ret
instead of:
_loadAndRLEsource_no_exit_2E_1_label_2E_0:
subl $8, %esp
movl %esi, 4(%esp)
movl %ebx, (%esp)
movl 16(%esp), %eax
movl 12(%esp), %ecx
jmp LBB1_3 #label.0
LBB1_1: #label.0.no_exit.1_crit_edge.exitStub
movl $1, %eax
movl (%esp), %ebx
movl 4(%esp), %esi
addl $8, %esp
ret
LBB1_2: #codeRepl5.exitStub
xorl %eax, %eax
movl (%esp), %ebx
movl 4(%esp), %esi
addl $8, %esp
ret
LBB1_3: #label.0
movl _last, %edx
movl %edx, %esi
incl %esi
movl %esi, _last
movl %ecx, %ebx
# TRUNCATE movb %bl, %bl
movl _block, %esi
movb %bl, 1(%esi,%edx)
cmpl %eax, _last
jge LBB1_2 #codeRepl5.exitStub
LBB1_4: #label.0
cmpl $257, %ecx
jne LBB1_1 #label.0.no_exit.1_crit_edge.exitStub
jmp LBB1_2 #codeRepl5.exitStub
... which is much better layout :)
llvm-svn: 31282
2006-10-29 21:05:41 +00:00
Chris Lattner
46a439780e
fix Generic/2006-10-29-Crash.ll
...
llvm-svn: 31281
2006-10-29 21:01:20 +00:00
Chris Lattner
0a5d859ae3
Fix a load folding issue that Evan noticed: there is no need to export values
...
used by comparisons in the main block.
llvm-svn: 31279
2006-10-29 18:23:37 +00:00
Evan Cheng
fa1756d048
VLOAD is not the LoadSDNode opcode.
...
llvm-svn: 31276
2006-10-29 06:14:47 +00:00
Nick Lewycky
baef048f71
Remove spurious case. EXTLOAD is not one of the node opcodes.
...
llvm-svn: 31275
2006-10-29 02:26:30 +00:00
Chris Lattner
776740f897
split critical edges more carefully and intelligently. In particular, critical
...
edges whose destinations are not phi nodes don't bother us. Also, share
split edges, since the split edge can't have a phi. This significantly
reduces the complexity of generated code in some cases.
llvm-svn: 31274
2006-10-28 19:22:10 +00:00
Chris Lattner
95eed3bd09
Teach branch folding to fold identical jump tables together and to delete
...
jump tables that are dead.
llvm-svn: 31273
2006-10-28 18:34:47 +00:00
Chris Lattner
3c19558b6b
const'ify jump table stuff
...
llvm-svn: 31269
2006-10-28 18:17:09 +00:00
Chris Lattner
8f46e97b96
add an assert
...
llvm-svn: 31267
2006-10-28 18:11:20 +00:00
Chris Lattner
2d338110d3
don't print dead jump tables
...
llvm-svn: 31266
2006-10-28 18:10:06 +00:00
Chris Lattner
af9b4c33c2
improve deletion of blocks that just contain branches by knowing that
...
the pred block doesn't fall through into them if it's a jumptable.
llvm-svn: 31263
2006-10-28 17:32:47 +00:00
Jim Laskey
26ac9ac4ad
Load and stores have not been uniqued properly.
...
llvm-svn: 31261
2006-10-28 17:25:28 +00:00
Chris Lattner
ee8a70f370
Split *all* critical edges before isel. This resolves issues with spill code
...
being inserted on unsplit critical edges, which introduces (sometimes large
amounts of) partially dead spill code.
This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll
llvm-svn: 31260
2006-10-28 17:04:37 +00:00
Chris Lattner
f44a34d817
Fix a serious bug that caused any x86 vector stuff to infinite loop
...
llvm-svn: 31254
2006-10-28 06:15:26 +00:00
Jim Laskey
17bfaab377
Clean up.
...
llvm-svn: 31243
2006-10-27 23:52:51 +00:00
Chris Lattner
e009249ae1
Fix a bug in merged condition handling (CodeGen/Generic/2006-10-27-CondFolding.ll).
...
Add many fewer CFG edges and PHI node entries. If there is a switch which has
the same block as multiple destinations, only add that block once as a successor/phi
node (in the jumptable case)
llvm-svn: 31242
2006-10-27 23:50:33 +00:00
Jim Laskey
ef56bc9680
Switch over from SelectionNodeCSEMap to FoldingSet.
...
llvm-svn: 31240
2006-10-27 23:46:08 +00:00
Chris Lattner
e2297cd5a6
remove debug code
...
llvm-svn: 31233
2006-10-27 21:58:03 +00:00
Chris Lattner
0fab97080c
Codegen cond&cond with two branches. This compiles (f.e.) PowerPC/and-branch.ll to:
...
cmpwi cr0, r4, 4
bgt cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_3: ;entry
cmplwi cr0, r3, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r3, r4, r3
rlwinm r2, r2, 30, 31, 31
or r2, r2, r3
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_1: ;cond_true
llvm-svn: 31232
2006-10-27 21:54:23 +00:00
Chris Lattner
05159debc4
Turn conditions like x<Y|z==q into multiple blocks.
...
This compiles Regression/CodeGen/X86/or-branch.ll into:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $5, %eax
jl LBB1_1 #cond_true
LBB1_3: #entry
testl %ecx, %ecx
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
instead of:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $4, %eax
setg %al
testl %ecx, %ecx
setne %cl
testb %cl, %al
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
And on ppc to:
cmpwi cr0, r29, 5
blt cr0, LBB1_1 ;cond_true
LBB1_3: ;entry
cmplwi cr0, r30, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r30, r4, r3
rlwinm r29, r2, 30, 31, 31
and r2, r29, r30
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
llvm-svn: 31230
2006-10-27 21:36:01 +00:00
Evan Cheng
88c050f772
getPreIndexedLoad -> getIndexedLoad.
...
llvm-svn: 31209
2006-10-26 21:53:40 +00:00
Reid Spencer
6833ffe8b8
For PR950:
...
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.
llvm-svn: 31195
2006-10-26 06:15:43 +00:00
Chris Lattner
2258020df2
simplify code
...
llvm-svn: 31188
2006-10-25 22:21:37 +00:00
Chris Lattner
df59442a74
turn off tail merging for now
...
llvm-svn: 31180
2006-10-25 18:08:50 +00:00
Chris Lattner
5bb7f41bca
be more aggressive about matching identical instructions.
...
llvm-svn: 31179
2006-10-25 18:08:14 +00:00
Devang Patel
0691019e12
Move getPreferredAlignmentLog from AsmPrinter to TargetData
...
llvm-svn: 31171
2006-10-24 20:32:14 +00:00
Chris Lattner
a797dd393f
visitSwitchCase knows how to insert conditional branches well. Change
...
visitBr to just call visitSwitchCase, eliminating duplicate logic.
llvm-svn: 31167
2006-10-24 18:07:37 +00:00
Chris Lattner
79a1ca0a61
Generalize CaseBlock a bit more:
...
Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null,
in which case the LHS is treated as a bool.
llvm-svn: 31166
2006-10-24 17:57:59 +00:00
Chris Lattner
fc8e70297e
generalize 'CaseBlock'. It really allows any comparison to be inserted.
...
llvm-svn: 31161
2006-10-24 17:03:35 +00:00
Jim Laskey
55d57252c3
Don't do dead block elimination in fast mode.
...
llvm-svn: 31155
2006-10-24 16:11:49 +00:00
Jim Laskey
47b2dcf17f
LinearScanner hotspot.
...
llvm-svn: 31153
2006-10-24 14:35:25 +00:00
Jim Laskey
605cf8cc6a
Tighter data structure for deleted debug labels.
...
llvm-svn: 31152
2006-10-24 11:50:43 +00:00
Chris Lattner
533b205309
move single basic blocks that are neither fallen into nor fall out of into
...
a place more useful. In particular, if we can put them in a place where code
will be able to fall into it, do so. Otherwise, put it in a place it can fall
through into a successor. Otherwise, if preventing a fallthrough, move to the
end of the function, out of the way.
This deletes several hundred unconditional branches from spass.
llvm-svn: 31149
2006-10-24 01:12:32 +00:00
Chris Lattner
131eb21cc7
add moveBefore/moveAfter helper methods
...
llvm-svn: 31145
2006-10-24 00:02:26 +00:00
Chris Lattner
0c3fabc9a4
Enable tail merging by default.
...
llvm-svn: 31140
2006-10-23 22:10:12 +00:00
Chris Lattner
06236f7928
Minor tweak. Instead of generating:
...
movl 32(%esp), %eax
cmpl $1, %eax
je LBB1_1 #bb
LBB1_4: #entry
cmpl $2, %eax
je LBB1_2 #bb2
jmp LBB1_3 #UnifiedReturnBlock
LBB1_1: #bb
notice that we would miss the fall through and emit this instead:
movl 32(%esp), %eax
cmpl $2, %eax
je LBB1_2 #bb2
LBB1_4: #entry
cmpl $1, %eax
jne LBB1_3 #UnifiedReturnBlock
LBB1_1: #bb
llvm-svn: 31130
2006-10-23 18:38:22 +00:00
Jim Laskey
f6a28d7161
More complete solution to deleting blocks and debug info.
...
llvm-svn: 31129
2006-10-23 14:56:37 +00:00
Chris Lattner
d91d082100
Fix phi node updating for switches lowered to linear sequences of branches.
...
llvm-svn: 31125
2006-10-22 23:00:53 +00:00
Chris Lattner
f592f04e3f
disable this code for now, it's not yet safely updating phi nodes
...
llvm-svn: 31124
2006-10-22 22:47:10 +00:00
Chris Lattner
a07b38f113
Implement PR964 and Regression/CodeGen/Generic/SwitchLowering.ll
...
llvm-svn: 31119
2006-10-22 21:36:53 +00:00
Chris Lattner
9e7d74961b
don't break infinite loops
...
llvm-svn: 31102
2006-10-21 06:11:43 +00:00
Chris Lattner
210d322b1f
Use branch reversal to do stuff like this:
...
call L_strcmp$stub
testl %eax, %eax
- jne LBB26_208 #cond_true6020
- jmp LBB26_227 #bb7119
+ je LBB26_227 #bb7119
LBB26_208: #cond_true6020
movl $l31_str14, 4(%esp)
testl %eax, %eax
- jne LBB26_704 #cond_true13042
- jmp LBB26_713 #bb13151
+ je LBB26_713 #bb13151
LBB26_704: #cond_true13042
movl $_str52, 4(%esp)
cmpl 76(%ecx), %eax
- jge LBB26_1628 #cond_false63.i.i
- jmp LBB26_1769 #_Z8makeGridP13mrSurfaceListidiidd.exit.i
+ jl LBB26_1769 #_Z8makeGridP13mrSurfaceListidiidd.exit.i
LBB26_1628: #cond_false63.i.i
movl $0, 48964(%esp)
llvm-svn: 31100
2006-10-21 05:54:00 +00:00
Chris Lattner
cf7f500cfd
Transform code like:
...
jle FOO
jmp BAR
BAR:
into:
jle FOO
BAR:
... whoa!
llvm-svn: 31098
2006-10-21 05:43:30 +00:00
Chris Lattner
d4cb8dc857
Three changes:
...
1. Remove a bunch of ifdef'd code.
2. When a block just contains an uncond branch, change all blocks branching
to it to jump to the destination instead.
3. If branch analysis tells us some edges in the machinecfg are not actually
possible, remove them.
#2 triggers a suprisingly large number of times.
llvm-svn: 31094
2006-10-21 05:08:28 +00:00
Chris Lattner
52a4558cf2
Add an experimental cross-jumping implementation.
...
This is currently disabled by default and limited in several ways, but does
have a positive effect.
llvm-svn: 31090
2006-10-21 00:47:49 +00:00
Chris Lattner
cf4137d0b9
implement MachineOperand::isIdenticalTo
...
llvm-svn: 31088
2006-10-20 22:39:59 +00:00
Chris Lattner
2f54afc364
Make flag and chain edges visually distinguishable from value edges in DOT
...
output.
llvm-svn: 31067
2006-10-20 18:06:09 +00:00
Reid Spencer
d414793dbc
For PR950:
...
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.
llvm-svn: 31063
2006-10-20 07:07:24 +00:00
Bill Wendling
edce5ede57
Partially in response to PR926: insert the newly created machine basic
...
blocks into the basic block list when lowering the switch inst. into a
binary tree of if-then statements. This allows the "visitSwitchCase" func
to allow for fall-through behavior.
llvm-svn: 31057
2006-10-19 21:46:38 +00:00
Jim Laskey
c06a0bc853
Add option for controlling inclusion of global AA.
...
llvm-svn: 31040
2006-10-18 19:08:31 +00:00
Jim Laskey
288c230cbd
Use global info for alias analysis.
...
llvm-svn: 31035
2006-10-18 12:29:57 +00:00
Chris Lattner
cd00328fad
Teach the branch folder to update debug info if it removes blocks with line
...
# notes in it.
llvm-svn: 31026
2006-10-17 23:17:27 +00:00
Chris Lattner
22e311fe77
add a method to remove a line # record.
...
llvm-svn: 31025
2006-10-17 23:16:42 +00:00
Chris Lattner
dd39b9d358
Do not leak all of the SourceLineInfo objects. Do not bother mallocing each
...
one separately.
llvm-svn: 31022
2006-10-17 22:06:46 +00:00
Chris Lattner
8708a62f93
Trivial patch to speed up legalizing common i64 constants.
...
llvm-svn: 31020
2006-10-17 21:47:13 +00:00
Chris Lattner
bfbb76e103
Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
...
llvm-svn: 31019
2006-10-17 21:24:15 +00:00
Evan Cheng
3be6b15cd9
Fix printer for StoreSDNode.
...
llvm-svn: 31017
2006-10-17 21:18:26 +00:00
Evan Cheng
2113bdf34d
Reflect MemOpAddrMode change; added a helper to create pre-indexed load.
...
llvm-svn: 31016
2006-10-17 21:14:32 +00:00
Jim Laskey
7f16ca4872
Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty optimization.
...
llvm-svn: 31009
2006-10-17 19:33:52 +00:00
Chris Lattner
ef7c2e1dc8
Enable deleting branches to successor blocks. With the previous patches,
...
branch folding can now compile stuff like this:
void foo(int W, int X, int Y, int Z) {
if (W & 1) {
for (; X;--X) bar();
} else if (W & 2) {
for (; Y;--Y) bar();
} else if (W & 4) {
for (; Z;--Z) bar();
} else if (W & 8) {
for (; W;--W) bar();
}
if (W) {
bar();
}
}
contrived testcase where loops exits all end up merging together. To have
the loop merges be:
...
cmplw cr0, r30, r27
bne cr0, LBB1_14 ;bb38
LBB1_16: ;cond_next48.loopexit
mr r27, r29
LBB1_20: ;cond_next48
cmplwi cr0, r27, 0
beq cr0, LBB1_22 ;UnifiedReturnBlock
...
instead of:
...
cmplw cr0, r30, r27
bne cr0, LBB1_14 ;bb38
LBB1_16: ;cond_next48.loopexit
mr r27, r29
b LBB1_20 ;cond_next48
LBB1_17: ;cond_next48.loopexit1
b LBB1_20 ;cond_next48
LBB1_18: ;cond_next48.loopexit2
b LBB1_20 ;cond_next48
LBB1_19: ;cond_next48.loopexit3
LBB1_20: ;cond_next48
cmplwi cr0, r27, 0
beq cr0, LBB1_22 ;UnifiedReturnBlock
...
This is CodeGen/PowerPC/branch-opt.ll
llvm-svn: 31006
2006-10-17 18:16:40 +00:00
Jim Laskey
37679253ae
Clean up interface to getGlobalLinkName.
...
llvm-svn: 31001
2006-10-17 17:17:24 +00:00
Chris Lattner
8464c7e3e1
Reenable this pass, fixing the bugs in it.
...
It now correctly deletes unreachable blocks and blocks that are empty.
llvm-svn: 31000
2006-10-17 17:13:52 +00:00
Evan Cheng
d9bec725a2
Make sure operand does have size and element type operands.
...
llvm-svn: 30999
2006-10-17 17:06:35 +00:00
Jim Laskey
620df3ea5f
Basic support for getGlobalLinkName.
...
llvm-svn: 30997
2006-10-17 13:41:07 +00:00
Evan Cheng
2d9318cff1
Be careful when looking through a vbit_convert. Optimizing this:
...
(vector_shuffle
(vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32),
(undef, undef, undef, undef), (0, 0, 0, 0), 4, f32)
to the
vbitconvert
is a very bad idea.
llvm-svn: 30989
2006-10-16 22:49:37 +00:00
Jim Laskey
06f4428abc
Pass AliasAnalysis thru to DAGCombiner.
...
llvm-svn: 30984
2006-10-16 20:52:31 +00:00
Jim Laskey
5fe261bc52
Global name regression.
...
llvm-svn: 30982
2006-10-16 19:38:41 +00:00
Jim Laskey
1070dfefba
Tidy up after truncstore changes.
...
llvm-svn: 30961
2006-10-14 12:14:27 +00:00
Evan Cheng
bfd74c6d9c
Debug tweak.
...
llvm-svn: 30959
2006-10-14 08:34:06 +00:00
Chris Lattner
08aa96b824
Make sure that the node returned by SimplifySetCC is added to the worklist
...
so that it can be deleted if unused.
llvm-svn: 30955
2006-10-14 03:52:46 +00:00
Chris Lattner
a515f322f3
fold setcc of a setcc.
...
llvm-svn: 30953
2006-10-14 01:02:29 +00:00
Chris Lattner
25ad62d132
When SimplifySetCC was moved to the DAGCombiner, it was never removed from
...
SelectionDAG and it has since bitrotted. Remove the copy from SelectionDAG.
Next, remove the constant folding piece of DAGCombiner::SimplifySetCC into
a new FoldSetCC method which can be used by getNode() and SimplifySetCC.
This fixes obscure bugs.
llvm-svn: 30952
2006-10-14 00:41:01 +00:00
Chris Lattner
c4be6ee8b8
disable this pass for now, it's causing issues
...
llvm-svn: 30951
2006-10-14 00:30:06 +00:00
Chris Lattner
1c35d27fc4
falling off the end of a function is ok with an unreachable instruction.
...
llvm-svn: 30950
2006-10-14 00:21:48 +00:00
Jim Laskey
bf50140aac
Reduce the workload by not adding chain users to work list.
...
llvm-svn: 30948
2006-10-13 23:32:28 +00:00
Chris Lattner
9b1878a28c
Fix a bug where we incorrectly turned '(X & 0) == 0' into '(X & 0) >> -1',
...
which is undefined. "0" isn't a power of 2.
llvm-svn: 30947
2006-10-13 22:46:18 +00:00
Evan Cheng
fe5bb5dbe6
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
...
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Chris Lattner
87d16e0ed9
add the branch folding pass as a late cleanup pass for all targets. For now
...
it just deletes empty MBB's. Soon it will do more :)
llvm-svn: 30941
2006-10-13 20:45:56 +00:00
Chris Lattner
ae19ea4b2a
disable some objectionable code, maybe we can bring this pass to life
...
llvm-svn: 30939
2006-10-13 20:43:10 +00:00
Jim Laskey
a053c74b99
Workaround for templates
...
llvm-svn: 30927
2006-10-13 13:02:19 +00:00
Jim Laskey
20feec042a
Clean up dump.
...
llvm-svn: 30926
2006-10-13 13:01:34 +00:00
Chris Lattner
70444d5663
Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to
...
apply to rems as well as divs. This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).
It compiles CodeGen/X86/rem.ll into:
_test1:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
imull %ecx
addl %esi, %edx
movl %edx, %eax
shrl $31, %eax
sarl $7, %edx
addl %eax, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
_test2:
movl 4(%esp), %eax
movl %eax, %ecx
sarl $31, %ecx
shrl $24, %ecx
addl %eax, %ecx
andl $4294967040, %ecx
subl %ecx, %eax
ret
_test3:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
mull %ecx
shrl $7, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
instead of div/idiv instructions.
llvm-svn: 30920
2006-10-12 20:58:32 +00:00
Evan Cheng
61afb767eb
Add RemoveDeadNode to remove a dead node and its (potentially) dead operands.
...
llvm-svn: 30916
2006-10-12 20:34:05 +00:00
Chris Lattner
e38ce54cc9
add a minor dag combine noticed when looking at PR945
...
llvm-svn: 30915
2006-10-12 20:23:19 +00:00
Chris Lattner
4d707afe22
restore my previous patch, now that the X86 backend bug has been fixed:
...
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20061009/038518.html
llvm-svn: 30906
2006-10-12 17:45:38 +00:00
Jim Laskey
388c9681ef
D'oh - need to use the rigth kind of store.
...
llvm-svn: 30903
2006-10-12 15:22:24 +00:00
Evan Cheng
68aef84a57
Backing out Chris' last commit. It's breaking llvm-gcc bootstrapping.
...
It's turning:
movl -24(%ebp), %esp
subl $16, %esp
movl -24(%ebp), %ecx
into
movl -24(%ebp), %esp
subl $16, %esp
movl %esp, (%esp)
llvm-svn: 30902
2006-10-12 08:00:47 +00:00
Chris Lattner
d781da5f26
If we see a load from a stack slot into a physreg, consider it as providing
...
the stack slot. This fixes PR943.
llvm-svn: 30898
2006-10-12 02:34:07 +00:00
Jim Laskey
eba756c1a7
Alias analysis of TRUNCSTORE.
...
llvm-svn: 30889
2006-10-11 18:55:16 +00:00
Jim Laskey
6efcd15c88
Typo
...
llvm-svn: 30884
2006-10-11 17:52:19 +00:00
Jim Laskey
4791a4ad14
Handle aliasing of loadext.
...
llvm-svn: 30883
2006-10-11 17:47:52 +00:00
Jim Laskey
fd6218f8f5
Fix regression in combiner alias analysis.
...
llvm-svn: 30880
2006-10-11 13:47:09 +00:00
Evan Cheng
9b31a4d4ed
Naming consistency.
...
llvm-svn: 30878
2006-10-11 07:10:22 +00:00
Andrew Lenharth
4b783303e5
Jimptables working again on alpha.
...
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.
llvm-svn: 30873
2006-10-11 04:29:42 +00:00
Chris Lattner
aa1741fc87
add two helper methods.
...
llvm-svn: 30869
2006-10-11 03:58:02 +00:00
Evan Cheng
d6b419ecb0
FindModifiedNodeSlot needs to add LoadSDNode ivars to create proper SelectionDAGCSEMap ID.
...
llvm-svn: 30866
2006-10-11 01:47:58 +00:00
Evan Cheng
0d8a340a8f
Also update getNodeLabel for LoadSDNode.
...
llvm-svn: 30861
2006-10-10 20:11:26 +00:00
Evan Cheng
a12747d2b4
SDNode::dump should also print out extension type and VT.
...
llvm-svn: 30860
2006-10-10 20:05:10 +00:00
Chris Lattner
e0734f522f
Fix another bug in extload promotion.
...
llvm-svn: 30857
2006-10-10 18:54:19 +00:00
Evan Cheng
070ae65fa8
Fix a bug introduced by my LOAD/LOADX changes.
...
llvm-svn: 30853
2006-10-10 07:51:21 +00:00
Evan Cheng
d22f3dd3ed
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
...
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
Chris Lattner
b0e0a23959
Eliminate more token factors by taking advantage of transitivity:
...
if TF depends on A and B, and A depends on B, TF just needs to depend on
A. With Jim's alias-analysis stuff enabled, this compiles the testcase in
PR892 into:
__Z4test3Val:
subl $44, %esp
call L__Z3foov$stub
movl %edx, 28(%esp)
movl %eax, 32(%esp)
movl %eax, 24(%esp)
movl %edx, 36(%esp)
movl 52(%esp), %ecx
movl %ecx, 4(%esp)
movl %eax, 8(%esp)
movl %edx, 12(%esp)
movl 48(%esp), %eax
movl %eax, (%esp)
call L__Z3bar3ValS_$stub
addl $44, %esp
ret
instead of:
__Z4test3Val:
subl $44, %esp
call L__Z3foov$stub
movl %eax, 24(%esp)
movl %edx, 28(%esp)
movl 24(%esp), %eax
movl %eax, 32(%esp)
movl 28(%esp), %eax
movl %eax, 36(%esp)
movl 32(%esp), %eax
movl 36(%esp), %ecx
movl 52(%esp), %edx
movl %edx, 4(%esp)
movl %eax, 8(%esp)
movl %ecx, 12(%esp)
movl 48(%esp), %eax
movl %eax, (%esp)
call L__Z3bar3ValS_$stub
addl $44, %esp
ret
llvm-svn: 30821
2006-10-08 22:57:01 +00:00
Jim Laskey
9260b2f86e
Combiner alias analysis passes Multisource (release-asserts.)
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llvm-svn: 30818
2006-10-07 23:37:56 +00:00
Chris Lattner
f5758df6cd
Fix a bug legalizing zero-extending i64 loads into 32-bit loads. The bottom
...
part was always forced to be sextload, even when we needed an zextload.
llvm-svn: 30782
2006-10-07 00:58:36 +00:00
Chris Lattner
3f92c791b4
initialize ivar
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llvm-svn: 30780
2006-10-06 22:52:08 +00:00
Chris Lattner
d5f5a433b2
If a target uses a GOT, put it in the jt data section, not the text
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section. This will fix alpha when Andrew implements
AlphaTargetMachine::getTargetLowering().
llvm-svn: 30779
2006-10-06 22:50:56 +00:00
Chris Lattner
b5b96302f2
jump tables handle pic
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llvm-svn: 30776
2006-10-06 22:32:29 +00:00
Chris Lattner
ad60994822
print labels even if a MBB doesn't have a corresponding LLVM BB, just don't
...
print the LLVM BB label.
llvm-svn: 30775
2006-10-06 21:28:17 +00:00
Chris Lattner
0d39b3a4cf
Fix a miscompilation of:
...
long long foo(long long X) {
return (long long)(signed char)(int)X;
}
Instead of:
_foo:
extsb r2, r4
srawi r3, r4, 31
mr r4, r2
blr
we now produce:
_foo:
extsb r4, r4
srawi r3, r4, 31
blr
This fixes a miscompilation in ConstantFolding.cpp.
llvm-svn: 30768
2006-10-06 17:34:12 +00:00
Chris Lattner
5fc3bb074c
MachineBasicBlock::splice was incorrectly updating parent pointers on
...
instructions.
llvm-svn: 30760
2006-10-06 01:12:44 +00:00
Evan Cheng
275825195a
Make use of getStore().
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llvm-svn: 30759
2006-10-05 23:01:46 +00:00
Evan Cheng
c9e079d0c1
Add getStore() helper function to create ISD::STORE nodes.
...
llvm-svn: 30758
2006-10-05 22:57:11 +00:00
Chris Lattner
eca9897bd5
Don't crash if an MBB doesn't have an LLVM BB
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llvm-svn: 30757
2006-10-05 21:40:14 +00:00
Jim Laskey
3f9f064fd1
Alias analysis code clean ups.
...
llvm-svn: 30753
2006-10-05 15:07:25 +00:00
Chris Lattner
4f41b86e7f
Emit pic jumptables to the same section that the function is emitted to,
...
allowing label differences to work. This fixes CodeGen/X86/pic_jumptable.ll
llvm-svn: 30744
2006-10-05 03:13:28 +00:00
Chris Lattner
068190eb91
Pass the MachineFunction into EmitJumpTableInfo.
...
llvm-svn: 30742
2006-10-05 03:01:21 +00:00
Chris Lattner
b92a46c4f6
move getSectionForFunction to AsmPrinter
...
llvm-svn: 30736
2006-10-05 02:42:47 +00:00
Evan Cheng
5974db9813
Fix some typos that can cause a flag value to have more than one use.
...
llvm-svn: 30727
2006-10-04 22:23:53 +00:00
Jim Laskey
dd74085b55
More extensive alias analysis.
...
llvm-svn: 30721
2006-10-04 16:53:27 +00:00
Jim Laskey
ef4d9453b9
More long term solution
...
llvm-svn: 30720
2006-10-04 10:40:15 +00:00
Jim Laskey
b2dbdc5a38
Work around for some problems with templates.
...
llvm-svn: 30715
2006-10-04 01:43:13 +00:00
Evan Cheng
494e8e6971
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
...
extra operand to LOADX to specify the exact value extension type.
llvm-svn: 30714
2006-10-04 00:56:09 +00:00
Chris Lattner
11590ccf0c
Use $( $| $) to represent alternatives in asm blocks instead of {|}. This
...
is needed to support targets where {|} aren't special symbols.
llvm-svn: 30712
2006-10-03 23:27:09 +00:00
Evan Cheng
7b52bbd60c
Fix an obvious typo.
...
llvm-svn: 30711
2006-10-03 23:08:27 +00:00
Chris Lattner
8b03e5ec6b
Bugfixes
...
llvm-svn: 30709
2006-10-03 20:19:23 +00:00
Chris Lattner
4dde0288ed
Print the MBB ID # along with the bb tag in the -print-machine-instrs output.
...
llvm-svn: 30708
2006-10-03 20:17:24 +00:00
Chris Lattner
77aa419991
Provide a function that ensures MBB numbering is dense and inorder. This
...
can be used by MachineFunctionPasses who need this property.
llvm-svn: 30706
2006-10-03 19:18:57 +00:00
Bill Wendling
9b15198af4
Fix for PR929. The PHI nodes were being gone through for each instruction
...
in a successor block for every block...resulting in some O(N^k) algorithm
which wasn't very good for performance. Calculating this information up
front and keeping it in a map made it much faster.
llvm-svn: 30697
2006-10-03 07:20:20 +00:00
Jim Laskey
97b1846c3e
Debugging kruft
...
llvm-svn: 30688
2006-10-02 13:01:17 +00:00
Jim Laskey
3d44b337d9
Add ability to annotate (color) nodes in a viewGraph.
...
llvm-svn: 30686
2006-10-02 12:26:53 +00:00
Chris Lattner
c159d4a2a2
simplify code
...
llvm-svn: 30659
2006-09-28 23:17:41 +00:00
Evan Cheng
5a3f89027f
TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.
...
llvm-svn: 30648
2006-09-28 18:52:32 +00:00
Bill Wendling
deaf6398fc
"Once more into the breach, dear friends, once more, or fill the wall up
...
with our English dead."
No! Really! Serious this time...It was how the vreg uses were being
adjusted that was causing hte Olden tests to fail. I corrected this and
the Olden and Regression tests all passed.
llvm-svn: 30644
2006-09-28 07:10:24 +00:00
Chris Lattner
b512048344
refactor critical edge breaking out into the SplitCritEdgesForPHIConstants method.
...
This is a baby step towards fixing PR925.
llvm-svn: 30643
2006-09-28 06:17:10 +00:00
Chris Lattner
616a120782
re-re-revert this, back to the right revision. It currently breaks bisort/mst
...
in olden among others.
llvm-svn: 30637
2006-09-28 00:11:54 +00:00
Evan Cheng
5e8af45ddb
PEI now place callee save spills closest to the address pointed to by the
...
incoming stack. This allows X86 backend to use push / pop in epilogue /
prologue.
llvm-svn: 30636
2006-09-28 00:10:27 +00:00
Chris Lattner
72d308b1e8
re-revert this patch, bisort and mst are still broken in Olden.
...
llvm-svn: 30634
2006-09-28 00:04:21 +00:00
Bill Wendling
9b8d1f3eb6
Reapplying this patch. With the newest commits, the error in Olden/bisort
...
has disappeared.
llvm-svn: 30633
2006-09-27 22:37:35 +00:00
Chris Lattner
f5e5429cf9
Temporarily revert this. This breaks Olden/bisort on PPC
...
llvm-svn: 30628
2006-09-27 16:59:16 +00:00
Bill Wendling
cd762f5482
PR878: Instead of calculating the vreg to PHI use count everytime we get
...
a function, do it up front in linear time (going through all of the
instructions once). We create a map out of them. Then it's no problem to
use the information in it during elimination...
llvm-svn: 30624
2006-09-27 09:04:15 +00:00
Chris Lattner
433de75585
Add support for ${:private} which prints "L" on darwin.
...
llvm-svn: 30620
2006-09-27 00:06:07 +00:00
Chris Lattner
ddf92db1ca
Add support for ${:comment}, which expands to the current target's comment
...
character, and ${:uid} which expands to a unique ID for the MachineInstr.
More can be added if/when they are needed.
llvm-svn: 30619
2006-09-26 23:59:50 +00:00
Evan Cheng
310d2abd29
Rename function. It's determining which callee-save registers to save.
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llvm-svn: 30616
2006-09-26 22:29:31 +00:00
Andrew Lenharth
96c41b6c3c
Comments on JumpTableness
...
llvm-svn: 30615
2006-09-26 20:02:30 +00:00
Jim Laskey
74ba822f79
Load chain check is not needed
...
llvm-svn: 30613
2006-09-26 17:44:58 +00:00
Jim Laskey
2a8d8270eb
Chain can be any operand
...
llvm-svn: 30611
2006-09-26 09:32:41 +00:00
Jim Laskey
ae81857cba
Wrong size for load
...
llvm-svn: 30610
2006-09-26 08:14:06 +00:00
Jim Laskey
d72f4cfe04
Can't move a load node if it's chain is not used.
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llvm-svn: 30609
2006-09-26 07:37:42 +00:00
Chris Lattner
c628ee3402
print the preds of each MBB
...
llvm-svn: 30606
2006-09-26 03:41:59 +00:00
Chris Lattner
167aa73273
Add support for targets that want to do something with the llvm.used list,
...
because they have an aggressive linker that does dead code stripping.
llvm-svn: 30604
2006-09-26 03:38:18 +00:00
Jim Laskey
6ae9f53d2c
Accidental enable of bad code
...
llvm-svn: 30601
2006-09-25 21:11:32 +00:00
Jim Laskey
640b7dbed5
Fix chain dropping in load and drop unused stores in ret blocks.
...
llvm-svn: 30600
2006-09-25 19:32:58 +00:00
Jim Laskey
ba2f6127b2
Core antialiasing for load and store.
...
llvm-svn: 30597
2006-09-25 16:29:54 +00:00
Andrew Lenharth
58f5a24f0c
Add support for other relocation bases to jump tables, as well as custom asm directives
...
llvm-svn: 30593
2006-09-24 19:45:58 +00:00
Evan Cheng
2086ffb27b
PIC jump table entries are always 32-bit. This fixes PIC jump table support on X86-64.
...
llvm-svn: 30590
2006-09-24 05:22:38 +00:00
Evan Cheng
ce6a660148
Make it work for DAG combine of multi-value nodes.
...
llvm-svn: 30573
2006-09-21 19:04:05 +00:00