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6555 Commits

Author SHA1 Message Date
Evan Cheng
476cd5c2d1 Update comment. 
llvm-svn: 33721
 2007-01-31 22:06:44 +00:00
Evan Cheng
8596afac45 Dead comment. 
llvm-svn: 33719
 2007-01-31 21:31:25 +00:00
Evan Cheng
a08ef111bb Thumb asm syntax does not want 's' suffix for flag setting opcodes. 
llvm-svn: 33717
 2007-01-31 20:12:31 +00:00
Evan Cheng
1df8529721 When determining whether a pc relative branch / load displacement fits in the 
instruction field, adjust it for PC value (4 for thumb, 8 for arm).

llvm-svn: 33711
 2007-01-31 19:57:44 +00:00
Chris Lattner
084d1d8706 A relatively simple PPC optimization. 
llvm-svn: 33709
 2007-01-31 19:49:20 +00:00
Evan Cheng
f6e0e6cada Some comments. 
llvm-svn: 33707
 2007-01-31 18:29:27 +00:00
Evan Cheng
16edf4f9bf ConstPool island bug: watch out for cases where UserMI is the last MI of the BB. 
llvm-svn: 33706
 2007-01-31 18:19:07 +00:00
Lauro Ramos Venancio
e22bc8635e ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used. 
llvm-svn: 33703
 2007-01-31 13:12:46 +00:00
Evan Cheng
608ad034b0 Specify the right CC for comparison libcalls. 
llvm-svn: 33702
 2007-01-31 09:30:58 +00:00
Evan Cheng
e5f5439313 Observe -soft-float. 
llvm-svn: 33699
 2007-01-31 08:40:13 +00:00
Evan Cheng
0ee9a27976 - Added Thumb constpool island support. 
- Islands are inserted right after the user MI since thumb LDR cannot encode
  negative offset.

llvm-svn: 33690
 2007-01-31 02:22:22 +00:00
Evan Cheng
26ee4f882b During PEI, if the immediate value of sp + offset is too large (i.e. something 
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.

llvm-svn: 33667
 2007-01-30 23:01:46 +00:00
Evan Cheng
0f07707270 - Fix codegen for pc relative constant (e.g. JT) in thumb mode: 
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.

llvm-svn: 33664
 2007-01-30 20:37:08 +00:00
Reid Spencer
19af04a142 For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid 
confusion with external linkage types.

llvm-svn: 33663
 2007-01-30 20:08:39 +00:00
Evan Cheng
5e0f0364d0 Copy and paste bug. 
llvm-svn: 33658
 2007-01-30 08:22:33 +00:00
Evan Cheng
3f02e5b1e7 Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections. 
llvm-svn: 33657
 2007-01-30 08:04:53 +00:00
Evan Cheng
78628c7f32 Misseed thumb jumptable branch. 
llvm-svn: 33656
 2007-01-30 08:03:06 +00:00
Evan Cheng
d0ed3f753b In thumb mode, round up stack frame size to multiple of 4 since add/sub 
sp, imm instructions implicitly multiply the offset by 4.

llvm-svn: 33653
 2007-01-30 02:57:02 +00:00
Evan Cheng
36f03730d0 Thumb eliminateFrameIndex fixes. 
llvm-svn: 33652
 2007-01-30 02:36:01 +00:00
Evan Cheng
99a2f7d598 Change the operand orders to t_addrmode_s* to make it easier to morph 
instructions that use these address modes to instructions that use
t_addrmode_sp.

llvm-svn: 33651
 2007-01-30 02:35:32 +00:00
Evan Cheng
91ad06dd75 - In thumb mode, if size of MachineFunction is >= 2048, force LR to be 
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
  in thumb mode so it can be clobbered if it is properly spilled / restored
  in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
  spill by:
  push lr -> delete
  pop pc -> bx lr

llvm-svn: 33650
 2007-01-30 01:18:38 +00:00
Evan Cheng
a16118a6cf Use BL to implement Thumb far jumps. 
llvm-svn: 33649
 2007-01-30 01:13:37 +00:00
Evan Cheng
171943e26e Factor GetInstSize() out of constpool island pass. 
llvm-svn: 33644
 2007-01-29 23:45:17 +00:00
Jim Laskey
6f5d7d292f Only gather frame info if debug or eh. 
llvm-svn: 33639
 2007-01-29 23:20:22 +00:00
Nate Begeman
dc46021355 Finish off bug 680, allowing targets to custom lower frame and return 
address nodes.

llvm-svn: 33636
 2007-01-29 22:58:52 +00:00
Nate Begeman
32cbf413b6 We'd still like to register allocate r2 on darwin before the callee-save 
regs.

llvm-svn: 33635
 2007-01-29 22:57:48 +00:00
Jim Laskey
5fdc488d4a rename flag 
llvm-svn: 33634
 2007-01-29 22:40:03 +00:00
Evan Cheng
903e98b477 Comment. 
llvm-svn: 33633
 2007-01-29 22:23:02 +00:00
Evan Cheng
fe602cabee Remember if LR register has been spilled in this function. 
llvm-svn: 33632
 2007-01-29 22:22:24 +00:00
Anton Korobeynikov
2b2aa3f0a1 Save all registers by default, as they can be used to pass parameters 
for "inreg" calls

llvm-svn: 33631
 2007-01-29 21:28:01 +00:00
Nate Begeman
484e7a8b01 Update some of the llvm in the readme 
llvm-svn: 33630
 2007-01-29 21:21:22 +00:00
Jim Laskey
705f60ece9 Flag to control exception handling. 
llvm-svn: 33628
 2007-01-29 20:48:32 +00:00
Jim Laskey
eba0cf04e5 Landing pad-less eh for PPC. 
llvm-svn: 33622
 2007-01-29 18:51:14 +00:00
Reid Spencer
c0ebe17b6a Implement use of new IntrinsicLowering interface. 
llvm-svn: 33619
 2007-01-29 17:51:02 +00:00
Nick Lewycky
e788dc93d5 Fix compile error "jump to case label crosses initialization". 
What compiler are people using that accepts this code?

llvm-svn: 33603
 2007-01-28 15:39:16 +00:00
Anton Korobeynikov
611d5e2eda Propagate changes from my local tree. This patch includes: 
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.
llvm-svn: 33597
 2007-01-28 13:31:35 +00:00
Bill Wendling
5b83c819ec Make d'tor out-of-line. 
llvm-svn: 33585
 2007-01-27 11:40:32 +00:00
Bill Wendling
9c7b0a19eb Return an X86ELFWriterInfo object. 
llvm-svn: 33574
 2007-01-27 02:56:16 +00:00
Bill Wendling
f5cec978ec X86 implementation of the TargetELFWriterInfo class. 
llvm-svn: 33571
 2007-01-27 02:54:30 +00:00
Evan Cheng
e0dc07a83f New entry. 
llvm-svn: 33569
 2007-01-27 02:33:22 +00:00
Evan Cheng
4618d3131c Thumb jumptable support. 
llvm-svn: 33568
 2007-01-27 02:29:45 +00:00
Evan Cheng
9805b66063 Thumb add / sub with carry. 
llvm-svn: 33562
 2007-01-27 00:07:15 +00:00
Lauro Ramos Venancio
f1f9f05230 Some asm directives fixes for ELF. 
Now we can compile llvm-gcc on arm-linux-gnueabi!

llvm-svn: 33558
 2007-01-26 23:24:43 +00:00
Nate Begeman
80d913651d Fix a spelling error 
llvm-svn: 33556
 2007-01-26 22:40:50 +00:00
Nate Begeman
481b84a66b Handle multiple functions, properly mangle symbols, and fix support for 
scattered relocations.

llvm-svn: 33555
 2007-01-26 22:39:48 +00:00
Evan Cheng
55455f0532 Represent tADDspi and tSUBspi as two-address instructions. 
llvm-svn: 33551
 2007-01-26 21:33:19 +00:00
Jim Laskey
64f4242072 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.

llvm-svn: 33550
 2007-01-26 21:22:28 +00:00
Lauro Ramos Venancio
762787bed7 Fix Data16bitsDirective for ELF. 
llvm-svn: 33549
 2007-01-26 21:20:45 +00:00
Evan Cheng
2b4f267d57 Conditional branch being fixed up is not the last MI in the BB, there is a 
unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b   L2
=>
bne L2
b   L1

llvm-svn: 33548
 2007-01-26 20:38:26 +00:00
Lauro Ramos Venancio
ea815a6137 If the constant pool value is a extern weak symbol, emit the weak reference. 
llvm-svn: 33543
 2007-01-26 19:51:32 +00:00