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55 Commits

Author SHA1 Message Date
Chris Lattner
de706b3e3e Shave another 27K off libllvmgcc.dylib with visibility hidden 
llvm-svn: 28973
 2006-06-28 22:17:39 +00:00
Chris Lattner
11064741d3 Remove dead variable 
llvm-svn: 28253
 2006-05-12 18:02:04 +00:00
Jim Laskey
b93bc75add Foundation for call frame information. 
llvm-svn: 27491
 2006-04-07 16:34:46 +00:00
Chris Lattner
4601b86ad0 The stack alignment is now computed dynamically, just verify it is correct. 
llvm-svn: 27380
 2006-04-03 21:39:57 +00:00
Chris Lattner
fc76f9f0c1 Always compute max align. 
llvm-svn: 24227
 2005-11-06 17:43:20 +00:00
Nate Begeman
aecebc076b Add the necessary support to the ISel to allow targets to codegen the new 
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.

llvm-svn: 24224
 2005-11-06 09:00:38 +00:00
Chris Lattner
3fcb5aa250 now that we have a reg class to spill with, get this info from the regclass 
llvm-svn: 23559
 2005-09-30 17:19:22 +00:00
Chris Lattner
738631f389 Now that we have getCalleeSaveRegClasses() info, use it to pass the register 
class into the spill/reload methods.  Targets can now rely on that argument.

llvm-svn: 23556
 2005-09-30 16:59:07 +00:00
Chris Lattner
a9cd99bbc1 Change this code ot pass register classes into the stack slot spiller/reloader 
code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.

llvm-svn: 23536
 2005-09-30 01:29:00 +00:00
Chris Lattner
21400573a7 Fix a bug in my previous patch that was using the wrong iterator. This fixes 
Olden/bisort among others.

llvm-svn: 23124
 2005-08-29 00:10:46 +00:00
Chris Lattner
5f55dd72af Make this code safe for when loadRegFromStackSlot inserts multiple instructions. 
llvm-svn: 23108
 2005-08-26 22:18:32 +00:00
Chris Lattner
54bf1cc313 When inserting callee-save register reloads, make sure to skip over any 
terminator instructions before the 'ret' in case the target has a
multi-instruction return sequence.

llvm-svn: 22041
 2005-05-15 03:09:58 +00:00
Chris Lattner
a3e57bd844 Tolerate instrs with extra args 
llvm-svn: 21982
 2005-05-13 21:07:15 +00:00
Misha Brukman
774e55c446 Remove trailing whitespace 
llvm-svn: 21420
 2005-04-21 22:36:52 +00:00
Chris Lattner
65fc8007cd Simplify/speedup the PEI by not having to scan for uses of the callee saved 
registers.  This information is computed directly by the register allocator
now.

llvm-svn: 19795
 2005-01-23 23:13:12 +00:00
Chris Lattner
c187b917f2 Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool> 
llvm-svn: 19787
 2005-01-23 21:45:01 +00:00
Chris Lattner
29d6389d78 Implicitly defined registers can clobber callee saved registers too! 
This fixes the return-address-not-being-saved problem in the Alpha backend.

llvm-svn: 19741
 2005-01-22 00:49:16 +00:00
Chris Lattner
0e7435bc5b Add an assertion that would have made more sense to duraid 
llvm-svn: 19704
 2005-01-19 21:32:07 +00:00
Nate Begeman
efbdaad4b7 Put this change back in after testing from Reid proved its innocence. getSpillSize now returns value in bits 
llvm-svn: 16102
 2004-08-29 22:00:24 +00:00
Nate Begeman
ad24578e7d Back out change to divide getSpillSize by 8 until I figure out why it breaks x86, which has register sizes in bits. 
llvm-svn: 16073
 2004-08-27 16:48:24 +00:00
Nate Begeman
c0e42be976 Register sizes are in bits, not bytes 
llvm-svn: 16070
 2004-08-27 04:28:10 +00:00
Chris Lattner
0df8bcf2fa Register info alignment is in bits, frame object alignment is (currently) in 
bytes.

llvm-svn: 15970
 2004-08-21 20:04:59 +00:00
Chris Lattner
7ead36e4a4 Now that we have per-register spill size/alignment info, remove more uses 
of getRegClass

llvm-svn: 15967
 2004-08-21 19:45:10 +00:00
Chris Lattner
463d46f17a Stop using CreateStackObject(RegClass*) 
llvm-svn: 15775
 2004-08-15 22:02:22 +00:00
Chris Lattner
e58190f5f6 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00
Alkis Evlogimenos
dbe432aee7 Make this compile on gc 3.4.1 (static_cast to non-const type was not 
allowed).

llvm-svn: 15766
 2004-08-15 09:18:55 +00:00
Nate Begeman
cbc21460f2 Elminiate MachineFunction& argument from eliminateFrameIndex 
llvm-svn: 15736
 2004-08-14 22:00:10 +00:00
Chris Lattner
1a0fa932e1 Split saveCallerSavedRegisters into two methods for clarity, and add comments. 
Add support for targets that must spill certain physregs at certain locations.

Patch contributed by Nate Begeman, slightly hacked by me.

llvm-svn: 15701
 2004-08-12 19:01:14 +00:00
Chris Lattner
c5f185c269 Ok get rid of the REST of the tabs 
llvm-svn: 15564
 2004-08-07 07:18:41 +00:00
Chris Lattner
560e2f0751 Death to tabs 
llvm-svn: 15563
 2004-08-07 07:07:57 +00:00
Chris Lattner
84269aa91e Fix fallout from getOffsetOfLocalArea() being negated. Debugging dumps were being 
printed incorrectly, and we were reserving 8 extra bytes of stack space for functions
on X86.

llvm-svn: 14152
 2004-06-11 06:37:11 +00:00
Chris Lattner
71f351ddf9 Fix the prolog epilog code inserter to match the documentation and support 
targets whose stack grows up.

Patch contributed by Vladimir Prus

llvm-svn: 14111
 2004-06-10 06:23:35 +00:00
Chris Lattner
0046ea7105 Adjust to new TargetMachine interface 
llvm-svn: 13956
 2004-06-02 05:57:12 +00:00
Alkis Evlogimenos
84318d7bb6 Make dense maps keyed on physical registers smallerusing 
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.

llvm-svn: 11477
 2004-02-15 21:37:17 +00:00
Chris Lattner
18c5e0065f Allow for fixed objects to reside in the local area, and if they don't to not 
clobber them by allocating other objects in the same space!

llvm-svn: 11454
 2004-02-15 00:14:20 +00:00
Chris Lattner
1130fb28d9 There is no reason to align the stack pointer if there are no callees of this function! 
llvm-svn: 11449
 2004-02-14 20:10:59 +00:00
Alkis Evlogimenos
b755d35fd2 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340
 2004-02-12 02:27:10 +00:00
Chris Lattner
37e040ee03 Do not use MachineOperand::isVirtualRegister either! 
llvm-svn: 11283
 2004-02-10 21:12:22 +00:00
Chris Lattner
9d0a4e63b1 Eliminate users of MachineOperand::isPhysicalRegister 
llvm-svn: 11278
 2004-02-10 20:41:10 +00:00
Alkis Evlogimenos
29127b8825 Change interface of MachineOperand as follows: 
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461
 2003-12-14 13:24:17 +00:00
Brian Gaeke
d25f86d683 Put all LLVM code into the llvm namespace, as per bug 109. 
llvm-svn: 9903
 2003-11-11 22:41:34 +00:00
John Criswell
b402729b30 Added LLVM project notice to the top of every C++ source file. 
Header files will be on the way.

llvm-svn: 9298
 2003-10-20 19:43:21 +00:00
Alkis Evlogimenos
74568bc9d4 Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefs 
and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check for
pointer validity when iterating over those sets. Code that looked
like:

if (const unsigned* AS = TID.ImplicitDefs) {
  for (int i = 0; AS[i]; ++i) {
    // use AS[i]
  }
}

was changed to:

for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) {
  // use *AS
}

llvm-svn: 8960
 2003-10-08 05:20:08 +00:00
Brian Gaeke
77c65be59e Factory methods for FunctionPasses now return type FunctionPass *. 
llvm-svn: 7823
 2003-08-13 18:18:15 +00:00
Vikram S. Adve
681b3c77fa (1) Added special register class containing (for now) %fsr. 
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".

llvm-svn: 6341
 2003-05-27 00:05:23 +00:00
Chris Lattner
8f2c71cae2 Fix a bug which occurred with empty basic blocks 
llvm-svn: 5982
 2003-05-02 18:44:42 +00:00
Chris Lattner
3228091a65 Fix problems with empty basic blocks 
llvm-svn: 5326
 2003-01-16 18:06:43 +00:00
Chris Lattner
76fc0fcfa5 Arg, fix bugs in previous checkin... 
llvm-svn: 5322
 2003-01-16 02:24:20 +00:00
Chris Lattner
ba0f68ad4a Add assertion 
llvm-svn: 5321
 2003-01-16 02:22:08 +00:00
Chris Lattner
52c6c50212 * Insert prolog/epilog code before rewriting indexes 
* Fix calculation of frame offsets when there is an offset.

llvm-svn: 5318
 2003-01-15 22:52:34 +00:00