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Commit Graph

158868 Commits

Author SHA1 Message Date
Max Moroz
4cc49f7e96 [llvm-cov] Skip unnecessary coverage computations for "export -summary-only".
Summary:
This speeds up export "summary-only" execution by an order of magnitude or two,
depending on number of threads used for prepareFileReports execution.

Also includes minor refactoring for splitting render of summary and detailed data
in two independent methods.

Reviewers: vsk, morehouse

Reviewed By: vsk

Subscribers: llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D42000

llvm-svn: 322397
2018-01-12 20:31:32 +00:00
Rui Ueyama
18f10e166c Remove ELFDataTypeTypedefHelper class.
Differential Revision: https://reviews.llvm.org/D41973

llvm-svn: 322395
2018-01-12 19:59:43 +00:00
Paul Robinson
8e440f0840 Add toothpicks to test from r322391
llvm-svn: 322394
2018-01-12 19:58:35 +00:00
Evandro Menezes
c8be5be9f8 [AArch64] Fix scheduling resources for post indexed loads and stores
Fix typos in the default scheduling resources when using the post indexed
addressing modes.

Differential revision: https://reviews.llvm.org/D40511

llvm-svn: 322392
2018-01-12 19:20:11 +00:00
Paul Robinson
f9fda8e2e4 [DWARFv5] CodeGen support for MD5 file checksums
Pass MD5 checksums through from IR to assembly/object files.
After this, getting Clang to compute the MD5 should be the last step
to supporting MD5 in the DWARF v5 line table header.

Differential Revision: https://reviews.llvm.org/D41926

llvm-svn: 322391
2018-01-12 19:17:50 +00:00
Sam Clegg
3c7181ca32 MC: Remove redundant SetUsed arguments in MCSymbol methods
We can probably take this a step further since the only
user of the isUsed flag is AsmParser it should probably
be doing this explicitly. For now this is a step in the
right direction though.

Differential Revision: https://reviews.llvm.org/D41971

llvm-svn: 322386
2018-01-12 18:05:40 +00:00
Simon Pilgrim
41c599da1d [X86][SSE] Force blend domains on stack folding tests
llvm-svn: 322385
2018-01-12 18:05:29 +00:00
Simon Pilgrim
c76aa0f798 [X86][AVX] Regenerate element insertion tests
llvm-svn: 322384
2018-01-12 18:02:52 +00:00
Craig Topper
aa0ccaf5cd [X86] Remove unused isel pattern for zero extend from v16i1/v8i1 to v16i32/v8i64.
We have custom lowering on vzext that produces a vselect and a build vector. So zext never gets to isel.

llvm-svn: 322381
2018-01-12 17:34:09 +00:00
Rafael Espindola
2ce48efc54 Allow dso_local on ifunc.
It was never fully disallowed. We were rejecting it in the asm parser,
but not in the verifier.

Currently TargetMachine::shouldAssumeDSOLocal returns true for hidden
ifuncs. I considered changing it and moving the check from the asm
parser to the verifier.

The reason for deciding to allow it instead is that all linkers handle
a direct reference just fine. They use the plt address as the address
of the function. In fact doing that means that clang doesn't have the
same bug as gcc: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83782.

This patch then removes the check from the asm parser and updates the
bitcode reader and writer.

llvm-svn: 322378
2018-01-12 17:03:43 +00:00
Ben Hamilton
4929ea0ba7 [docs] Tweak update to Phabricator docs about setting repository for diffs uploaded via web
Summary:
In D41919, I missed that there was a *second* step when uploading
diffs via web where the repository should be specified.

Reviewers: asb, probinson

Reviewed By: asb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41956

llvm-svn: 322375
2018-01-12 15:44:35 +00:00
Ben Hamilton
d87d640668 [llvm] Set up .arcconfig to point to Diffusion L repository
Summary:
Thanks to probinson for noticing this in his review of D41956.

Now that we have repository callsigns set in all the other
LLVM/Clang projects' .arcconfig files, we can set the top-level
LLVM .arcconfig repository callsign to "L".

This will correctly Cc: llvm-commits@ on all review requests
sent out from the LLVM repo directory, using Herald rule H270.

Reviewers: klimek, sammccall

Reviewed By: sammccall

Subscribers: llvm-commits, probinson, asb

Differential Revision: https://reviews.llvm.org/D41964

llvm-svn: 322374
2018-01-12 15:37:41 +00:00
Benjamin Kramer
ebec464532 [PowerPC] Don't miscompile rotate+mask into an ANDIo if it can't recreate the immediate
I'm not even sure if this transform is ever worth it, but this at least
stops the bleeding.

llvm-svn: 322373
2018-01-12 15:03:24 +00:00
Nemanja Ivanovic
b728e61465 [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAP
Part of the fix for https://bugs.llvm.org/show_bug.cgi?id=35812.
This patch ensures that the compare operand for the atomic compare and swap
is properly zero-extended to 32 bits if applicable.
A follow-up commit will fix the extension for the SETCC node generated when
expanding an ATOMIC_CMP_SWAP_WITH_SUCCESS. That will complete the bug fix.

Differential Revision: https://reviews.llvm.org/D41856

llvm-svn: 322372
2018-01-12 14:58:41 +00:00
Stefan Pintilie
76ff3e6f26 Revert "[PowerPC] Manually schedule the prologue and epilogue"
This reverts commit r322124 since some tests were broken by that patch.
Will recommmit once the patch is fixed.

llvm-svn: 322369
2018-01-12 13:12:49 +00:00
Diana Picus
9c6ae84a98 [ARM GlobalISel] Add inst selector tests for G_FMA
We don't yet match all the patterns involving G_FMA. Add tests for some
of the ones that we do match.

llvm-svn: 322368
2018-01-12 12:44:36 +00:00
Diana Picus
cdc9563ac8 [ARM GlobalISel] Map G_FMA to FPR
llvm-svn: 322367
2018-01-12 12:06:01 +00:00
Diana Picus
1ca302b5d1 [ARM GlobalISel] Legalize G_FMA
For hard float with VFP4, it is legal. Otherwise, we use libcalls.

This needs a bit of support in the LegalizerHelper for soft float
because we didn't handle G_FMA libcalls yet. The support is trivial, as
the only difference between G_FMA and other libcalls that we already
handle is that it has 3 input operands rather than just 2.

llvm-svn: 322366
2018-01-12 11:30:45 +00:00
Max Kazantsev
eca4559f29 [IRCE][NFC] Make range check's End a non-null SCEV
Currently, IRC contains `Begin` and `Step` as SCEVs and `End` as value.
Aside from that, `End` can also be `nullptr` which can be later conditionally
converted into a non-null SCEV.

To make this logic more transparent, this patch makes `End` a SCEV and
calculates it early, so that it is never a null.

Differential Revision: https://reviews.llvm.org/D39590

llvm-svn: 322364
2018-01-12 10:00:26 +00:00
Andre Vieira
cf5af96d9c [ARM] Add codegen for SMMULR, SMMLAR and SMMLSR
This patch teaches the Arm back-end to generate the SMMULR, SMMLAR and SMMLSR
instructions from equivalent IR patterns.

Differential Revision: https://reviews.llvm.org/D41775

llvm-svn: 322361
2018-01-12 09:24:41 +00:00
Andre Vieira
a1f92109e8 [ARM] Fix erroneous availability of SMMLS for Armv7-M
Differential Revision: https://reviews.llvm.org/D41855

llvm-svn: 322360
2018-01-12 09:21:09 +00:00
Serguei Katkov
9a70c54302 [CGP] Re-enable Select in complex addressing mode
Re-enable Select after a couple of fixes.

Differential Revision: https://reviews.llvm.org/D40634

llvm-svn: 322358
2018-01-12 08:33:34 +00:00
Serguei Katkov
444df39ddc [LoopDeletion] Handle users in unreachable block
This is a fix for PR35884.

When we want to delete dead loop we must clean uses in unreachable blocks
otherwise we'll get an assert during deletion of instructions from the loop.

Reviewers: anna, davide
Reviewed By: anna
Subscribers: llvm-commits, lebedev.ri
Differential Revision: https://reviews.llvm.org/D41943

llvm-svn: 322357
2018-01-12 07:24:43 +00:00
Craig Topper
46f6d0692f [X86] Don't allow lods/stos/scas/cmps/movs to be parsed without a suffix and only memory operand in at&t syntax.
Without a register with a size being mentioned the instruction is ambiguous in at&t syntax. With Intel syntax the memory operation caries a size that can be used to disambiguate.

llvm-svn: 322356
2018-01-12 06:48:26 +00:00
Craig Topper
67c7573d58 [X86] Don't require suffix on 'clr' mnemonic in intel syntax
llvm-svn: 322355
2018-01-12 06:48:24 +00:00
Craig Topper
2e17caf317 [X86] Add 'l' and 'q' suffixes to the tbm instruction mnemonics.
While the suffix isn't required to disambiguate the instructions, it is required in order to parse the instructions when the suffix is specified in order to match the GNU assembler.

llvm-svn: 322354
2018-01-12 06:21:36 +00:00
Craig Topper
6509d82de1 [X86] Disable sldtq parsing in 64-bit mode.
llvm-svn: 322353
2018-01-12 05:38:15 +00:00
Craig Topper
2a983cee68 [X86] Disable movsq/stosq/scasqcmpsq/lodsq parsing in 64-bit mode.
llvm-svn: 322352
2018-01-12 05:38:14 +00:00
Eric Fiselier
b7e38c5c8a [CMake] Add LLVM_ENABLE_IDE option to better process sources for IDE's
Summary:
Currently LLVM has no way to support configuring for IDE's like CLion. Like XCode and MSVC's IDE, CLion needs to see all of the headers and tablegen files in order to properly parse the sources.

This patch adds an `LLVM_ENABLE_IDE` option which can be used to configure for IDE's in general. It is used by `LLVMProcessSources.cmake` to determine if the extra source files should be added to the target.

Unfortunately because of the low level of `LLVMProcessSources.cmake`, I'm not sure where the `LLVM_ENABLE_IDE` option should live. I choose `HandleLLVMOptions.cmake` so that out-of-tree Clang builds would correctly configure the option by default.



Reviewers: beanz, mgorny, lebedev.ri

Reviewed By: beanz

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40219

llvm-svn: 322349
2018-01-12 04:01:41 +00:00
Rui Ueyama
45248cfb84 Instead of ELFFile<ELFT>::Type, use ELFT::Type. NFC.
llvm-svn: 322346
2018-01-12 02:28:31 +00:00
Ana Pazos
0b39f93ebd [RISCV] Pass MCSubtargetInfo to print methods.
Summary:

This change allows checking for ISA extensions in print methods.

Reviewers: asb, niosHD

Reviewed By: asb, niosHD

Subscribers: llvm-commits, niosHD, asb, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal

Differential Revision: https://reviews.llvm.org/D41503

llvm-svn: 322345
2018-01-12 02:27:00 +00:00
Rui Ueyama
555bcff50e Fix typo.
llvm-svn: 322344
2018-01-12 02:15:41 +00:00
Sam Clegg
f220eca523 [WebAssembly] Don't allow functions to be named twice
The spec doesn't allow this.

Differential Revision: https://reviews.llvm.org/D41974

llvm-svn: 322343
2018-01-12 02:11:31 +00:00
Rui Ueyama
03fe6a20b4 Use ELF{32,64}{LE,BE} instead of ELFType<{little,big}, {true,false}>. NFC.
llvm-svn: 322342
2018-01-12 01:40:32 +00:00
Lang Hames
0857f0fe49 [ORC] Add a stub ExecutionSession and VModuleKey type.
ExecutionSession will represent a running JIT program.

VModuleKey is a unique key assigned to each module added as part of
an ExecutionSession. The Layer concept will be updated in future to
require a VModuleKey when a module is added.

llvm-svn: 322336
2018-01-12 00:22:05 +00:00
David L. Jones
3c7677b5c6 Revert r322279 due to Skylake miscompile.
Summary:
This revision causes Skylake (and apparently, only Skylake) codegen to fail in
certain cases. Details: https://bugs.llvm.org/show_bug.cgi?id=35918

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D41972

llvm-svn: 322335
2018-01-12 00:17:38 +00:00
Sam Clegg
c35b211f46 [WebAssembly] MC: Remove SetUsed argument when calling MCSymbol::isDefined et al
Summary:
This argument (the isUsed flag) seems to only be relevant
when parsing.  Other calls sites such as these don't seem
to ever use it.

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish

Differential Revision: https://reviews.llvm.org/D41970

llvm-svn: 322332
2018-01-11 23:59:16 +00:00
Sanjay Patel
cbad481c69 [InstSimplify] fold implied cmp with zero (PR35790)
This doesn't handle the more complicated case in the bug report yet:
https://bugs.llvm.org/show_bug.cgi?id=35790

For that, we have to match / look through a cast.

llvm-svn: 322327
2018-01-11 23:27:37 +00:00
Matthias Braun
e57153960c PeepholeOpt cleanup/refactor; NFC
- Less unnecessary use of `auto`
- Add early `using RegSubRegPair(AndIdx) =` to avoid countless
  `TargetInstrInfo::` qualifications.
- Use references instead of pointers where possible.
- Remove unused parameters.
- Rewrite the CopyRewriter class hierarchy:
   - Pull out uncoalescable copy rewriting functionality into
     PeepholeOptimizer class.
   - Use an abstract base class to make it clear that rewriters are
     independent.
- Remove unnecessary \brief in doxygen comments.
- Remove unused constructor and method from ValueTracker.
- Replace UseAdvancedTracking of ValueTracker with DisableAdvCopyOpt use.

llvm-svn: 322325
2018-01-11 22:59:33 +00:00
Evgeniy Stepanov
4e2f26d080 [hwasan] Stack instrumentation.
Summary:
Very basic stack instrumentation using tagged pointers.
Tag for N'th alloca in a function is built as XOR of:
 * base tag for the function, which is just some bits of SP (poor
   man's random)
 * small constant which is a function of N.

Allocas are aligned to 16 bytes. On every ReturnInst allocas are
re-tagged to catch use-after-return.

This implementation has a bunch of issues that will be taken care of
later:
1. lifetime intrinsics referring to tagged pointers are not
   recognized in SDAG. This effectively disables stack coloring.
2. Generated code is quite inefficient. There is one extra
   instruction at each memory access that adds the base tag to the
   untagged alloca address. It would be better to keep tagged SP in a
   callee-saved register and address allocas as an offset of that XOR
   retag, but that needs better coordination between hwasan
   instrumentation pass and prologue/epilogue insertion.
3. Lifetime instrinsics are ignored and use-after-scope is not
   implemented. This would be harder to do than in ASan, because we
   need to use a differently tagged pointer depending on which
   lifetime.start / lifetime.end the current instruction is dominated
   / post-dominated.

Reviewers: kcc, alekseyshl

Subscribers: srhines, kubamracek, javed.absar, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D41602

llvm-svn: 322324
2018-01-11 22:53:30 +00:00
Sanjay Patel
0afcf6cbe9 [InstSimplify] add tests for implied cmp with zero (PR35790); NFC
llvm-svn: 322323
2018-01-11 22:48:07 +00:00
Matthias Braun
63dd47f323 PeepholeOptimizer: Fix for vregs without defs
The PeepholeOptimizer would fail for vregs without a definition. If this
was caused by an undef operand abort to keep the code simple (so we
don't need to add logic everywhere to replicate the undef flag).

Differential Revision: https://reviews.llvm.org/D40763

llvm-svn: 322319
2018-01-11 22:30:43 +00:00
Rafael Espindola
3457994310 Make internal/private GVs implicitly dso_local.
While updating clang tests for having clang set dso_local I noticed
that:

- There are *a lot* of tests to update.
- Many of the updates are redundant.

They are redundant because a GV is "obviously dso_local". This patch
starts formalizing that a bit by requiring that internal and private
GVs be dso_local too. Since they all are, we don't have to print
dso_local to the textual representation, making it a bit more compact
and easier to read.

llvm-svn: 322317
2018-01-11 22:15:05 +00:00
Paul Robinson
c53ec0941d Tighten up DIFile verifier for checksums
Differential Revision: https://reviews.llvm.org/D41965

llvm-svn: 322314
2018-01-11 22:03:43 +00:00
Matthias Braun
93bdc4fdbc PeepholeOptimizer: Do not form PHI with subreg arguments
When replacing a PHI the PeepholeOptimizer currently takes the register
class of the register at the first operand. This however is not correct
if this argument has a subregister index.

As there is currently no API to query the register class resulting from
applying a subregister index to all registers in a class, we can only
abort in these cases and not perform the transformation.

This changes findNextSource() to require the end of all copy chains to
not use a subregister if there is any PHI in the chain. I had to rewrite
the overly complicated inner loop there to have a good place to insert
the new check.

This fixes https://llvm.org/PR33071 (aka rdar://32262041)

Differential Revision: https://reviews.llvm.org/D40758

llvm-svn: 322313
2018-01-11 21:57:03 +00:00
Evgeniy Stepanov
963f1bbe50 [arm] Implement Target Operand Flag MIR serialization.
Reviewers: efriedma, pcc

Subscribers: aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D39975

llvm-svn: 322312
2018-01-11 21:37:58 +00:00
Fiona Glaser
c5f9051b0c [Sink] Really really fix predicate in legality check
LoadInst isn't enough; we need to include intrinsics that perform loads too.

All side-effecting intrinsics and such are already covered by the isSafe
check, so we just need to care about things that read from memory.

D41960, originally from D33179.

llvm-svn: 322311
2018-01-11 21:28:57 +00:00
Sam Clegg
f07600c58f [WebAssemlby] MC: Don't write COMDAT symbols as global imports
This was causing undefined references at link time in lld.

Differential Revision: https://reviews.llvm.org/D41959

llvm-svn: 322309
2018-01-11 20:35:17 +00:00
Craig Topper
06f7bf5c4f [X86] Legalize 128/256 gathers/scatters on KNL by using widening rather than sign extending the index.
We can just widen the vectors with undef and zero extend the mask.

llvm-svn: 322308
2018-01-11 19:38:30 +00:00
Sam Clegg
0c50868267 [WebAssemly] Rename and improve formatting for ctor/dtor test
llvm-svn: 322307
2018-01-11 19:37:03 +00:00