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Commit Graph

2240 Commits

Author SHA1 Message Date
Eli Friedman
79615641f1 Make x86 test actually test x86 code generation. Fix the
construct on ARM, which was breaking by coincidence, and add a similar 
testcase for ARM.

llvm-svn: 79719
2009-08-22 03:13:10 +00:00
Chris Lattner
cf54f19140 rename test, make more specific.
llvm-svn: 79712
2009-08-22 00:44:24 +00:00
Anton Korobeynikov
0fe74b95a5 Add missing RUN line
llvm-svn: 79707
2009-08-22 00:28:50 +00:00
Anton Korobeynikov
833c9c6163 Reduce the test
llvm-svn: 79703
2009-08-22 00:18:11 +00:00
Bob Wilson
79c0af15d0 Use CHECK-NEXT to make sure we're only getting one copy of each shuffle
instruction.

llvm-svn: 79702
2009-08-22 00:13:23 +00:00
Bob Wilson
6d4400e852 Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations,
now using shuffles instead of intrinsics.

llvm-svn: 79673
2009-08-21 20:54:19 +00:00
Anton Korobeynikov
9458a8c84d Add fcopysign instructions
llvm-svn: 79664
2009-08-21 20:02:37 +00:00
Anton Korobeynikov
a706ea5720 Handle 'r' inline asm constraint
llvm-svn: 79648
2009-08-21 18:15:41 +00:00
Bob Wilson
0da4ec0046 Add some tests for vext.16 and vext.32.
llvm-svn: 79638
2009-08-21 16:35:24 +00:00
Bob Wilson
c046b62f1a Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as
vector shuffles.  Temporarily remove the tests for these operations until the
new implementation is working.

llvm-svn: 79579
2009-08-21 00:01:42 +00:00
Dale Johannesen
f6b2759c5e Use FileCheck even though this means testing for something
that has nothing to do with the point of the test, per Chris.

llvm-svn: 79569
2009-08-20 22:12:08 +00:00
Dan Gohman
f2f57ebc84 Fix an x86 code size regression: prefer RIP-relative addressing
over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.

llvm-svn: 79553
2009-08-20 18:23:44 +00:00
Evan Cheng
86546fb692 Fix an obvious copy-n-paste bug.
llvm-svn: 79535
2009-08-20 17:01:04 +00:00
Dale Johannesen
facc542d5e Use FileCheck for the test run where it's appropriate.
llvm-svn: 79534
2009-08-20 16:58:04 +00:00
Dale Johannesen
fc8ee02c25 Handle 'a' modifier in X86 asms. PR 4742.
llvm-svn: 79484
2009-08-19 22:44:41 +00:00
Bill Wendling
a62629a929 Make this test platform neutral.
llvm-svn: 79447
2009-08-19 18:51:45 +00:00
Dan Gohman
eb6fbd7fd1 Add an x86 peep that narrows TEST instructions to forms that use
a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.

llvm-svn: 79439
2009-08-19 18:16:17 +00:00
Bob Wilson
fae9057bf0 Add support for Neon VEXT (vector extract) shuffles.
This is derived from a patch by Anton Korzh.  I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.

llvm-svn: 79428
2009-08-19 17:03:43 +00:00
Eli Friedman
914b41055a PR4737: Fix a nasty bug in load narrowing with non-power-of-two types.
llvm-svn: 79415
2009-08-19 08:46:10 +00:00
Dan Gohman
56c2c54a37 Legalize the shift amount operand of SRL_PARTS, SHL_PARTS, and
SRA_PARTS, as is done for SRL, SHL, and SRA.

llvm-svn: 79380
2009-08-18 23:36:17 +00:00
Richard Osborne
a3a49aeee0 Add support for mergeable sections back into the XCore backend.
llvm-svn: 79368
2009-08-18 21:14:31 +00:00
Richard Osborne
84785e0714 Put data with relocations in the same sections as data without relocations.
llvm-svn: 79351
2009-08-18 17:58:17 +00:00
Dan Gohman
b2e9d23bd9 Make this test less sensitive to assembler differences.
llvm-svn: 79348
2009-08-18 17:19:46 +00:00
Chris Lattner
f0cde76e79 force a triple so this passes on darwin
llvm-svn: 79345
2009-08-18 16:55:45 +00:00
Dan Gohman
5022dd9cc9 Make tail merging handle blocks with repeated predecessors correctly, and
remove RemoveDuplicateSuccessor, as it is no longer necessary, and because
it breaks assumptions made in
MachineBasicBlock::isOnlyReachableByFallthrough.

Convert test/CodeGen/X86/omit-label.ll to FileCheck and add a testcase
for PR4732.

test/CodeGen/Thumb2/thumb2-ifcvt2.ll sees a diff with this commit due to
it being bugpoint-reduced to the point where it doesn't matter what the
condition for the branch is.

Add some more interesting code to
test/CodeGen/X86/2009-08-06-branchfolder-crash.ll, which is the testcase
that originally motivated the RemoveDuplicateSuccessor code, to help
verify that the original problem isn't being re-broken.

llvm-svn: 79338
2009-08-18 15:18:18 +00:00
Evan Cheng
d4d2a3d0a6 Fix revsh pattern.
llvm-svn: 79318
2009-08-18 05:43:23 +00:00
Dale Johannesen
ff6e66e502 PowerPC inline asm was emitting two output operands
for a single "m" constraint; this is wrong because the
opcode of a load or store would have to change in parallel.
This patch makes it always compute addresses into a register,
which is correct but not as efficient as possible.  7144566.

llvm-svn: 79292
2009-08-18 00:18:39 +00:00
Richard Osborne
358842178f Update getSectionForConstant() to to allow mergable sections to be nulled out
if not supported by the ELF subtarget.

llvm-svn: 79249
2009-08-17 16:37:11 +00:00
Eli Friedman
d61a2e81bc Fix test on Linux.
llvm-svn: 79140
2009-08-15 21:28:17 +00:00
Bill Wendling
962adec4ee Reapply r79127. It was fixed by d0k.
llvm-svn: 79136
2009-08-15 21:21:19 +00:00
Bill Wendling
bfebbb6477 Revert r79127. It was causing compilation errors.
llvm-svn: 79135
2009-08-15 21:14:01 +00:00
Evan Cheng
5d841097a9 Change allowsUnalignedMemoryAccesses to take type argument since some targets
support unaligned mem access only for certain types. (Should it be size
instead?)

ARM v7 supports unaligned access for i16 and i32, some v6 variants support it
as well.

llvm-svn: 79127
2009-08-15 19:23:44 +00:00
Chris Lattner
d910c3a30e implement support for CHECK-NEXT: in filecheck.
llvm-svn: 79123
2009-08-15 18:32:21 +00:00
Jakob Stoklund Olesen
7f4ef2d59a Refine EarlyClobber assert in register scavenger.
It is legal for an inline asm operand to use an earlyclobber register if the
use operand is tied to the earlyclobber operand. The issue is discussed here:

  http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html

We should perhaps let only the machine code verifier worry about these finer
details. EarlyClobber operands are not really interesting to the scavenger.

This fixes PR4528 for the third time.

llvm-svn: 79122
2009-08-15 18:16:58 +00:00
Chris Lattner
56dc61a487 specify a target triple so global variable manglings are consistent etc.
llvm-svn: 79118
2009-08-15 17:35:05 +00:00
Chris Lattner
adc768c073 convert to filecheck.
llvm-svn: 79117
2009-08-15 17:28:09 +00:00
Chris Lattner
27345be0c7 rename this test to sse2.ll
llvm-svn: 79116
2009-08-15 17:24:09 +00:00
Chris Lattner
43cfb4db61 merge a bunch more sse3 tests into sse3.ll
llvm-svn: 79115
2009-08-15 17:21:44 +00:00
Chris Lattner
34e10616f5 convert test to filecheck format.
llvm-svn: 79114
2009-08-15 17:05:03 +00:00
Chris Lattner
58942aabef rename test
llvm-svn: 79113
2009-08-15 17:01:44 +00:00
Chris Lattner
83d747a703 this is a test for sse3, simplify it.
llvm-svn: 79112
2009-08-15 17:01:19 +00:00
Jakob Stoklund Olesen
8f6660c417 Don't setCalleeSavedInfoValid() until spills are interted.
In a naked function, the flag is never set and getPristineRegs() returns an
empty list. That means naked functions are able to clobber callee saved
registers, but that is the whole point of naked functions.

This fixes PR4716.

llvm-svn: 79096
2009-08-15 13:10:46 +00:00
Jakob Stoklund Olesen
8dde5739cb Add XFAIL testcase for setcc undef.
llvm-svn: 79093
2009-08-15 12:10:22 +00:00
Jakob Stoklund Olesen
e7bffd7796 Add XFAIL test case for a scavenger assert.
llvm-svn: 79092
2009-08-15 12:09:56 +00:00
Jakob Stoklund Olesen
e093ae5810 Update LocalRewriter::DistanceMap when inserting stack loads.
In the included test case, a stack load was not included in DistanceMap. That
caused TransferDeadness to ignore the instruction, leading to a scavenger
assert.

llvm-svn: 79090
2009-08-15 11:03:03 +00:00
Evan Cheng
b9c8d65369 Fix tests.
llvm-svn: 79086
2009-08-15 08:23:11 +00:00
Evan Cheng
9d351a7246 Turn on if-conversion for thumb2.
llvm-svn: 79084
2009-08-15 07:59:10 +00:00
Chris Lattner
ee52642cd3 use XCore-specific section with xcore specific cp/dp flags to restore
support for globals going into the appropriate sections with the flags.

This hopefully finishes unbreaking the previous behavior that I broke before.

llvm-svn: 79079
2009-08-15 06:09:35 +00:00
Dan Gohman
d69323d37a On x86-64, for a varargs function, don't store the xmm registers to
the register save area if %al is 0. This avoids touching xmm
regsiters when they aren't actually used.

llvm-svn: 79061
2009-08-15 01:38:56 +00:00
Evan Cheng
4e97ccc132 Leaf functions which do not save CSRs can be frameless even with -disable-fp-elim.
llvm-svn: 79039
2009-08-14 20:48:13 +00:00