1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-31 07:52:55 +01:00
Commit Graph

200 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
1deaf83a77 Add testcase for r127032
llvm-svn: 127033
2011-03-04 20:48:39 +00:00
Joerg Sonnenberger
5f2f5fa638 Be nice to Xcore and the XMOS assembler and avoid quoting section names
that contain only letters, digits and the characters "_" and ".".

llvm-svn: 127028
2011-03-04 20:03:14 +00:00
Bruno Cardoso Lopes
99619e5bef Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka
llvm-svn: 127027
2011-03-04 20:01:52 +00:00
Joerg Sonnenberger
bb93506f95 Bug#9033: For the ELF assembler output, always quote the section name.
llvm-svn: 126963
2011-03-03 22:31:08 +00:00
Daniel Dunbar
5620b11961 Disable this test for now...
llvm-svn: 125361
2011-02-11 02:59:08 +00:00
Bruno Cardoso Lopes
3792d82914 Add mips o32 tests again with the hope that the buildbot won't complaint again
llvm-svn: 125316
2011-02-10 23:37:20 +00:00
Bruno Cardoso Lopes
c9968d544b Remove the test to silence the buildbot, will check it in again with a proper fix soon
llvm-svn: 125305
2011-02-10 20:10:17 +00:00
Bruno Cardoso Lopes
7cc40009a8 Fix a lot of o32 CC issues and add a bunch of tests. Patch by Akira Hatanaka with some small modifications by me.
llvm-svn: 125292
2011-02-10 18:05:10 +00:00
Bruno Cardoso Lopes
6c5db0236a Add support for mips32 madd and msub instructions. Patch by Akira Hatanaka
llvm-svn: 123760
2011-01-18 19:29:17 +00:00
Rafael Espindola
9afb7af08a Update tests.
llvm-svn: 123591
2011-01-16 18:02:57 +00:00
Bruno Cardoso Lopes
93e5c2fb64 Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka
llvm-svn: 121377
2010-12-09 17:32:30 +00:00
Bruno Cardoso Lopes
0e14644599 Match a pattern generated by a dag combiner opt where:
(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))

Thanks to Akira for pointing that.

llvm-svn: 121163
2010-12-07 19:00:20 +00:00
Devang Patel
6fe7fe8dd4 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
llvm-svn: 121059
2010-12-06 22:39:26 +00:00
Bruno Cardoso Lopes
37f2439cbd Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com>
llvm-svn: 118864
2010-11-12 00:38:32 +00:00
Bruno Cardoso Lopes
c911863e01 Add a test to the previous added clo instruction. Patch by Akira again
llvm-svn: 118668
2010-11-10 02:22:44 +00:00
Evan Cheng
1ce02d180e Enable machine sinking critical edge splitting. e.g.
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372
2010-09-20 22:52:00 +00:00
Duncan Sands
254f8ff0a6 Correct bogus module triple specifications.
llvm-svn: 112469
2010-08-30 10:48:29 +00:00
Bruno Cardoso Lopes
0fa595f073 Fix PR7174, a couple o Mips fixes:
- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.

Patch by stetorvs@gmail.com

llvm-svn: 108820
2010-07-20 08:37:04 +00:00
Bruno Cardoso Lopes
b127fa9a01 Fix Mips PR7473. Patch by stetorvs@gmail.com
llvm-svn: 108816
2010-07-20 07:58:51 +00:00
Dan Gohman
5736cd1e47 Start function numbering at 0.
llvm-svn: 101638
2010-04-17 16:29:15 +00:00
Dale Johannesen
4cdb545401 Split big test into multiple directories to cater to
those who don't build all targets.

llvm-svn: 100688
2010-04-07 20:43:35 +00:00
Dan Gohman
5fa04f2707 Delete useless trailing semicolons.
llvm-svn: 92740
2010-01-05 17:55:26 +00:00
Bruno Cardoso Lopes
038281c523 Support PIC loading of constant pool entries
llvm-svn: 89863
2009-11-25 12:17:58 +00:00
Daniel Dunbar
cfcc2952fb Unbreak test, Bruno please check.
llvm-svn: 89329
2009-11-19 07:18:49 +00:00
Bruno Cardoso Lopes
bf95b9699e - Add sugregister logic to handle f64=(f32,f32).
- Support mips1 like load/store of doubles:

Instead of:
  sdc $f0, X($3)
Generate:
  swc $f0, X($3)
  swc $f1, X+4($3)

llvm-svn: 89322
2009-11-19 06:06:13 +00:00
Evan Cheng
5c06a152a8 xfail for now. It has been failing.
llvm-svn: 88892
2009-11-16 05:44:04 +00:00
Bruno Cardoso Lopes
21ca44ba49 - Fix a small bug while handling target constant pools (one param was missing).
- Add a smarter constant pool loading, instead of:

lui $2, %hi($CPI1_0)
addiu $2, $2, %lo($CPI1_0)
lwc1 $f0, 0($2)

Generate:

lui $2, %hi($CPI1_0)
lwc1 $f0, %lo($CPI1_0)($2)

llvm-svn: 88886
2009-11-16 04:33:42 +00:00
Dan Gohman
142428ce64 Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81293
2009-09-09 00:09:15 +00:00
Dan Gohman
bf08e82d8e Remove obsolete -f flags.
llvm-svn: 79992
2009-08-25 15:38:29 +00:00
Chris Lattner
4cebf6ca28 reintroduce support for Mips "small" section handling. This is
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.

llvm-svn: 78900
2009-08-13 06:28:06 +00:00
Daniel Dunbar
775da1948b Pass target triple string in to TargetMachine constructor.
This is not just a matter of passing in the target triple from the module;
currently backends are making decisions based on the build and host
architecture. The goal is to migrate to making these decisions based off of the
triple (in conjunction with the feature string). Thus most clients pass in the
target triple, or the host triple if that is empty.

This has one important change in the way behavior of the JIT and llc.

For the JIT, it was previously selecting the Target based on the host
(naturally), but it was setting the target machine features based on the triple
from the module. Now it is setting the target machine features based on the
triple of the host.

For LLC, -march was previously only used to select the target, the target
machine features were initialized from the module's triple (which may have been
empty). Now the target triple is taken from the module, or the host's triple is
used if that is empty. Then the triple is adjusted to match -march.

The take away is that -march for llc is now used in conjunction with the host
triple to initialize the subtarget. If users want more deterministic behavior
from llc, they should use -mtriple, or set the triple in the input module.

llvm-svn: 77946
2009-08-03 04:03:51 +00:00
Chris Lattner
09511ed243 Remove SectionKind::Small*. This was only used on mips, and is apparently
a sad mistake that is regretted. :)

llvm-svn: 76935
2009-07-24 03:11:51 +00:00
Duncan Sands
2a4535353f Revert commit 76707, it was breaking the llvm-gcc build
on linux platforms.  The binutils assembler does not
recognize the "s" flag, see for example
http://sourceware.org/binutils/docs/as/Section.html 

llvm-svn: 76733
2009-07-22 10:35:05 +00:00
Chris Lattner
ced616dd50 set the ELF "small" flag on objects that end up in .rodata.cst4 consistently,
updating a mips testcase to expect it.

llvm-svn: 76707
2009-07-22 00:41:56 +00:00
Dan Gohman
5f6f8101d5 Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897
2009-06-04 22:49:04 +00:00
Bill Wendling
2944bcd25c This looks like it passes now.
llvm-svn: 72485
2009-05-27 17:43:21 +00:00
Rafael Espindola
0aba6c9435 Add the private linkage.
llvm-svn: 62279
2009-01-15 20:18:42 +00:00
Dan Gohman
9e9858781c The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch
this.

It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.

llvm-svn: 62177
2009-01-13 20:24:13 +00:00
Duncan Sands
22e8a45a01 Fix PR2667: add soft float support for sint_to_fp/uint_to_fp
where the argument is an apint, or smaller than the minimum
size for which there is a libcall (i32). 

llvm-svn: 58994
2008-11-10 17:36:26 +00:00
Duncan Sands
a6bbc047d5 Turn on LegalizeTypes, the new type legalization
codegen infrastructure, by default.  Please report
any breakage to the mailing lists.

llvm-svn: 58232
2008-10-27 08:42:46 +00:00
Evan Cheng
de99d94c58 FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington.
llvm-svn: 57460
2008-10-13 18:46:18 +00:00
Bruno Cardoso Lopes
5463c59693 Added testcase for bswap allegrexel intrinsic
llvm-svn: 56225
2008-09-15 19:38:11 +00:00
Bruno Cardoso Lopes
f8906a40ab Support added for ctlz intrinsic, test case added.
llvm-svn: 54516
2008-08-08 06:16:31 +00:00
Bruno Cardoso Lopes
91abeb9458 [Last] Batch 7 of Mips CodeGen tests
llvm-svn: 54512
2008-08-08 04:12:42 +00:00
Bruno Cardoso Lopes
c4f524b9d1 Batch 6 of Mips CodeGen tests
llvm-svn: 54511
2008-08-08 04:11:30 +00:00
Bruno Cardoso Lopes
772cf1643c Batch 5 of Mips CodeGen tests
llvm-svn: 54510
2008-08-08 04:09:57 +00:00
Bruno Cardoso Lopes
7d4b844ee8 Batch 4 of Mips CodeGen tests
llvm-svn: 54509
2008-08-08 04:08:30 +00:00
Bruno Cardoso Lopes
06380b7221 Batch 3 of Mips CodeGen tests
llvm-svn: 54508
2008-08-08 04:05:51 +00:00
Bruno Cardoso Lopes
96efb82258 Batch 2 of Mips CodeGen tests
llvm-svn: 54507
2008-08-08 04:03:25 +00:00
Bruno Cardoso Lopes
42b4e15d50 Batch 1 of Mips CodeGen tests, more coming...
I had a lot of simple local codegen tests and they are now ready to be placed
in test/CodeGen. 

llvm-svn: 54506
2008-08-08 03:58:34 +00:00