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Commit Graph

129597 Commits

Author SHA1 Message Date
NAKAMURA Takumi
59391eddda AArch64CodeGen: Make AArch64RegisterBankInfo.cpp optional along LLVM_BUILD_GLOBAL_ISEL.
llvm-svn: 265499
2016-04-06 01:18:08 +00:00
David Majnemer
d1f0483635 [SLPVectorizer] Vectorize libcalls of sqrt
We didn't realize that we could transform the libcall into a vectorized
intrinsic.

llvm-svn: 265493
2016-04-06 00:14:59 +00:00
Quentin Colombet
321f928188 [RegisterBankInfo] Include RegisterBank.h.
We actually need the definition of a RegisterBank to be able to inline
the implementation of the subscript operator.

llvm-svn: 265492
2016-04-05 23:57:25 +00:00
Quentin Colombet
d1efb41f52 [RegisterBankInfo] Add missing include for assert.
This should appease the linux bot.

llvm-svn: 265491
2016-04-05 23:43:58 +00:00
Davide Italiano
7f421e29c0 [DebugInfo] Fix tests so that each subprogram belongs to a CU.
llvm-svn: 265490
2016-04-05 23:37:08 +00:00
Quentin Colombet
5e6846e56c [AArch64] Initial implementation of the targeting of the register bank information.
llvm-svn: 265489
2016-04-05 23:34:59 +00:00
Quentin Colombet
8e2ff12a44 [RegisterBankInfo] Simplify the API for build a register bank.
As part of the TRI argument of addRegBankCoverage we already have access to
the TargetRegisterClass through the ID of that register class.
Therefore, there is no point in needing a TargetRegisterClass instance,
the ID is enough to get to it.

llvm-svn: 265487
2016-04-05 23:26:39 +00:00
Sanjoy Das
ec8789a0e2 [RS4GC] NFC cleanup of the DeferredReplacement class
Instead of constructors use clearly named factory methods.

llvm-svn: 265486
2016-04-05 23:18:53 +00:00
Sanjoy Das
685aab406c [RS4GC] Better codegen for deoptimize calls
Don't emit a gc.result for a statepoint lowered from
@llvm.experimental.deoptimize since the call into __llvm_deoptimize is
effectively noreturn.  Instead follow the corresponding gc.statepoint
with an "unreachable".

llvm-svn: 265485
2016-04-05 23:18:35 +00:00
Quentin Colombet
00178d3519 [Target] Remove a deprecated comment.
llvm-svn: 265484
2016-04-05 23:04:54 +00:00
Quentin Colombet
7f95e0c4a3 [Target] Add an accessor to the register bank information.
llvm-svn: 265483
2016-04-05 22:50:40 +00:00
Manman Ren
6e8ec540e6 Swift Calling Convention: swiftcc for ARM.
Differential Revision: http://reviews.llvm.org/D18769

llvm-svn: 265482
2016-04-05 22:44:44 +00:00
Evgeniy Stepanov
c80f414fe8 Faster stack-protector for Android/AArch64.
Bionic has a defined thread-local location for the stack protector
cookie. Emit a direct load instead of going through __stack_chk_guard.

llvm-svn: 265481
2016-04-05 22:41:50 +00:00
Manman Ren
d8f96bea63 Swift Calling Convention: add swiftcc.
Differential Revision: http://reviews.llvm.org/D17863

llvm-svn: 265480
2016-04-05 22:41:47 +00:00
Quentin Colombet
6e4ea9ea73 [RegisterBank] Implement the verify method to check for the obvious mistakes.
llvm-svn: 265479
2016-04-05 22:34:01 +00:00
Quentin Colombet
dbcddd4546 [RegisterBankInfo] Add debug print to check how the initialization is going.
llvm-svn: 265475
2016-04-05 21:47:56 +00:00
George Burgess IV
5a36438b8e [CFLAA] Fix PR27213; incorrect tagging of args/globals
Prior to this patch, CFLAA wouldn't tag arguments/globals properly if
it didn't find any "interesting" edges on them. This means that, if all
you do is store constants to a global or argument, we would never
actually treat it as a global/argument.

Test case:

define void @foo(i32* %A, i32* %B) #0 {
entry:
  store i32 0, i32* %A, align 4
  store i32 0, i32* %B, align 4
  ret void
}

CFLAA would say that %A can't alias %B, because neither pointer was
used in an interesting way. This patch makes us note whether something
is an argument, global, ... regardless of how interesting CFLAA thinks
its uses are.

(For the record, using a value in an interesting way means loading
from it, using it in a GEP, ...)

llvm-svn: 265474
2016-04-05 21:40:45 +00:00
Quentin Colombet
dedac3450c [RegisterBank] Add printable capabilities for future debugging.
llvm-svn: 265473
2016-04-05 21:40:43 +00:00
Duncan P. N. Exon Smith
1e3026f0bd Try harder to appease MSVC after r265456
r265465 wasn't good enough.  I need to spell out all the moves.

llvm-svn: 265470
2016-04-05 21:25:33 +00:00
Quentin Colombet
7a53b05767 [RegisterBankInfo] Make addRegBankCoverage more capable to ease
targeting jobs.
Now, addRegBankCoverage also adds the subreg-classes not just the
sub-classes of the given register class.

llvm-svn: 265469
2016-04-05 21:20:12 +00:00
Junmo Park
c92c4f5e10 Minor code cleanups. NFC.
llvm-svn: 265468
2016-04-05 21:14:31 +00:00
Duncan P. N. Exon Smith
da537cb806 IR: Introduce ConstantAggregate, NFC
Add a common parent class for ConstantArray, ConstantVector, and
ConstantStruct called ConstantAggregate.  These are the aggregate
subclasses of Constant that take operands.

This is mainly a cleanup, adding common `isa` target and removing
duplicated code.  However, it also simplifies caching which constants
point transitively at `GlobalValue` (a possible future direction).

llvm-svn: 265466
2016-04-05 21:10:45 +00:00
Duncan P. N. Exon Smith
c1b9d21788 Try to appease MSVC after r265456
I can't remember if adding `= default` will make MSVC happy, or if I
have to spell this out.  Let's try the cleaner version first.

llvm-svn: 265465
2016-04-05 21:07:01 +00:00
Quentin Colombet
22d81f84b4 [RegisterBankInfo] Implement the methods to create register banks.
llvm-svn: 265464
2016-04-05 21:06:15 +00:00
Duncan P. N. Exon Smith
f0ef586a9b IR: Add missing assertion for ConstantVector::ConstantVector
Use the same assertion as ConstantArray.  Vectors should have the right
number of elements.

llvm-svn: 265463
2016-04-05 20:53:47 +00:00
Quentin Colombet
bd917fe8e6 [RegisterBank] Provide a way to check if a register bank is valid.
Change the default constructor to create invalid object.
The target will have to properly initialize the register banks before
using them.

llvm-svn: 265460
2016-04-05 20:48:32 +00:00
Duncan P. N. Exon Smith
5f366e4aa0 Revert "Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes."
This reverts commit r265454 since it broke the build.  E.g.:

  http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/22413/

llvm-svn: 265459
2016-04-05 20:45:04 +00:00
Duncan P. N. Exon Smith
71ad91cf19 Make constructors for final subclasses of Constant private, NFC
These were `protected` before, but might as well be `private`.  Also
marked the classes themselves `final`.

llvm-svn: 265458
2016-04-05 20:31:23 +00:00
David Blaikie
864a44e979 llvm-dwp: Handle GCC's use of multiple debug_types.dwo sections in a single .dwo file
(also includes the .test file missing from my previous commit, r265452)

llvm-svn: 265457
2016-04-05 20:26:50 +00:00
Duncan P. N. Exon Smith
7d92710523 ValueMapper: Rewrite Mapper::mapMetadata without recursion
This commit completely rewrites Mapper::mapMetadata (the implementation
of llvm::MapMetadata) using an iterative algorithm.  The guts of the new
algorithm are in MDNodeMapper::map, the entry function in a new class.

Previously, Mapper::mapMetadata performed a recursive exploration of the
graph with eager "just in case there's a reason" malloc traffic.

The new algorithm has these benefits:

  - New nodes and temporaries are not created eagerly.
  - Uniquing cycles are not duplicated (see new unit test).
  - No recursion.

Given a node to map, it does this:

 1. Use a worklist to perform a post-order traversal of the transitively
    referenced unmapped nodes.

 2. Track which nodes will change operands, and which will have new
    addresses in the mapped scheme.  Propagate the changes through the
    POT until fixed point, to pick up uniquing cycles that need to
    change.

 3. Map all the distinct nodes without touching their operands.  If
    RF_MoveDistinctMetadata, they get mapped to themselves; otherwise,
    they get mapped to clones.

 4. Map the uniqued nodes (bottom-up), lazily creating temporaries for
    forward references as needed.

 5. Remap the operands of the distinct nodes.

Mehdi helped me out by profiling this with -flto=thin.  On his workload
(importing/etc. for opt.cpp), MapMetadata sped up by 15%, contributed
about 50% less to persistent memory, and made about 100x fewer calls to
malloc.  The speedup is less than I'd hoped.  The profile mainly blames
DenseMap lookups; perhaps there's a way to reduce them (e.g., by
disallowing remapping of MDString).

It would be nice to break the strange remaining recursion on the Value
side: MapValue => materializeInitFor => RemapInstruction => MapValue.  I
think we could do this by having materializeInitFor return a worklist of
things to be remapped.

llvm-svn: 265456
2016-04-05 20:23:21 +00:00
Quentin Colombet
ee2a468a2a [TargetRegisterClass] Improve the comment for how to use getSubClassMask.
llvm-svn: 265455
2016-04-05 20:21:53 +00:00
Eugene Zelenko
a612bac11f Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes.
Some Include What You Use suggestions were used too.

Use anonymous namespaces in source files.

Differential revision: http://reviews.llvm.org/D18778

llvm-svn: 265454
2016-04-05 20:19:49 +00:00
David Blaikie
fdb380b214 llvm-dwp: Handle dwo files produced by GCC
To start with, handle DW_FORM_string names. Follow up commit will handle
the interesting quirk with type units I was originally aiming for here.

llvm-svn: 265452
2016-04-05 20:16:38 +00:00
Lang Hames
92512cdebc [llvm-rtdyld] Fix the return type on ErrorAndExit.
As suggested by Rafael - this function no longer returns a value as of r264425.

llvm-svn: 265451
2016-04-05 20:11:24 +00:00
Ahmed Bougacha
6921e4df62 [X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC.
We only generate LOCKed versions of add/sub when the result is unused.
It often happens that the result is used, but only by a comparison. We
can optimize those out by reusing EFLAGS, which lets us use the proper
instructions, instead of having to fallback to LXADD.

Instead of doing this as an MI peephole (as we do for the other
non-LOCKed (really, non-MR) forms), do it in ISel. It becomes quite
tricky later.

This also makes it eventually possible to stop expanding and/or/xor
if the only user is an icmp (also see D18141).

This uses the LOCK ISD opcodes added by r262244.

Differential Revision: http://reviews.llvm.org/D17633

llvm-svn: 265450
2016-04-05 20:02:57 +00:00
Quentin Colombet
1d62b8004b [GlobalISel] Add the RegisterBankInfo class for the handling of register banks.
llvm-svn: 265449
2016-04-05 20:02:47 +00:00
Ahmed Bougacha
5fe8ea46ef [X86] Add tests for ATOMIC_LOAD_OP EFLAGS reuse. NFC.
llvm-svn: 265448
2016-04-05 20:02:44 +00:00
Ahmed Bougacha
0d71e0a51a [X86] Simplify early-exit check. NFC.
llvm-svn: 265447
2016-04-05 20:02:22 +00:00
Lang Hames
9e445cd6a2 [Support] Add a checked flag to Expected<T>, require checks before access or
destruction.

This makes the Expected<T> class behave like Error, even when in success mode.
Expected<T> values must be checked to see whether they contain an error prior
to being dereferenced, assigned to, or destructed.

llvm-svn: 265446
2016-04-05 19:57:03 +00:00
Quentin Colombet
face9cb9c3 [GlobalISel] Add a class, RegisterBank, to represent register banks.
llvm-svn: 265445
2016-04-05 19:54:44 +00:00
Sanjay Patel
293e730a12 fixed to discard earlier advertising
Also, hardcode (there must be a better way...) the 'utils' dir in the 
advertisement, so it's easier to find.

llvm-svn: 265444
2016-04-05 19:50:21 +00:00
Sanjay Patel
7507aa6e81 fix typo; NFC
llvm-svn: 265442
2016-04-05 19:27:39 +00:00
Quentin Colombet
a1f70e5494 [AArch64][Test] Do not override the suffixes for test cases.
llvm-svn: 265441
2016-04-05 19:26:42 +00:00
Quentin Colombet
e9637f2bc7 [GlobalISel] Add the skeleton of the RegBankSelect pass.
This pass is reponsible for assigning the generic virtual registers to register
banks.

llvm-svn: 265440
2016-04-05 19:06:01 +00:00
Lang Hames
c1788d8488 [Support] clang-format Error.h.
This tidies up the ExitOnError class and some other recently added code. NFC.

llvm-svn: 265438
2016-04-05 18:50:09 +00:00
Sanjay Patel
cb95b0120e fix documentation comments; NFC
llvm-svn: 265434
2016-04-05 18:23:30 +00:00
Manman Ren
552638c3d3 Swift Calling Convention: swifterror target-independent change.
At IR level, the swifterror argument is an input argument with type
ErrorObject**. For targets that support swifterror, we want to optimize it
to behave as an inout value with type ErrorObject*; it will be passed in a
fixed physical register.

The main idea is to track the virtual registers for each swifterror value. We
define swifterror values as AllocaInsts with swifterror attribute or a function
argument with swifterror attribute.

In SelectionDAGISel.cpp, we set up swifterror values (SwiftErrorVals) before
handling the basic blocks.

When iterating over all basic blocks in RPO, before actually visiting the basic
block, we call mergeIncomingSwiftErrors to merge incoming swifterror values when
there are multiple predecessors or to simply propagate them. There, we create a
virtual register for each swifterror value in the entry block. For predecessors
that are not yet visited, we create virtual registers to hold the swifterror
values at the end of the predecessor. The assignments are saved in
SwiftErrorWorklist and will be materialized at the end of visiting the basic
block.

When visiting a load from a swifterror value, we copy from the current virtual
register assignment. When visiting a store to a swifterror value, we create a
virtual register to hold the swifterror value and update SwiftErrorMap to
track the current virtual register assignment.

Differential Revision: http://reviews.llvm.org/D18108

llvm-svn: 265433
2016-04-05 18:13:16 +00:00
Sanjay Patel
a1dbd959b8 add tests to show missing optimization from D18230
llvm-svn: 265431
2016-04-05 18:09:36 +00:00
Sanjay Patel
30e1dcd813 add example usage and workflow to --help output
llvm-svn: 265430
2016-04-05 18:00:47 +00:00
David Blaikie
30fec6e0c8 llvm-dwp: Simplify hashing code a bit
llvm-svn: 265426
2016-04-05 17:51:40 +00:00