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Commit Graph

192 Commits

Author SHA1 Message Date
Johnny Chen
6e4b1607ee Thumb instructions which have reglist operands at the end and predicate operands
before reglist were not properly handled with respect to IT Block.  Fix that by
creating a new method ARMBasicMCBuilder::DoPredicateOperands() used by those
instructions for disassembly.  Add a test case.

llvm-svn: 101974
2010-04-21 01:01:19 +00:00
Johnny Chen
9998480f92 When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrSPi12,
as their generic counterparts t2ADDri12/t2SUBri12 should suffice.

llvm-svn: 101929
2010-04-20 18:45:24 +00:00
Johnny Chen
bd5bf58029 For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if Rn(Inst{19-16})=='1111',
transform the Opcode to the corresponding t2LDR*pci counterpart.

Ref: A8.6.86 LDRT, A8.6.65 LDRBT, A8.6.77 LDRHT, A8.6.81 LDRSBT, A8.6.85 LDRSHT
llvm-svn: 101915
2010-04-20 17:28:50 +00:00
Johnny Chen
fe24cdbba8 According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1
Pseudocode details of conditional, Condition bits '111x' indicate the
instruction is always executed.  That is, '1111' is a leagl condition field
value, which is now mapped to ARMCC::AL.

Also add a test case for condition field '1111'.

llvm-svn: 101817
2010-04-19 21:19:52 +00:00
Johnny Chen
091c01cb2f ARM disassembler did not react to recent changes to the NEON instruction table.
VLD1q*_UPD and VST1q*_UPD have the ${dst:dregpair} operand now.

llvm-svn: 101784
2010-04-19 16:20:34 +00:00
Chris Lattner
65d1e40895 teach the x86 asm parser how to handle segment prefixes
in memory operands.  rdar://7874844

llvm-svn: 101661
2010-04-17 18:56:34 +00:00
Chris Lattner
80a22bfcdb testcase for r101538, patch by Nico Schmidt!
llvm-svn: 101642
2010-04-17 17:22:06 +00:00
Chris Lattner
42337931b2 a bunch of ssse3 instructions are misencoded to think they have an
i8 field when they really do not.  This fixes rdar://7840289

llvm-svn: 101629
2010-04-17 07:38:24 +00:00
Johnny Chen
1b78f89844 Minor change to make the test case comply with Vd<0> == '0' when Q == '1'.
llvm-svn: 101559
2010-04-16 22:48:31 +00:00
Johnny Chen
44087236da Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for a
case.  Also, the 0xFF hex literal involved in the shift for ESize64 should be
suffixed "ul" to preserve the shift result.

Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a
test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand().

llvm-svn: 101557
2010-04-16 22:40:20 +00:00
Johnny Chen
7ac96eac03 In the same spirit of r101524, which removed the assert() from printAddrMode2OffsetOperand(),
this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case.

llvm-svn: 101529
2010-04-16 19:57:21 +00:00
Johnny Chen
3cc0200f74 Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. Changed
to the UAL syntax of LDCL<c>, instead.

Add a test case for this change which also tests the removal of assert() from
printAddrMode2OffsetOperand().

llvm-svn: 101527
2010-04-16 19:33:23 +00:00
Johnny Chen
0017916a36 Added another test case for am3offset operand, testing Rn, #+/-imm8.
Previous checkin tested Rn, #+/-Rm.

llvm-svn: 101418
2010-04-15 23:23:40 +00:00
Johnny Chen
53225c4582 Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, not
am2offset.  Modified the instruction table entry and added a new test case.

llvm-svn: 101415
2010-04-15 23:12:47 +00:00
Daniel Dunbar
cc40ce33de tests: MC/Disassembler tests depend on ARM support being compiler in.
llvm-svn: 101337
2010-04-15 03:47:20 +00:00
Chris Lattner
124dc743bc implement mc asmparser support for '.', which gets the
current PC.  rdar://7834775

We now produce an identical .o file compared to the cctools
assembler for something like this:

_f0:
L0:
        jmp L1
        .long . - L0
L1:
        jmp A
        .long . - L1

        .zerofill __DATA,_bss,A,0

llvm-svn: 101227
2010-04-14 04:40:28 +00:00
Johnny Chen
7a729daf31 Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after calling
ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2.
Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from
ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V).

[12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc
GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009)
Copyright 2004 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB.  Type "show warranty" for details.
This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done

(gdb) set args  -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
(gdb) r
Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
Reading symbols for shared libraries ++. done
0xf5 0x71 0xf0 0x53
Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1|
-------------------------------------------------------------------------------------------------

	mvnpls	r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229.

Program received signal SIGABRT, Aborted.
0x00007fff88c65886 in __kill ()
(gdb) bt
#0  0x00007fff88c65886 in __kill ()
#1  0x00007fff88d05eae in abort ()
#2  0x00007fff88cf2ef0 in __assert_rtn ()
#3  0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229
#4  0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254
#5  0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236
#6  0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182
#7  0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65
#8  0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153
#9  0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347
#10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374
(gdb) q
The program is running.  Exit anyway? (y or n) y
[13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ 

llvm-svn: 101053
2010-04-12 18:46:53 +00:00
Benjamin Kramer
0230783438 unXFAIL, arm disassembler was reenabled.
llvm-svn: 100692
2010-04-07 21:19:41 +00:00
Evan Cheng
dbf0c22d5b Reverting 100265 to try to get buildbots green again. Lots of self-hosting buildbots started complaining since this commit. Also xfail ARM disassembly tests.
llvm-svn: 100378
2010-04-05 01:04:27 +00:00
Johnny Chen
6d9cbe7270 Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Reviewed by Chris Latter and Bob Wilson.

llvm-svn: 100233
2010-04-02 22:27:38 +00:00
Daniel Dunbar
f2c7999cd8 MC/Mach-O/x86_64: Support @GOTPCREL on symbols, even for non-PCrel relocations!
llvm-svn: 99853
2010-03-29 23:56:40 +00:00
Bob Wilson
04e9ff15cb Reapply Kevin's change 94440, now that Chris has fixed the limitation on
opcode values fitting in one byte (svn r99494).

llvm-svn: 99514
2010-03-25 16:36:14 +00:00
Daniel Dunbar
cfa1820a7e MC: Fix refacto in MCExpr evaluation, I mistakenly replaced a fragment address with a symbol address.
- This fixes the integrated-as nightly test regressions.

llvm-svn: 99466
2010-03-25 01:03:17 +00:00
Bob Wilson
d5673d9f1f Speculatively revert this to see if it fixes buildbot failures.
--- Reverse-merging r99440 into '.':
U    test/MC/AsmParser/X86/x86_32-bit_cat.s
U    test/MC/AsmParser/X86/x86_32-encoding.s
U    include/llvm/IntrinsicsX86.td
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86ISelLowering.h

llvm-svn: 99450
2010-03-24 23:26:29 +00:00
Kevin Enderby
9cab7fdb12 Added the Advanced Encryption Standard (AES) Instructions.
llvm-svn: 99440
2010-03-24 22:33:33 +00:00
Kevin Enderby
8d8cb5c491 Fixed the SS42AI template for the SSE 4.2 instructions with TA prefix so it does
not get an "Unknown immediate size" assert failure when used.  All instructions 
of this form have an 8-bit immediate.  Also added a test case of an example
instruction that is of this form.

llvm-svn: 99435
2010-03-24 22:28:42 +00:00
Daniel Dunbar
3e9483dbd9 MC/Mach-O: Remove Darwin host specific tests, we don't need them anymore.
llvm-svn: 99100
2010-03-20 22:36:32 +00:00
Daniel Dunbar
97cf61ad35 MC/Mach-O: Tweak optimal_nop test to be host independent.
- This also avoids us running valgrind on /usr/bin/as, which has leaks. :)

llvm-svn: 99099
2010-03-20 22:36:29 +00:00
Kevin Enderby
766909ae3b Fixed the encoding problems of the crc32 instructions. All had the Operand size
override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.

llvm-svn: 98980
2010-03-19 20:04:42 +00:00
Daniel Dunbar
3c66c7a3c1 MC/Mach-O/x86_64: Add relocation support.
- This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information.
 - There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily).
 - 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :)

llvm-svn: 98974
2010-03-19 18:07:55 +00:00
Daniel Dunbar
f803121396 MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.
llvm-svn: 98972
2010-03-19 18:07:48 +00:00
Daniel Dunbar
f8e4be91ff MC/Mach-O: Factor out isScatteredFixupFullyResolvedSimple predicate, and fix some corner cases.
llvm-svn: 98924
2010-03-19 03:18:12 +00:00
Daniel Dunbar
3ef39d497f X86: Fix encoding for TEST64rr.
llvm-svn: 98919
2010-03-19 01:15:03 +00:00
Daniel Dunbar
1a50b05aff X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
were missing it on some movq instructions and were not including the appropriate
PCrel bias.

llvm-svn: 98880
2010-03-18 21:53:54 +00:00
Daniel Dunbar
ab14df376a MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a
temporary workaround for matching inc/dec on x86_64 to the correct instruction.
 - This hack will eventually be replaced with a robust mechanism for handling
   matching instructions based on the available target features.

llvm-svn: 98858
2010-03-18 20:06:02 +00:00
Chris Lattner
bf3e096258 fix an x86-64 encoding bug Daniel found.
llvm-svn: 98855
2010-03-18 20:04:36 +00:00
Chris Lattner
45ab55ccec add a special relocation type for movq loads for object
files that produce special relocation types where the 
linker changes movq's into lea's.

llvm-svn: 98839
2010-03-18 18:10:56 +00:00
Daniel Dunbar
476b525e01 MC/Mach-O/x86_64: Temporary labels in cstring sections require symbols (and external relocations, but we don't have x86_64 relocations yet).
llvm-svn: 98583
2010-03-15 21:56:50 +00:00
Chris Lattner
c90ed01cf3 xfail properly
llvm-svn: 98479
2010-03-14 07:55:34 +00:00
Chris Lattner
3e251f1db0 xfail these tests temporarily to get teh buildbots back to happy land.
llvm-svn: 98476
2010-03-14 07:32:48 +00:00
Daniel Dunbar
a6526284f4 X86: Fix ADD64i32 encoding.
llvm-svn: 98457
2010-03-13 22:49:39 +00:00
Daniel Dunbar
eb158a88db MC/X86_64: Symbol support.
llvm-svn: 98456
2010-03-13 22:49:35 +00:00
Daniel Dunbar
fec15da5d7 MC/Mach-O: Initial x86_64 support.
llvm-svn: 98454
2010-03-13 22:10:17 +00:00
Daniel Dunbar
6d5fa0c9d6 MC/X86_64: Fix matching of leaq.
llvm-svn: 98444
2010-03-13 19:31:44 +00:00
Daniel Dunbar
de2f4ae158 MC/X86_64: Fix matching of callq.
llvm-svn: 98443
2010-03-13 19:31:38 +00:00
Daniel Dunbar
e8b67adb94 MC/Mach-O: PCrel relocations weren't using the right base address, they are
relative to the fragment address, not its offset. This was masked by the text
section normally being at address 0.

llvm-svn: 98420
2010-03-13 02:38:00 +00:00
Daniel Dunbar
9ffe22ec23 MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testing
other functionality on 403.gcc compiled at -O0.

llvm-svn: 98405
2010-03-13 00:47:29 +00:00
Daniel Dunbar
3eab04b641 MC/X86: Add an XFAIL test where we aren't matching the correct instruction
because we don't understand how the specific instruction is doing sign
extension.

llvm-svn: 98404
2010-03-13 00:47:25 +00:00
Daniel Dunbar
8ad9589475 MC/Mach-O: Implement initial support for relaxation.
- The implementation is currently very brain dead and inefficient, but I have a
   clear plan on how to fix it.

 - The good news is, it works and correctly assembles 403.gcc (when built with
   Clang, at '-Os', '-Os -g', and '-O3'). Even better, at '-Os' and '-Os -g',
   the resulting binary is exactly equivalent to that when built with the system
   assembler. So it probably works! :)

llvm-svn: 98396
2010-03-12 22:07:14 +00:00
Daniel Dunbar
ee26fc9e9f MC/Mach-O: Implement "absolutizing" semantics of .set, by evaluating the assembly time value of variables.
llvm-svn: 98241
2010-03-11 05:53:37 +00:00