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790 Commits

Author SHA1 Message Date
Chris Lattner
f9acb33dfd Add a new cmove instruction 
llvm-svn: 11722
 2004-02-23 01:16:05 +00:00
Alkis Evlogimenos
7ec1bad952 Fix argument size for MOVSX and MOVZX instructions. 
llvm-svn: 11576
 2004-02-18 16:20:40 +00:00
Alkis Evlogimenos
c6f0651e5c These store to memory too. 
llvm-svn: 11558
 2004-02-17 17:53:48 +00:00
Chris Lattner
88271db3bc These store to memory, not read from it. 
llvm-svn: 11556
 2004-02-17 17:46:50 +00:00
Alkis Evlogimenos
b815fd46ec Add TEST and XCHG memory operand support. 
llvm-svn: 11550
 2004-02-17 15:48:42 +00:00
Alkis Evlogimenos
32a5b0fd6c Add OR and XOR memory operand support. 
llvm-svn: 11549
 2004-02-17 15:33:14 +00:00
Alkis Evlogimenos
135c4faa55 Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT, 
MOVSX, and MOVZX.

llvm-svn: 11546
 2004-02-17 09:14:23 +00:00
Alkis Evlogimenos
d7e3cc8d65 Add CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} and DECm{8,16,32} instructions. 
llvm-svn: 11544
 2004-02-17 08:49:00 +00:00
Alkis Evlogimenos
638db7b5aa Add SUB{rm,mr,mi}{8,16,32} instructions. 
llvm-svn: 11543
 2004-02-17 08:17:40 +00:00
Alkis Evlogimenos
28691e063b Add support for ADC{rm.mr}32 and SBB{rm,mr}32. 
llvm-svn: 11540
 2004-02-17 08:06:31 +00:00
Chris Lattner
d4b2f4ef32 Fix the mneumonics for the mov instructions to have the source and destination 
order in the correct sense!! Arg!

llvm-svn: 11530
 2004-02-17 06:28:19 +00:00
Chris Lattner
5757579731 Fix the last crimes against nature that used the 'ir' ordering to use the 
'ri' ordering instead... no it's not possible to store a register into an
immediate!

llvm-svn: 11529
 2004-02-17 06:24:02 +00:00
Chris Lattner
16666f8bd2 Rename MOVi[mr] instructions to MOV[rm]i 
llvm-svn: 11527
 2004-02-17 06:16:44 +00:00
Chris Lattner
9751eb8ab9 Add mem forms of AND instructions 
llvm-svn: 11521
 2004-02-17 05:25:50 +00:00
Chris Lattner
3c514e8a54 Rename the IMULri* instructions to IMULrri, as they are actually three address 
instructions.  Add forms of these instructions that read from memory

llvm-svn: 11518
 2004-02-17 04:26:43 +00:00
Alkis Evlogimenos
657876c656 Add two more variants of add. Update comments. 
llvm-svn: 11510
 2004-02-16 23:48:42 +00:00
Chris Lattner
d8cc48da34 Add some ADD instructions that take memory operands for Alkis 
llvm-svn: 11502
 2004-02-16 18:19:31 +00:00
Chris Lattner
cc5bf36481 Add support for the 'pop' instruction 
llvm-svn: 11451
 2004-02-14 21:06:02 +00:00
Chris Lattner
c87772961e Urg, right. These need an input value... 
llvm-svn: 11443
 2004-02-14 04:47:23 +00:00
Chris Lattner
6890963e48 add 'rep stos[bwd]' instructions 
llvm-svn: 11441
 2004-02-14 04:45:37 +00:00
Chris Lattner
d1c4f4c833 Add support for the rep movs[bwd] instructions, and emit them when code 
generating the llvm.memcpy intrinsic.

llvm-svn: 11351
 2004-02-12 17:53:22 +00:00
Alkis Evlogimenos
a5458ae146 IMULri* instructions do not require their first two registers operands 
to be the same (IOW they are not two address instructions).

llvm-svn: 11117
 2004-02-04 17:21:04 +00:00
Chris Lattner
7b6e8f1f70 Add the ftst instruction 
llvm-svn: 11095
 2004-02-03 07:27:50 +00:00
Chris Lattner
06f08a26ac No need to declare implicit uses/defs of ST0 
llvm-svn: 11081
 2004-02-02 19:57:45 +00:00
Chris Lattner
71c12c8e0d Generate the fchs instruction to negate a floating point number 
llvm-svn: 11078
 2004-02-02 19:31:38 +00:00
Alkis Evlogimenos
41bd8284e3 Remove floating point killer pass. This is now implemented in the 
instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.

llvm-svn: 10562
 2003-12-20 16:22:59 +00:00
John Criswell
de34542f41 Added LLVM copyright header. 
llvm-svn: 9321
 2003-10-21 15:17:13 +00:00
Chris Lattner
c4f8226aaf Emit x86 instructions for: A = B op C, where A and B are 16-bit registers, 
C is a constant which can be sign-extended from 8 bits without value loss,
and op is one of: add, sub, imul, and, or, xor.

This allows the JIT to emit the one byte version of the constant instead of
the two or 4 byte version.  Because these instructions are very common, this
can save a LOT of code space.  For example, I sampled two benchmarks, 176.gcc
and 254.gap.

BM        Old     New    Reduction
176.gcc 2673621 2548962  4.89%
254.gap  498261  475104  4.87%

Note that while the percentage is not spectacular, this did eliminate
124.6 _KILOBYTES_ of codespace from gcc.  Not bad.

Note that this doesn't effect the llc version at all, because the assembler
already does this optimization.

llvm-svn: 9284
 2003-10-20 05:53:31 +00:00
Chris Lattner
5a577c0b28 * Rename X86::IMULr16 -> X86::IMULrr16 
* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an
  extra copy into a register, reducing register pressure.

llvm-svn: 9278
 2003-10-20 03:42:58 +00:00
Chris Lattner
57825f087d Add some new instructions. Wheee 
llvm-svn: 9266
 2003-10-19 19:25:35 +00:00
Chris Lattner
8d79ae7383 Add support for unconditional branches and for emitting JE instructions 
llvm-svn: 7872
 2003-08-15 04:50:49 +00:00
Chris Lattner
be0530bab9 Add basic support for 16 and 32 bit function arguments! 
llvm-svn: 7755
 2003-08-11 21:30:00 +00:00
Chris Lattner
1ecd1818a0 Add (ret int) expander so that we can at least write testcases 
llvm-svn: 7730
 2003-08-11 15:48:00 +00:00
Chris Lattner
3f4b5cf09a Add patterns for multiply, and, or, and xor 
llvm-svn: 7725
 2003-08-11 15:23:25 +00:00
Chris Lattner
83831c66fc add a pattern for RET, immediates no longer need to be explicitly typed 
llvm-svn: 7635
 2003-08-06 15:31:35 +00:00
Chris Lattner
17fc21b5fa This is the real fix for the previous register allocator problem. 
Physical registers should not float around.

llvm-svn: 7587
 2003-08-05 00:48:47 +00:00
Chris Lattner
cf51f31c3e Add patterns for (mov R, R) (mov R, I) and subtracts. The moves are to enable 
testing, the subtracts are because I was in the neighborhood.

llvm-svn: 7581
 2003-08-04 21:18:19 +00:00
Chris Lattner
900d31f5ba Change comments into something that TableGen can read! 
llvm-svn: 7580
 2003-08-04 21:08:29 +00:00
Chris Lattner
0d7b042206 transition to using let instead of set 
llvm-svn: 7564
 2003-08-04 04:59:56 +00:00
Chris Lattner
89b4a26e56 Add new TableGen instruction definitions 
llvm-svn: 7537
 2003-08-03 21:54:21 +00:00