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Commit Graph

218931 Commits

Author SHA1 Message Date
Johannes Doerfert
f4443afe7c [Attributor][FIX] Do not simplify byval arguments
A byval argument is a different value in the caller and callee, we
cannot propagate the information as part of AAValueSimplify. Users that
want to deal with byval arguments need to specifically perform the
argument -> call site step. We do not do this for now.
2021-07-19 22:48:51 -05:00
Johannes Doerfert
895c3ad5ac [Attributor] Introduce AAPointerInfo
This patch introduces AAPointerInfo which tracks the uses of a pointer
and places them in "bins" based on their offset from the base and access
size.

As with other AAs, any pointer can be tracked but it is up to the user
to make sense of the results. The user in this patch is AAValueSimplify
and AAPotentialValues which both utilize AAPointerInfo to determine the
value of a load. For now, this is restricted to loads of allocas and
internal globals. Through the use of AAPointerInfo and the "bins" we can
track struct members separately. The users also know that storing only
zeros (at unknown indices) will result in loading only 0 (from unknown
indices). Other than that, the users are flow and context insensitive
(for now).

To deal with the "bins" more easily, AAPointerInfo provides a
forallInterfearingAccesses that applies a callback on all accesses
that might interfere with a given load or store.

Differential Revision: https://reviews.llvm.org/D104432
2021-07-19 22:48:35 -05:00
Johannes Doerfert
273b9adf8c [Attributor] Simplify loads
As a first step to simplify loads we only handle `null` and `undef`
underlying objects, as well as objects that have the load as a single user.
Loads of those values can be replaced by the initializer, if any.
Proper reasoning is introduced in a follow up patch

Differential Revision: https://reviews.llvm.org/D103862
2021-07-19 22:47:29 -05:00
Johannes Doerfert
c445095c97 [OpenMP] Fix carefully track SPMDCompatibilityTracker
We did not properly use SPMDCompatibilityTracker in various places.
This patch makes sure we look at the validity properly and also fix
the state if we can.

Differential Revision: https://reviews.llvm.org/D106085
2021-07-19 22:47:03 -05:00
Matt Arsenault
d3598a0449 CodeGen: Make MachineOptimizationRemarkEmitterPass a CFG analysis
This avoids rerunning it a few times.
2021-07-19 21:08:26 -04:00
Matt Arsenault
de55d90906 GlobalISel: Remove some mystery code that clears isReturned
I don't understand what this is going for, and haven't found an analog
in DAG code. No tests fail with this removed.
2021-07-19 20:21:05 -04:00
Matt Arsenault
d58cbace52 AArch64/GlobalISel: Preserve memory types 2021-07-19 20:21:05 -04:00
Fangrui Song
9f9a9f472c Revert D105519 "[WebAssembly] Deduplicate imports of the same module name, field name, and type" and its followup
This reverts commit 4ae575b9997e0903d1c2ec01a43e3f3f2db5df16 and 9b965b37c75d626c01951184088314590e38d299.

There is an use-of-uninitialized-value bug in the `else` branch in ImportSection::addImport.
2021-07-19 17:09:01 -07:00
Nico Weber
4ebc105ec1 [gn build] Fix llvm_build_instrumented_coverage=true builds with goma/rbe 2021-07-19 19:57:02 -04:00
Philip Reames
be7020e420 [tests] Add a couple of tests for zero stride trip counts w/loop varying exit values 2021-07-19 16:33:10 -07:00
Eli Friedman
18c83b5d27 [ScalarEvolution] Refine computeMaxBECountForLT to be accurate in more cases.
Allow arbitrary strides, and make sure we return the correct result when
the backedge-taken count is zero.

Differential Revision: https://reviews.llvm.org/D106197
2021-07-19 15:43:30 -07:00
Philip Reames
0f6ddbc33f [SCEV] Add a clarifying comment in howManyLessThans
Wrap semantics are subtle when combined with multiple exits.  This has caused several rounds of confusion during recent reviews, so try to document the subtly distinction between when wrap flags provide <u and <=u facts.
2021-07-19 15:13:48 -07:00
Arthur Eubanks
23b99bd6ce [NewPM][opt] Add -debug-pass-manager=quiet to not print analysis info
Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D106307
2021-07-19 15:08:26 -07:00
Arthur Eubanks
0b315633ca [NewPM] Bail out of devirtualization wrapper if the current SCC is invalidated
The specific case that triggered this was when inlining a recursive
internal function into itself caused the recursion to go away, allowing
the inliner to mark the function as dead. The inliner marks the SCC as
invalidated but does not provide a new SCC to continue with.

This matches the implementations of ModuleToPostOrderCGSCCPassAdaptor
and CGSCCPassManager.

Fixes PR50363.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D106306
2021-07-19 15:07:30 -07:00
LLVM GN Syncbot
3b84d5a91c [gn build] Port 08b289867b5a 2021-07-19 21:33:24 +00:00
Artem Belevich
33f436abed Revert "[MemCpyOpt] Enable memcpy optimizations unconditionally."
This reverts commit 2c98298a7559dfe4a264ef1adaad0921526768cc which breaks
sanitizers.
2021-07-19 14:27:41 -07:00
Derek Schuff
0c7127a873 [WebAssembly] Generate R_WASM_FUNCTION_OFFSET relocs in debuginfo sections
Debug info sections need R_WASM_FUNCTION_OFFSET_I32 relocs (with FK_Data_4 fixup
kinds) to refer to functions (instead of R_WASM_TABLE_INDEX as is used in data
sections). Usually this is done in a convoluted way, with unnamed temp data
symbols which target the start of the function, in which case
WasmObjectWriter::recordRelocation converts it to use the section symbol
instead. However in some cases the function can actually be undefined; in this
case the dwarf generator uses the function symbol (a named undefined function
symbol) instead. In that case the section-symbol transform doesn't work and we
need to generate the correct reloc type a different way. In this change
WebAssemblyWasmObjectWriter::getRelocType takes the fixup section type into
account to choose the correct reloc type.

Fixes PR50408
Differential Revision: https://reviews.llvm.org/D103557
2021-07-19 14:02:33 -07:00
Mircea Trofin
846c3e0e7d [MLGO] Use binary protobufs for improved training performance.
It turns out that during training, the time required to parse the
textual protobuf of a training log is about the same as the time it
takes to compile the module generating that log. Using binary protobufs
instead elides that cost almost completely.

Differential Revision: https://reviews.llvm.org/D106157
2021-07-19 13:59:28 -07:00
Nick Fitzgerald
b3c6e87b2d [WebAssembly] Deduplicate imports of the same module name, field name, and type
When two symbols import the same thing, only one import should be emitted in the Wasm file.

Fixes https://bugs.llvm.org/show_bug.cgi?id=50938

Reviewed By: sbc100

Differential Revision: https://reviews.llvm.org/D105519
2021-07-19 13:59:02 -07:00
Stuart Brady
1df98c77f3 [demangler] Fix demangling of 'half'
Demangle 'Dh' as 'half' (as per GCC), and not 'decimal16' (which doesn't
make sense, as there is no IEEE 754 decimal16 format).

The Itanium C++ ABI specification describes 'Dh' as:
> IEEE 754r half-precision floating point (16 bits)

(https://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangling-builtin)

Reviewed By: ldionne, jyknight

Differential Revision: https://reviews.llvm.org/D103833
2021-07-19 21:21:34 +01:00
Teresa Johnson
8cd6bac764 [LangRef] Clarify support for multiple metadata attachments with same id
As discussed on D105251, currently the compiler does not support
multiple metadata attachments on instructions having the same
identifier, whereas it does for global objects. Note this in the
Language Reference manual for clarity.

See D105251 for discussions of history behind this divergence, and the
complexities and possible approaches of adding this support to
instructions in the future.

Differential Revision: https://reviews.llvm.org/D106304
2021-07-19 13:18:47 -07:00
Tony Tye
e4ba84ff98 [AMDGPU] Reserve AMDGPU ELF e_flags machine 0x45
Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D106249
2021-07-19 20:17:35 +00:00
LLVM GN Syncbot
851946ccb9 [gn build] Port 54902e00d128 2021-07-19 19:24:16 +00:00
Petr Hosek
1aff1e2660 [InstrProfiling] Use weak alias for bias variable
We need the compiler generated variable to override the weak symbol of
the same name inside the profile runtime, but using LinkOnceODRLinkage
results in weak symbol being emitted in which case the symbol selected
by the linker is going to depend on the order of inputs which can be
fragile.

This change replaces the use of weak definition inside the runtime with
a weak alias. We place the compiler generated symbol inside a COMDAT
group so dead definition can be garbage collected by the linker.

We also disable the use of runtime counter relocation on Darwin since
Mach-O doesn't support weak external references, but Darwin already uses
a different continous mode that relies on overmapping so runtime counter
relocation isn't needed there.

Differential Revision: https://reviews.llvm.org/D105176
2021-07-19 12:23:51 -07:00
Artem Belevich
1e6cc7e040 [infer-address-spaces] Handle complex non-pointer constexpr arguments.
Fixes https://bugs.llvm.org/show_bug.cgi?id=51099

Differential Revision: https://reviews.llvm.org/D106098
2021-07-19 12:15:52 -07:00
Simon Pilgrim
caff7f216d [SLP][X86] Add dot product tests based off PR51075 2021-07-19 20:06:23 +01:00
Haowei Wu
d4172642cf [ifs] Fix linking errors on some llvm builders
This change fixes linking errors on some llvm builders.
2021-07-19 12:01:34 -07:00
Artem Belevich
d635785a03 [MemCpyOpt] Enable memcpy optimizations unconditionally.
The patch does not depend on the availability of the library functions for
memcpy/memset as it operates on LLVM intrinsics.  The optimizations are useful
on the targets that have these functions disabled (e.g. NVPTX & AMDGPU).

Differential Revision: https://reviews.llvm.org/D104801
2021-07-19 11:58:02 -07:00
LLVM GN Syncbot
d722d088d8 [gn build] Port 8b4acb067fd3 2021-07-19 18:24:11 +00:00
LLVM GN Syncbot
0194fd0275 [gn build] Port 61fa9afe4c5b 2021-07-19 18:24:10 +00:00
LLVM GN Syncbot
644dc4b472 [gn build] Port 6103fdfab4e2 2021-07-19 18:24:09 +00:00
Haowei Wu
5403a31116 [ifs][elfabi] Merge llvm-ifs/elfabi tools
This change merges llvm-elfabi and llvm-ifs tools.

Differential Revision: https://reviews.llvm.org/D100139
2021-07-19 11:23:19 -07:00
Haowei Wu
bcce63dd25 [ifs] Prepare llvm-ifs for elfabi/ifs merging.
This diff changes llvm-ifs to use unified IFS file format
and perform other renaming changes in preparation for the
merging between elfabi/ifs.

Differential Revision: https://reviews.llvm.org/D99810
2021-07-19 11:23:00 -07:00
Haowei Wu
db5e2f303b [elfabi] Prepare elfabi/ifs merging.
This change implements unified text stub format and command line
interface proposed in the elfabi/ifs merge plan.

Differential Revision: https://reviews.llvm.org/D99399
2021-07-19 11:22:43 -07:00
Jonas Paulsson
6713c55c41 [SystemZ] Handle NoRegister in SystemZTargetLowering::emitMemMemWrapper().
Bugfix: The compiler should be able to generate a memset to nullptr.

Review: Ulrich Weigand
2021-07-19 20:04:44 +02:00
Amy Huang
f2ec69fb59 Revert "[llvm][sve] Lowering for VLS truncating stores" because it
causes a seg fault (see https://reviews.llvm.org/D104471).

This reverts commit c305557acdaad453e32309d575fe9c6c7090c099.
2021-07-19 11:03:33 -07:00
Eli Friedman
e10d9fcec5 [NFC] Run -instnamer on test Transforms/LICM/sink-debuginfo-preserve.ll 2021-07-19 11:00:47 -07:00
Amara Emerson
49ad61c372 [GlobalISel] Fix load-or combine moving loads across potential aliasing stores.
Although this combine checks that there's no load folding barriers between
the loads that it's trying to merge, it was inserting the load at the
MIRBuilder's default insertion point, which is the G_OR use inst.

This was causing a miscompile in the test suite's
SingleSource/Regression/C/gcc-c-torture/execute/GCC-C-execute-bswap-2

Differential Revision: https://reviews.llvm.org/D106251
2021-07-19 10:23:23 -07:00
Wouter van Oortmerssen
8a42745952 [WebAssembly] Support R_WASM_MEMORY_ADDR_TLS_SLEB64 for wasm64
Also fixed TLS tests swapping addr & value in store op
Differential Revision: https://reviews.llvm.org/D106096
2021-07-19 10:22:43 -07:00
Craig Topper
fa61017019 [SelectionDAG][RISCV] Use isSExtCheaperThanZExt to control whether sext or zext is used for constant folding any_extend.
RISCV would prefer a sign extended constant since that works better
with our constant materialization. We have an existing TLI hook we
use to control sign extension of setcc operands in type legalization.
That hook happens to do the right check we need here, but might be
straying from its original purpose. With only RISCV defining this
hook in tree, I wasn't sure if it was worth adding another hook
with identical behavior.

This is an alternative to D105785 where I tried to handle this in
the RISCV backend by not creating ANY_EXTENDs in some places.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D105918
2021-07-19 09:25:28 -07:00
Victor Campos
33327c4fc5 [NewPM] Fix wrong perfect forwardings
Some template functions were missing '&&' in function arguments,
therefore these were always taken by value after template instantiation.

This patch adds the double ampersand to introduce proper perfect
forwarding.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D106148
2021-07-19 17:21:32 +01:00
Simon Pilgrim
bcad7af28b [ISD] Add disclaimer comments to AssertSext/Zext/Align opcodes about poison values
As encountered on D106053, we need to be very explicit that the Assertion nodes don't hold true for a poison value (or for specific poisoned vector elements).

Differential Revision: https://reviews.llvm.org/D106257
2021-07-19 17:15:28 +01:00
Simon Pilgrim
5157b0c187 [X86] Fix case of IsAfterLegalize argument. NFC.
Pulled out of D106280
2021-07-19 17:15:28 +01:00
Matt Arsenault
a689a41a7a GlobalISel: Preserve memory types for implicit sret load/stores 2021-07-19 11:52:42 -04:00
David Green
2fbf734dc0 [ARM] Remove PromotedBitwiseVT for NEON types
This removes the promotion of NEON AND, OR and XOR nodes to v2i32/v4i32,
treating them the same as the AArch64 and MVE backends where we just add
the relevant patterns for each legal type. This prevents a lot of
bitcasts from being added to the DAG, which have the potential to make
optimizations more difficult. It does mean adding extra patterns, and
some codegen can change due to the types now being legal, not promoted.

Differential Revision: https://reviews.llvm.org/D105588
2021-07-19 16:36:33 +01:00
maekawatoshiki
10a3d40457 [LICM] Create LoopNest Invariant Code Motion (LNICM) pass
This patch adds a new pass called LNICM which is a LoopNest version of LICM and a test case to show how LNICM works.
Basically, LNICM only hoists invariants out of loop nest (not a loop) to keep/make perfect loop nest. This enables later optimizations that require perfect loop nest.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D104180
2021-07-20 00:31:18 +09:00
Matt Arsenault
9fc3416fcc GlobalISel: Preserve LLT when bitcasting loads and stores
This also avoids improperly legalizing some truncating vector stores.
2021-07-19 11:30:14 -04:00
Matt Arsenault
2b17cee2de AArch64/GlobalISel: Cleanup unnecessary size checks in call lowering
The CCValAssign types should now be accurate, so these are no longer
necessary.
2021-07-19 11:01:30 -04:00
Jeremy Morse
6df259fb43 [InstrRef][X86] Drop debug instruction numbers from x87 instructions
Avoid a crash when using instruction referencing if x87 floating point
instructions are used. These instructions are significantly mutated when
they're rewritten from referring to registers, to referring to
floating-point-stack positions. As a result, their operands are re-ordered,
and (InstrRef) LiveDebugValues asserts when it sees a DBG_INSTR_REF
referring to a non-reg non-def register operand.

To fix this, drop the instruction numbers, and thus variable locations.
This patch adds a helper utility do do that.

Dropping the variable locations is sub-optimal, but applying DBG_VALUEs to
the $fp0 and similar registers is dropped on emission too. It seems we've
never done well at describing variables that live in x87 registers, at all.

Differential Revision: https://reviews.llvm.org/D105657
2021-07-19 15:08:27 +01:00
Kazu Hirata
297f95d1cb [CodeGen] Remove isNON_TRUNCStore and isTRUNCStore (NFC)
The last use of isNON_TRUNCStore was removed on Oct 10, 2018 in commit
07acc992dc39edfccc5a4b773c3dcf8a5bf6d893.

isTRUNCStore seems to be unused for at least 10 years.
2021-07-19 06:56:04 -07:00