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56 Commits

Author SHA1 Message Date
Zlatko Buljan
a99ac8cda9 [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructions 
Differential Revision: http://reviews.llvm.org/D11406

llvm-svn: 252885
 2015-11-12 13:21:33 +00:00
Hrvoje Varga
14f985bea0 [mips][microMIPS] Implement LLE and SCE instructions 
Differential Revision: http://reviews.llvm.org/D11630

llvm-svn: 250379
 2015-10-15 08:11:50 +00:00
Hrvoje Varga
d0abe7e77c [mips][microMIPS] Implement LWLE, LWRE, SWLE and SWRE instructions 
Differential Revision: http://reviews.llvm.org/D11631

llvm-svn: 250377
 2015-10-15 07:23:06 +00:00
Zoran Jovanovic
b115382747 [mips][microMIPS] Implement PREFX, LHUE, LBE, LBUE, LHE, LWE, SBE, SHE and SWE instructions 
Differential Revision: http://reviews.llvm.org/D9189

llvm-svn: 247780
 2015-09-16 09:14:35 +00:00
Zoran Jovanovic
18ded41e82 [mips][microMIPS] Implement CACHEE and PREFE instructions 
Differential Revision: http://reviews.llvm.org/D11628

llvm-svn: 247125
 2015-09-09 09:10:46 +00:00
Zoran Jovanovic
7f0e9478f6 [mips][microMIPS] Implement movep instruction 
Differential Revision: http://reviews.llvm.org/D7465

llvm-svn: 228703
 2015-02-10 16:36:20 +00:00
Jozef Kolek
e6b6be169a [mips][microMIPS] Implement LWGP instruction 
Differential Revision: http://reviews.llvm.org/D6650

llvm-svn: 227325
 2015-01-28 17:27:26 +00:00
Jozef Kolek
07bbffd274 [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B 
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514

llvm-svn: 226657
 2015-01-21 12:39:30 +00:00
Jozef Kolek
544ed14227 [mips][microMIPS] Implement ADDIUPC instruction 
Differential Revision: http://reviews.llvm.org/D6582

llvm-svn: 226656
 2015-01-21 12:10:11 +00:00
Jozef Kolek
dc9fe311f2 Reverted revision 226577. 
llvm-svn: 226595
 2015-01-20 19:29:28 +00:00
Jozef Kolek
ca8263125b [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B 
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514

llvm-svn: 226577
 2015-01-20 16:45:27 +00:00
Jozef Kolek
c8014187bb [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructions 
Differential Revision: http://reviews.llvm.org/D5271

llvm-svn: 225627
 2015-01-12 12:03:34 +00:00
Jozef Kolek
a7fba787ce [mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions 
Differential Revision: http://reviews.llvm.org/D5204

llvm-svn: 224785
 2014-12-23 19:55:34 +00:00
Jozef Kolek
814723a8ed [mips][microMIPS] Implement LWSP and SWSP instructions 
Differential Revision: http://reviews.llvm.org/D6416

llvm-svn: 224771
 2014-12-23 16:16:33 +00:00
Zoran Jovanovic
15712f82b0 [mips][microMIPS] Implement SWM16 and LWM16 instructions 
Differential Revision: http://reviews.llvm.org/D5579

llvm-svn: 222901
 2014-11-27 18:28:59 +00:00
Jozef Kolek
c85a4a5656 [mips][microMIPS] Implement BREAK16 and SDBBP16 instructions 
Patch by Radovan Obradovic.

Differential Revision: http://reviews.llvm.org/D5048

llvm-svn: 222900
 2014-11-27 18:18:42 +00:00
Jozef Kolek
dd0dbf282b [mips][microMIPS] Implement LBU16, LHU16, LW16, SB16, SH16 and SW16 instructions 
Differential Revision: http://reviews.llvm.org/D5122

llvm-svn: 222653
 2014-11-24 14:39:13 +00:00
Zoran Jovanovic
ebf19d975c [mips][micromips] Implement SWM32 and LWM32 instructions 
Differential Revision: http://reviews.llvm.org/D5519

llvm-svn: 222367
 2014-11-19 16:44:02 +00:00
Jozef Kolek
0de52b5b97 [mips][microMIPS] Implement LWXS instruction. 
Differential Revision: http://reviews.llvm.org/D5407

llvm-svn: 222348
 2014-11-19 11:39:12 +00:00
Jozef Kolek
e466cd5b54 [mips][microMIPS] Implement SDBBP and RDHWR instructions. 
Differential Revision: http://reviews.llvm.org/D5240

llvm-svn: 222347
 2014-11-19 11:25:50 +00:00
Zoran Jovanovic
3aa8010f59 [mips][microMIPS] Implement ANDI16 instruction 
llvm-svn: 221367
 2014-11-05 17:31:00 +00:00
Zoran Jovanovic
9298c57c2a Reverted revisions 221351, 221352 and 221353. 
llvm-svn: 221354
 2014-11-05 16:19:59 +00:00
Zoran Jovanovic
d61600192c [mips][microMIPS] Implement ANDI16 instruction 
Differential Revision: http://reviews.llvm.org/D5163

llvm-svn: 221351
 2014-11-05 15:39:41 +00:00
Zoran Jovanovic
417b0378da [mips][microMIPS] Implement ADDIUR1SP instruction 
Differential Revision: http://reviews.llvm.org/D5153

llvm-svn: 220477
 2014-10-23 11:13:59 +00:00
Zoran Jovanovic
7d4ae91afe ps][microMIPS] Implement ADDIUR2 instruction 
Differential Revision: http://reviews.llvm.org/D5151

llvm-svn: 220476
 2014-10-23 11:06:34 +00:00
Zoran Jovanovic
c644ce2e43 ps][microMIPS] Implement LI16 instruction 
Differential Revision: http://reviews.llvm.org/D5149

llvm-svn: 220475
 2014-10-23 10:59:24 +00:00
Zoran Jovanovic
0172553d1e [mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions 
Differential Revision: http://reviews.llvm.org/D5774

llvm-svn: 220474
 2014-10-23 10:42:01 +00:00
Zoran Jovanovic
5e356e74e3 [mips][microMIPS] Implement ADDU16 and SUBU16 instructions 
Differential Revision: http://reviews.llvm.org/D5118

llvm-svn: 220276
 2014-10-21 08:44:58 +00:00
Zoran Jovanovic
26b6fdd712 [mips][microMIPS] Implement AND16, NOT16, OR16 and XOR16 instructions 
Differential Revision: http://reviews.llvm.org/D5117

llvm-svn: 220275
 2014-10-21 08:32:40 +00:00
Zoran Jovanovic
d8488142ad [mips][microMIPS] Implement ADDIUSP instruction 
Differential Revision: http://reviews.llvm.org/D5084

llvm-svn: 219500
 2014-10-10 14:37:30 +00:00
Zoran Jovanovic
454a101d3d [mips][microMIPS] Implement ADDIUS5 instruction 
Differential Revision: http://reviews.llvm.org/D5049

llvm-svn: 219495
 2014-10-10 13:45:34 +00:00
Zoran Jovanovic
f1edd29dad [mips][microMIPS] Implement JRADDIUSP instruction 
Differential Revision: http://reviews.llvm.org/D5046

llvm-svn: 217681
 2014-09-12 14:29:54 +00:00
Zoran Jovanovic
4d73b21714 [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions 
Differential Revision: http://reviews.llvm.org/D5211

llvm-svn: 217675
 2014-09-12 13:33:33 +00:00
Zoran Jovanovic
25db0be672 [mips][microMIPS] MicroMIPS Compact Branch Instructions BEQZC and BNEZC 
Differential Revision: http://reviews.llvm.org/D3545

llvm-svn: 215636
 2014-08-14 12:09:10 +00:00
Zoran Jovanovic
712fef1943 Implementation of 16-bit microMIPS instructions MFHI and MFLO. 
Differential Revision: http://llvm-reviews.chandlerc.com/D3141

llvm-svn: 205532
 2014-04-03 12:47:34 +00:00
Zoran Jovanovic
ad16697119 Provide an operand for microMIPS wait instruction. 
llvm-svn: 204329
 2014-03-20 10:41:37 +00:00
Zoran Jovanovic
35c85f0c11 Implementation of microMIPS 16-bit instructions MOVE and JALR. 
Differential Revision: http://llvm-reviews.chandlerc.com/D3112

llvm-svn: 204325
 2014-03-20 10:18:24 +00:00
Zoran Jovanovic
ebb68d0712 Fixed encoding of SYSCALL microMIPS instruction. 
llvm-svn: 202523
 2014-02-28 18:17:08 +00:00
Zoran Jovanovic
d914bd8ae2 Revert revision 202518 because of wrong commit message. 
llvm-svn: 202521
 2014-02-28 18:14:16 +00:00
Zoran Jovanovic
43ca53260b Fix operand of SC instruction. 
llvm-svn: 202518
 2014-02-28 18:02:17 +00:00
Zoran Jovanovic
427d20b793 Support for microMIPS FPU instructions 2. 
llvm-svn: 198009
 2013-12-25 10:09:27 +00:00
Zoran Jovanovic
b55909330e Support for microMIPS FPU instructions 1. 
llvm-svn: 197815
 2013-12-20 15:44:08 +00:00
Zoran Jovanovic
e6baed485f Support for microMIPS control instructions. 
llvm-svn: 197696
 2013-12-19 16:25:00 +00:00
Zoran Jovanovic
a4d6da998d Support for microMIPS LL and SC instructions. 
llvm-svn: 197692
 2013-12-19 16:12:56 +00:00
Zoran Jovanovic
e87258135d Use instr mapping for microMIPS in llvm-mc. 
llvm-svn: 194792
 2013-11-15 08:07:34 +00:00
Zoran Jovanovic
feadcc01d7 Support for microMIPS trap instruction with immediate operands. 
llvm-svn: 194569
 2013-11-13 13:15:03 +00:00
Zoran Jovanovic
935364b314 Support for microMIPS trap instructions 1. 
llvm-svn: 194205
 2013-11-07 14:35:24 +00:00
Zoran Jovanovic
134add2b71 Support for microMIPS branch instructions. 
llvm-svn: 193992
 2013-11-04 14:53:22 +00:00
Zoran Jovanovic
929213f2ec Support for microMIPS jump instructions 
llvm-svn: 193623
 2013-10-29 16:38:59 +00:00
Zoran Jovanovic
579084a489 Support for misc microMIPS instructions. 
llvm-svn: 190744
 2013-09-14 06:49:25 +00:00