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Commit Graph

6456 Commits

Author SHA1 Message Date
Evan Cheng
b16bf52453 Update
llvm-svn: 32214
2006-12-05 03:58:23 +00:00
Chris Lattner
0be88afd90 Add support for 64-bit 'r' constraint. Patch by by Rafael ~Avila de Espíndol!
This fixes PR1029 and Regression/CodeGen/X86/x86-64-asm.ll

llvm-svn: 32206
2006-12-04 22:38:21 +00:00
Jim Laskey
1dcda902cd Restoration of the stack pointer after a deallocation of a alloca was not
updating the SP link.

llvm-svn: 32202
2006-12-04 22:04:42 +00:00
Evan Cheng
11e73ffe93 Non-darwin gcc should default to static relocation to match gcc.
llvm-svn: 32184
2006-12-04 18:07:10 +00:00
Evan Cheng
bf13611e84 Match TargetInstrInfo changes.
llvm-svn: 32098
2006-12-01 21:52:58 +00:00
Evan Cheng
5c7e78886c convertToThreeAddress() is now responsible for updating live info as well as inserting the new MI's.
llvm-svn: 32097
2006-12-01 21:52:41 +00:00
Evan Cheng
c5ad9caeff Add weak reference directive.
llvm-svn: 32091
2006-12-01 20:47:11 +00:00
Evan Cheng
1d611158eb Copy and paste error. An initialized global cannot be a weak reference.
llvm-svn: 32075
2006-12-01 17:39:22 +00:00
Jim Laskey
8f43fbf759 1. In ppc64 mode we need only use one GPR.
2. Float values need to be promoted to double when they are vararg.

llvm-svn: 32074
2006-12-01 16:30:47 +00:00
Jim Laskey
a8db40105b ExternalWeak case in wrong location.
llvm-svn: 32073
2006-12-01 14:37:39 +00:00
Evan Cheng
04e66b07dc Fix 2005-05-08-FPStackifierPHI.ll failure.
llvm-svn: 32071
2006-12-01 10:11:51 +00:00
Evan Cheng
3cc87db480 A initialized global variable cannot be extern weak. However, if a global value's initializer is itself a external weak symbol, emit the weak reference.
llvm-svn: 32069
2006-12-01 09:13:26 +00:00
Evan Cheng
6f5f81722b Darwin PPC external weak linkage support.
llvm-svn: 32068
2006-12-01 07:56:37 +00:00
Evan Cheng
d326e5b35e Minor code clean up.
llvm-svn: 32067
2006-12-01 07:38:23 +00:00
Evan Cheng
5b43e8613e Fix indentation.
llvm-svn: 32066
2006-12-01 07:17:00 +00:00
Evan Cheng
1dfe5221c1 Darwin X86 external weak linkage support.
llvm-svn: 32065
2006-12-01 07:15:24 +00:00
Chris Lattner
860908f98c Fix the CodeGen/PowerPC/vec_constants.ll regression.
llvm-svn: 32057
2006-12-01 01:45:39 +00:00
Anton Korobeynikov
f627d28d9c Introducing external weak linkage. Darwin codegen should be added later.
llvm-svn: 32052
2006-12-01 00:25:12 +00:00
Anton Korobeynikov
25535e6c64 Factor out GVRequiresExtraLoad() from .h to .cpp
llvm-svn: 32048
2006-11-30 22:42:55 +00:00
Evan Cheng
456101ebb9 - Use a different wrapper node for RIP-relative GV, etc.
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.

llvm-svn: 32046
2006-11-30 21:55:46 +00:00
Evan Cheng
d8be97599a MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor
llvm-svn: 32034
2006-11-30 07:12:03 +00:00
Evan Cheng
08e6984667 Remove the ugly SPARCV9 TargetInstrDescriptors hack.
llvm-svn: 32033
2006-11-30 07:10:43 +00:00
Evan Cheng
f64e341522 In PIC mode, GV not requiring an extra load can be used as address immediate.
llvm-svn: 32028
2006-11-29 23:48:14 +00:00
Evan Cheng
1e3f41acde Clean up.
llvm-svn: 32027
2006-11-29 23:46:27 +00:00
Evan Cheng
7e20347607 Fix for PR1018 - Better support for X86-64 Linux in small code model.
llvm-svn: 32026
2006-11-29 23:19:46 +00:00
Chris Lattner
3219b522c8 Fix bug codegen'ing FP constant vectors with integer splats. Make sure the
created intrinsics have the right integer types.  This fixes
PowerPC/2006-11-29-AltivecFPSplat.ll

llvm-svn: 32024
2006-11-29 19:58:49 +00:00
Jim Laskey
00bcb51943 Offset for load of 32-bit arg in 64-bit world was incorrect.
llvm-svn: 32019
2006-11-29 13:37:09 +00:00
Evan Cheng
f968824cdb Custom lower READCYCLECOUNTER for x86-64.
llvm-svn: 32017
2006-11-29 08:28:13 +00:00
Chris Lattner
e72dff706e done
llvm-svn: 32013
2006-11-29 07:21:46 +00:00
Evan Cheng
52f30d0ff2 16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman.
llvm-svn: 32004
2006-11-29 02:00:40 +00:00
Chris Lattner
4e07e4aa24 Upgrade the ugly darwin 64-bit bswap idiom (bswap %eax / bswap %edx /
xchgl %eax, %edx) to llvm.bswap.i64.  This compiles:

long long test2(long long A) {
  return _OSSwapInt64(A);
}

to:

_test2:
        movl 8(%esp), %eax
        movl 4(%esp), %edx
        bswapl %eax
        bswapl %edx
        ret

instead of:

_test2:
        movl 8(%esp), %edx
        movl 4(%esp), %eax
        bswap   %eax
        bswap   %edx
        xchgl   %eax, %edx
        ret

GCC manages (with -fomit-frame-pointer) the uglier:

_test2:
        subl    $4, %esp
        movl    8(%esp), %eax
        movl    12(%esp), %edx
        bswap   %eax
        bswap   %edx
        xchgl   %eax, %edx
        addl    $4, %esp
        ret

llvm-svn: 32001
2006-11-29 01:48:01 +00:00
Chris Lattner
50d2db3b77 Trivially lower 'bswap $0' into llvm.bswap. This fixes hexxagon with the
JIT on darwin/x86, which has htonl implemented as inline asm.

llvm-svn: 31999
2006-11-29 01:14:06 +00:00
Andrew Lenharth
e46a408fb9 gcc doesn't like an empty colbber list
llvm-svn: 31987
2006-11-28 23:07:32 +00:00
Andrew Lenharth
aee28a6544 Identities are default now
llvm-svn: 31980
2006-11-28 22:28:08 +00:00
Andrew Lenharth
a32f3e30b3 Make identity default, and fix PR1020
llvm-svn: 31979
2006-11-28 22:25:32 +00:00
Evan Cheng
27408161df New entries.
llvm-svn: 31976
2006-11-28 19:59:25 +00:00
Andrew Lenharth
7669b3acc5 update comments
llvm-svn: 31975
2006-11-28 19:56:02 +00:00
Andrew Lenharth
d93af28924 Get the asminfo for the target most closely matching the module and use that for inline asm
llvm-svn: 31974
2006-11-28 19:53:36 +00:00
Andrew Lenharth
c0ee1250ad X86 asm -> gcc asm translation table (incomplete)
llvm-svn: 31973
2006-11-28 19:52:49 +00:00
Andrew Lenharth
c51f451af5 Add per-target support for asm translation in the cbe
llvm-svn: 31972
2006-11-28 19:52:20 +00:00
Jim Laskey
7b0a74da3c Remove debug code.
llvm-svn: 31970
2006-11-28 18:27:02 +00:00
Jim Laskey
737f53b6aa Prime text sections to improve branch locality in large object files.
llvm-svn: 31969
2006-11-28 18:21:52 +00:00
Jim Laskey
a5c5ceb212 32-bit int space was not accounted for properly in lowerCall.
llvm-svn: 31966
2006-11-28 14:53:52 +00:00
Evan Cheng
62d19fbf98 Fix JIT encoding bugs for shift / rotate by one ops.
llvm-svn: 31952
2006-11-28 01:28:00 +00:00
Andrew Lenharth
f284b201e7 Preliminary support for inline asm in the cbe. The target specific ugliness
is still in Writer, but issolated to a single function. This might be split
into something in each target directory.  This is sufficient to get through
archie and an strcpy impl on linux-x86.

Module level asm is not handled.

llvm-svn: 31948
2006-11-27 23:50:49 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.

llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Reid Spencer
6010c0ef4a When truncating to bool, it is necessary to & with 1 for all casts that
can result in a bool. Previously PtrToInt, FPToUI and FPToSI were missing
this operation.

llvm-svn: 31938
2006-11-27 18:51:06 +00:00
Reid Spencer
992d9788b3 For PR950:
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.

llvm-svn: 31931
2006-11-27 01:05:10 +00:00
Duraid Madina
02b497f15a fix storing bools to mem and unordered FP ops
llvm-svn: 31920
2006-11-26 04:34:26 +00:00
Reid Spencer
5ae73ed00d Add newline at end of file.
llvm-svn: 31902
2006-11-25 05:41:02 +00:00
Anton Korobeynikov
ddb73b4f1e Refactored *GVRequiresExtraLoad() to Subtarget method.
llvm-svn: 31887
2006-11-21 00:01:06 +00:00
Chris Lattner
ed9a2f6371 in ppc64-mode, don't allocate the 32-bit version of r13 either.
llvm-svn: 31884
2006-11-20 20:48:05 +00:00
Chris Lattner
ad5f088196 r13 is the thread pointer on darwin/ppc64, don't allocate it.
llvm-svn: 31882
2006-11-20 19:33:51 +00:00
Chris Lattner
86e39c84b6 Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit
features autodetected.  This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.

llvm-svn: 31879
2006-11-20 18:16:05 +00:00
Anton Korobeynikov
2449b29bdd We should perform extra load for dllimported calls
llvm-svn: 31874
2006-11-20 10:46:14 +00:00
Chris Lattner
eb9b1840b3 on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots.
Also, valist should create a pointer RC reg class value, not a GPRC value.

llvm-svn: 31840
2006-11-18 01:57:19 +00:00
Chris Lattner
c4b759987a make sure to safe LR8 in the right stack slot for PPC64
llvm-svn: 31839
2006-11-18 01:34:43 +00:00
Chris Lattner
a55a2365bc Pretty print 'rldicr r2, r2, 2, 61' as 'sldi r2, r2, 2'.
llvm-svn: 31838
2006-11-18 01:23:56 +00:00
Chris Lattner
f50d87eb50 Rewrite the branch selector to be correct in the face of large functions.
The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model.  This fixes assembler errors when compiling 403.gcc with
tail merging enabled.

Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion.  Only if branches need expansion are instructions rewritten
and created.  This should make branch select faster, and eliminates the
Bxx instructions from the .td file.

llvm-svn: 31837
2006-11-18 00:32:03 +00:00
Chris Lattner
a5439b7913 add encoding for BCC, after finally wrestling strange ppc/tblgen endianness
issues to the ground.

llvm-svn: 31836
2006-11-17 23:53:28 +00:00
Chris Lattner
0d88b19f2f convert PPC::BCC to use the 'pred' operand instead of separate predicate
value and CR reg #.  This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(

llvm-svn: 31835
2006-11-17 22:37:34 +00:00
Chris Lattner
73329ae80d rename PPC::COND_BRANCH to PPC::BCC
llvm-svn: 31834
2006-11-17 22:14:47 +00:00
Chris Lattner
1527483a15 start using PPC predicates more consistently.
llvm-svn: 31833
2006-11-17 22:10:59 +00:00
Evan Cheng
a9176b38f9 For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.

llvm-svn: 31832
2006-11-17 22:10:14 +00:00
Jim Laskey
bc27bd0c6e Hopefully a good crack at making debugging work on intel -disable-fp-elim.
llvm-svn: 31830
2006-11-17 21:19:15 +00:00
Jim Laskey
a1f032c03a Assert unhandled case.
llvm-svn: 31828
2006-11-17 18:49:39 +00:00
Jim Laskey
b56f73f709 1. Ignore the -disable-fp-elim when the routine is a leaf.
2. Offsets on 64-bit stores are still in bytes.

llvm-svn: 31824
2006-11-17 16:09:31 +00:00
Jim Laskey
e0ff7bdbd3 Typo. Fix the nightly tests.
llvm-svn: 31823
2006-11-17 14:06:41 +00:00
Bill Wendling
b6061e32fa Removed even more std::cerr and #include <iostream> things.
llvm-svn: 31813
2006-11-17 07:52:03 +00:00
Chris Lattner
81683aa08b implement a todo: change a map into a vector
llvm-svn: 31805
2006-11-17 01:52:23 +00:00
Chris Lattner
e4e113818f fix typo
llvm-svn: 31799
2006-11-17 00:49:36 +00:00
Chris Lattner
237ee79d06 implicit_def_vrrc doesn't generate code.
llvm-svn: 31797
2006-11-16 23:49:52 +00:00
Evan Cheng
fc1b3d8bc8 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.
llvm-svn: 31795
2006-11-16 23:33:25 +00:00
Evan Cheng
a838021d2c Fix a potential bug: MOVPDI2DI, etc. are not copy instructions.
llvm-svn: 31794
2006-11-16 23:22:26 +00:00
Jim Laskey
8aac7dc0ee This is a general clean up of the PowerPC ABI. Address several problems and
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.

llvm-svn: 31792
2006-11-16 22:43:37 +00:00
Chris Lattner
5dcf43138d fix a regression that I introduced. stdu should scale the offset by 4
before printing it.

llvm-svn: 31791
2006-11-16 21:45:30 +00:00
Evan Cheng
c653e70b2d Align stubs on 4 byte boundary. This fixes 447.dealII.
llvm-svn: 31790
2006-11-16 20:13:34 +00:00
Chris Lattner
41280ae60d add a statistic
llvm-svn: 31785
2006-11-16 18:13:49 +00:00
Chris Lattner
283e7306c1 fix broken encoding
llvm-svn: 31778
2006-11-16 01:01:28 +00:00
Chris Lattner
99d9dd8d07 add ppc64 r+i stores with update.
llvm-svn: 31776
2006-11-16 00:57:19 +00:00
Chris Lattner
4edb6f09fe add patterns for ppc32 preinc stores. ppc64 next.
llvm-svn: 31775
2006-11-16 00:41:37 +00:00
Chris Lattner
c4b9cff1f9 switch these back to the 'bad old way'
llvm-svn: 31774
2006-11-16 00:33:34 +00:00
Chris Lattner
f505815dad Fix ppc64 epilog bug.
llvm-svn: 31771
2006-11-15 23:35:30 +00:00
Chris Lattner
bd95b9d4ae Stop using isTwoAddress, switching to operand constraints instead.
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).

llvm-svn: 31770
2006-11-15 23:24:18 +00:00
Chris Lattner
1158705ea7 add a new field needed by the code emitter generator.
llvm-svn: 31768
2006-11-15 22:55:04 +00:00
Evan Cheng
2a92afa25d Properly transfer kill / dead info.
llvm-svn: 31765
2006-11-15 20:58:11 +00:00
Evan Cheng
1b3bde1c1b Kill / dead info has been moved to MI's.
llvm-svn: 31764
2006-11-15 20:56:39 +00:00
Evan Cheng
4625504fa4 commuteInstruction should propagate kill / dead info.
llvm-svn: 31763
2006-11-15 20:56:03 +00:00
Chris Lattner
9bc55a6c38 fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
addrmodes.

llvm-svn: 31757
2006-11-15 19:55:13 +00:00
Chris Lattner
ccbbe940eb Simplify IntrinsicLowering and clarify that it is only for use by the
CBE and interpreter.

llvm-svn: 31755
2006-11-15 18:00:10 +00:00
Chris Lattner
1453db28c3 Remove unneeded forward decls
llvm-svn: 31754
2006-11-15 17:53:13 +00:00
Chris Lattner
2f520b36ba Fix the PPC regressions last night
llvm-svn: 31752
2006-11-15 17:40:51 +00:00
Chris Lattner
6d5a509e34 Switch loads over to use memri as the operand instead of a reg/imm operand
pair for cleanliness.  Add instructions for PPC32 preinc-stores with commented
out patterns.  More improvement is needed to enable the patterns, but we're
getting close.

llvm-svn: 31749
2006-11-15 02:43:19 +00:00
Evan Cheng
7c9b3c7ea3 Revert. This wasn't meant to be checked in.
llvm-svn: 31737
2006-11-14 19:20:33 +00:00
Chris Lattner
55c68f61a7 group load and store instructions together. No functionality change.
llvm-svn: 31736
2006-11-14 19:19:53 +00:00
Chris Lattner
6c55120e31 Fix predicates for unindexed stores so they don't accidentally match indexed
stores.

llvm-svn: 31735
2006-11-14 19:13:39 +00:00
Chris Lattner
dc48b6a77c Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
clobber.  This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity.  This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.

llvm-svn: 31734
2006-11-14 18:44:47 +00:00
Chris Lattner
10b528d5c3 remove a ton of custom selection logic no longer needed
llvm-svn: 31733
2006-11-14 18:43:11 +00:00
Chris Lattner
da103686a6 it would be nice of ctlz were lowered to bsf etc.
llvm-svn: 31730
2006-11-14 08:08:46 +00:00
Chris Lattner
e3a81b796c lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of
'(shr (ctlz (sub Y, Z)), 5)'.

The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner.  For example, this:

typedef struct {
  unsigned prefix : 4;
  unsigned code : 4;
  unsigned unsigned_p : 4;
} tree_common;

int foo(tree_common *a, tree_common *b) {
  return a->code == b->code;
}

Now compiles to:

_foo:
        lwz r2, 0(r4)
        lwz r3, 0(r3)
        xor r2, r3, r2
        rlwinm r2, r2, 28, 28, 31
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

instead of:

_foo:
        lbz r2, 3(r4)
        lbz r3, 3(r3)
        srwi r2, r2, 4
        srwi r3, r3, 4
        subf r2, r2, r3
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

saving a cycle.

llvm-svn: 31725
2006-11-14 05:28:08 +00:00
Chris Lattner
8913d79def add a note
llvm-svn: 31719
2006-11-14 01:57:53 +00:00
Chris Lattner
fdffc51d57 minor tweaks, reject vector preinc.
llvm-svn: 31717
2006-11-14 01:38:31 +00:00
Evan Cheng
0e82270ff2 Matches MachineInstr changes.
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Chris Lattner
81ea2c7c0a teach the g5 hazard recognizer about update loads. This fixes
Ptrdist/anagram among others.

llvm-svn: 31708
2006-11-13 20:11:06 +00:00
Nick Lewycky
f4f28f415d Cute example from Chris Lattner.
llvm-svn: 31696
2006-11-13 00:23:28 +00:00
Jim Laskey
d692c1a0ab Make sure stack link is set in 64-bit.
llvm-svn: 31690
2006-11-11 22:22:07 +00:00
Chris Lattner
b5aefe29ae implement proper PPC64 prolog/epilog codegen.
llvm-svn: 31684
2006-11-11 19:05:28 +00:00
Jim Laskey
f5bffa5670 Running with frame pointers prevented debugging, external probes and
potentially some system calls/exception handling from working.  TOS must always
link to previous frame.  This is a short term workaround until alloca scheme is
reworked.

llvm-svn: 31677
2006-11-11 10:21:58 +00:00
Evan Cheng
b9e2ae9e37 Add implicit use / def operands to created MI's.
llvm-svn: 31676
2006-11-11 10:21:44 +00:00
Evan Cheng
f880ed86ff Add all implicit defs to FP_REG_KILL mi.
llvm-svn: 31674
2006-11-11 07:19:36 +00:00
Chris Lattner
1409347c13 allow the offset of a preinc'd load to be the low-part of a global. This
produces this clever code:

_millisecs:
        lis r2, ha16(_Time.1182)
        lwzu r3, lo16(_Time.1182)(r2)
        lwz r2, 4(r2)
        addic r4, r2, 1
        addze r3, r3
        blr

instead of this:

_millisecs:
        lis r2, ha16(_Time.1182)
        la r3, lo16(_Time.1182)(r2)
        lwz r2, lo16(_Time.1182)(r2)
        lwz r3, 4(r3)
        addic r4, r3, 1
        addze r3, r2
        blr

for:

long %millisecs() {
        %tmp = load long* %Time.1182            ; <long> [#uses=1]
        %tmp1 = add long %tmp, 1                ; <long> [#uses=1]
        ret long %tmp1
}

llvm-svn: 31673
2006-11-11 04:53:30 +00:00
Chris Lattner
3d48461071 Mark operands as symbol lo instead of imm32 so that they print lo(x) around
globals.

llvm-svn: 31672
2006-11-11 04:51:36 +00:00
Chris Lattner
9c5d395b0e ppc64 doesn't have lwau, don't attempt to form it.
llvm-svn: 31656
2006-11-11 00:08:42 +00:00
Chris Lattner
1aaa5f904c implement preinc support for r+i loads on ppc64
llvm-svn: 31654
2006-11-10 23:58:45 +00:00
Evan Cheng
922c8f63b0 Add a note.
llvm-svn: 31650
2006-11-10 22:09:17 +00:00
Evan Cheng
8c372dc9b3 These are done.
llvm-svn: 31649
2006-11-10 22:03:35 +00:00
Evan Cheng
ae1f3758bd Don't dag combine floating point select to max and min intrinsics. Those
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.

This fixes PR996.

llvm-svn: 31645
2006-11-10 21:43:37 +00:00
Evan Cheng
3a017e8abd Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.

llvm-svn: 31641
2006-11-10 21:23:04 +00:00
Chris Lattner
5e975945a5 dform 8/9 are identical to dform 1
llvm-svn: 31637
2006-11-10 17:51:02 +00:00
Evan Cheng
de7ff3fa3d Fix a potential bug.
llvm-svn: 31634
2006-11-10 09:13:37 +00:00
Evan Cheng
013597778d Add implicit def / use operands to MachineInstr.
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
Chris Lattner
1604b6a873 add an initial cut at preinc loads for ppc32. This is broken for ppc64
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)

This is disabled unless -enable-ppc-preinc is passed to llc for now.

llvm-svn: 31621
2006-11-10 02:08:47 +00:00
Chris Lattner
15c49af63f add note about ugly codegen with preinc
llvm-svn: 31617
2006-11-10 01:33:53 +00:00
Evan Cheng
6f0095807e Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
llvm-svn: 31616
2006-11-10 01:28:43 +00:00
Anton Korobeynikov
23ffdb1971 Fixing PR990: http://llvm.org/PR990.
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).

llvm-svn: 31613
2006-11-10 00:48:11 +00:00
Chris Lattner
48d2b0af37 add a note about viterbi
llvm-svn: 31612
2006-11-10 00:23:26 +00:00
Evan Cheng
d7df1a37bc PPC supports i32 / i64 pre-inc load / store.
llvm-svn: 31599
2006-11-09 19:11:50 +00:00
Evan Cheng
22bb3ba200 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
llvm-svn: 31596
2006-11-09 18:44:21 +00:00
Evan Cheng
89ee587963 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
llvm-svn: 31595
2006-11-09 17:55:04 +00:00
Rafael Espindola
5daebfdae0 implement load effective address similar to the alpha backend
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
2006-11-09 13:58:55 +00:00
Evan Cheng
8743c67826 Remove M_2_ADDR_FLAG.
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
Evan Cheng
019b921f3b Added indexed store node and patfrag's.
llvm-svn: 31576
2006-11-08 23:02:11 +00:00
Evan Cheng
2edeb17aed Use movl+xchgl instead of pushl+popl.
llvm-svn: 31572
2006-11-08 20:35:37 +00:00
Evan Cheng
736a8eb3cd Match tblegen changes.
llvm-svn: 31571
2006-11-08 20:34:28 +00:00
Rafael Espindola
f7b898d497 initial implementation of addressing mode 2
TODO: fix lea_addri

llvm-svn: 31552
2006-11-08 17:07:32 +00:00
Reid Spencer
da1f5b882a For PR950:
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542
2006-11-08 06:47:33 +00:00
Chris Lattner
bd39c99fd1 Refactor all the addressing mode selection stuff into the isel lowering
class, where it can be used for preinc formation.

llvm-svn: 31536
2006-11-08 02:15:41 +00:00
Chris Lattner
35fb10e1a4 correct the (currently unused) pattern for lwzu.
llvm-svn: 31535
2006-11-08 02:13:12 +00:00
Evan Cheng
7ca1f47a96 Fixed a bug which causes x86 be to incorrectly match
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.

Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>

llvm-svn: 31519
2006-11-07 22:14:24 +00:00
Chris Lattner
f64e5f5f3e add a note from viterbi
llvm-svn: 31506
2006-11-07 18:30:21 +00:00
Chris Lattner
bed20e1a25 fix encoding of BLR
llvm-svn: 31485
2006-11-07 01:51:50 +00:00
Chris Lattner
c3e6822514 add a note
llvm-svn: 31477
2006-11-06 21:26:49 +00:00
Jeff Cohen
e1003da1a2 Unbreak VC++ build.
llvm-svn: 31464
2006-11-05 19:31:28 +00:00
Reid Spencer
be216ad603 Fix a bug in the last patch and convert to && instead of & for logical expr.
llvm-svn: 31463
2006-11-05 19:26:37 +00:00
Reid Spencer
f88c9b1dfc Implement the -enabled-cbe-printf-a feature.
llvm-svn: 31462
2006-11-05 17:09:41 +00:00
Chris Lattner
a193c9c977 encode BLR predicate info for the JIT
llvm-svn: 31450
2006-11-04 05:42:48 +00:00
Chris Lattner
a7687f805c Go through all kinds of trouble to mark 'blr' as having a predicate operand
that takes a register and condition code.  Print these pieces of BLR the
right way, even though it is currently set to 'always'.

Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.

llvm-svn: 31449
2006-11-04 05:27:39 +00:00
Chris Lattner
db04ba8502 Describe PPC predicates, which are a pair of CR# and condition.
llvm-svn: 31438
2006-11-03 23:53:25 +00:00
Chris Lattner
4296d2e0fa initial steps to getting the predicate on PPC::BLR right.
llvm-svn: 31437
2006-11-03 23:52:18 +00:00
Chris Lattner
f9394871ff remove dead var
llvm-svn: 31436
2006-11-03 23:50:15 +00:00
Chris Lattner
7c265ad682 remove dead/redundant vars
llvm-svn: 31435
2006-11-03 23:48:56 +00:00
Chris Lattner
a69c6416ca remove redundant/dead vars
llvm-svn: 31434
2006-11-03 23:47:20 +00:00
Chris Lattner
5f953f0927 remove dead vars
llvm-svn: 31433
2006-11-03 23:46:45 +00:00
Chris Lattner
2cb1391e09 add a note
llvm-svn: 31429
2006-11-03 22:27:39 +00:00
Rafael Espindola
3459a4b85b revert previous patch
llvm-svn: 31411
2006-11-03 03:08:28 +00:00
Evan Cheng
54c4be233e Dead code.
llvm-svn: 31405
2006-11-03 02:08:41 +00:00
Rafael Espindola
5cfe91aaca add createCFGSimplificationPass to ARMTargetMachine::addInstSelector
llvm-svn: 31400
2006-11-03 01:39:25 +00:00
Chris Lattner
294085b9be silence warning
llvm-svn: 31395
2006-11-03 01:19:31 +00:00
Chris Lattner
13ae6835d9 silence warnings.
llvm-svn: 31394
2006-11-03 01:18:29 +00:00
Chris Lattner
24e8fdc1f6 silence warning
llvm-svn: 31393
2006-11-03 01:13:15 +00:00
Chris Lattner
71ce2c5de5 silence warnings
llvm-svn: 31392
2006-11-03 01:11:05 +00:00
Reid Spencer
524974949d Make CBackend -pedantic clean.
llvm-svn: 31388
2006-11-03 00:00:57 +00:00
Chris Lattner
d0b2340384 fix a bug reid noticed
llvm-svn: 31385
2006-11-02 23:39:53 +00:00
Reid Spencer
4bafa71dc1 For PR786:
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
2006-11-02 20:25:50 +00:00
Rafael Espindola
04afe6eb37 move ARMCondCodeToString to ARMAsmPrinter.cpp
remove unused variables from lowerCall

llvm-svn: 31378
2006-11-02 15:00:02 +00:00
Andrew Lenharth
c43c2d6966 fix 2006-11-01-vastart.ll
llvm-svn: 31371
2006-11-02 03:05:26 +00:00
Reid Spencer
1abf69e923 For PR950:
Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369
2006-11-02 01:53:59 +00:00
Chris Lattner
38c04a6bd6 Implement the getRegForInlineAsmConstraint method for PPC. With recent
sdisel changes, this eliminates a ton of copies around common inline asms.
For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31367
2006-11-02 01:44:04 +00:00
Evan Cheng
1da5ee8485 Rename
llvm-svn: 31364
2006-11-01 23:18:32 +00:00
Evan Cheng
b1ac9f6c12 Added getTiedToSrcOperand() to check for two-address'ness.
llvm-svn: 31360
2006-11-01 23:00:31 +00:00
Rafael Espindola
3ae2b33d17 print null values in bss
llvm-svn: 31349
2006-11-01 14:26:44 +00:00
Rafael Espindola
a52f709418 implement zextload bool and truncstore bool
llvm-svn: 31348
2006-11-01 14:13:27 +00:00
Evan Cheng
790d5c7697 Fix ldmxcsr JIT encoding.
llvm-svn: 31343
2006-11-01 06:53:52 +00:00
Evan Cheng
f49cb35d90 Add constraints to Instruction class.
llvm-svn: 31332
2006-11-01 00:26:27 +00:00
Andrew Lenharth
92b6c807c7 more shotenning
llvm-svn: 31331
2006-10-31 23:46:56 +00:00
Evan Cheng
cabfd99a79 Nuke dead code.
llvm-svn: 31327
2006-10-31 21:53:31 +00:00
Chris Lattner
def30d3eda allow the address of a global to be used with the "i" constraint when in
-static mode.  This implements PR882.

llvm-svn: 31326
2006-10-31 20:13:11 +00:00
Chris Lattner
0571c323bf implement the 'c' inline asm modifier character
llvm-svn: 31325
2006-10-31 20:12:30 +00:00
Andrew Lenharth
cc672e3b2b Let us play simplify the td file (and fix a few missed sub and mul patterns).
llvm-svn: 31322
2006-10-31 19:52:12 +00:00
Chris Lattner
3bed109ed9 handle "st" as "st(0)"
llvm-svn: 31320
2006-10-31 19:42:44 +00:00
Chris Lattner
d9afd310a6 Change the prototype for TargetLowering::isOperandValidForConstraint
llvm-svn: 31318
2006-10-31 19:40:43 +00:00
Andrew Lenharth
c4f8836525 Add all that branch mangling niftiness
llvm-svn: 31313
2006-10-31 16:49:55 +00:00
Rafael Espindola
ba8771a3db add support for calling functions when the caller has variable sized objects
llvm-svn: 31312
2006-10-31 13:03:26 +00:00
Anton Korobeynikov
e6ba8a819c 1. Clean up code due to changes in SwitchTo*Section(2)
2. Added partial debug support for mingw\cygwin targets (the same as
   Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
   for storing debug info by default, thus many (runtime) libraries has
   this information included. These formats shouldn't be mixed in one binary
   ('stabs' & 'DWARF'), otherwise binutils tools will be confused.

llvm-svn: 31311
2006-10-31 08:31:24 +00:00
Anton Korobeynikov
9867bf5eaf Unbreaking static ctors patch.
Defaulting second arguments of SwitchTo*Section, this should make things
somehow clearer.

llvm-svn: 31306
2006-10-31 06:11:06 +00:00
Reid Spencer
0b5a938e79 Make this compile again.
llvm-svn: 31304
2006-10-31 01:45:56 +00:00
Evan Cheng
a8168f310e Apply Aton's LLVM patch for PR973: Linux ctors / dtors support.
llvm-svn: 31303
2006-10-31 01:26:55 +00:00
Chris Lattner
ed0b1b4b24 fix miscompilation of llvm.isunordered, where we branched on the opposite
condition.  This fixes miscompilation of Olden/bh and many others.

llvm-svn: 31301
2006-10-30 23:02:25 +00:00
Reid Spencer
db06ed9156 Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4
generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.

llvm-svn: 31299
2006-10-30 22:32:30 +00:00
Chris Lattner
ac9ed02670 fix wonky indentation
llvm-svn: 31298
2006-10-30 22:27:23 +00:00
Evan Cheng
5766dd6455 All targets expand BR_JT for now.
llvm-svn: 31294
2006-10-30 08:02:39 +00:00
Chris Lattner
a478e05437 implement the BlockHasNoFallThrough hook
llvm-svn: 31264
2006-10-28 17:35:02 +00:00
Chris Lattner
dcfee77788 add another target hook for branch folding.
llvm-svn: 31262
2006-10-28 17:29:57 +00:00
Evan Cheng
b60a58362a Doh. Must check if GV is constant first before putting it in .cstring.
llvm-svn: 31253
2006-10-28 05:56:51 +00:00
Evan Cheng
45b6e99308 Doh. Must check if GV is constant first.
llvm-svn: 31252
2006-10-28 05:56:06 +00:00
Chris Lattner
0d69f553c9 don't dist internal readme
llvm-svn: 31247
2006-10-28 00:51:15 +00:00
Chris Lattner
c94f21143f don't dist internal readme's
llvm-svn: 31246
2006-10-28 00:49:54 +00:00
Chris Lattner
b57c880eb0 don't distribute internal readme's
llvm-svn: 31245
2006-10-28 00:48:27 +00:00
Reid Spencer
6719e92a1a Make sure all the readme files get distributed.
llvm-svn: 31244
2006-10-28 00:11:39 +00:00
Chris Lattner
838d0cbb0a this doesn't occur any more in mason
llvm-svn: 31236
2006-10-27 22:02:19 +00:00
Chris Lattner
6fe4efd730 the code in question is now:
cmpw cr0, r7, r3
        ble cr0, LBB1_5 ;bb25
LBB1_8: ;bb17
        cmpw cr0, r8, r5
        bgt cr0, LBB1_2 ;bb

which is just as good as crnand.

llvm-svn: 31235
2006-10-27 22:00:55 +00:00
Evan Cheng
090e9abaee Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value.
llvm-svn: 31228
2006-10-27 21:08:32 +00:00
Evan Cheng
a1ce4523e5 Fix for PR968: expand vector sdiv, udiv, srem, urem.
llvm-svn: 31220
2006-10-27 18:49:08 +00:00
Reid Spencer
79e316703d Initialize CStringSection member var.
llvm-svn: 31214
2006-10-27 16:14:06 +00:00
Evan Cheng
9048e1010b Change load PatFrag to ignore indexed load.
llvm-svn: 31210
2006-10-26 21:55:50 +00:00
Evan Cheng
65e78f3d08 Place cstrings in .cstring section.
llvm-svn: 31207
2006-10-26 21:48:57 +00:00
Evan Cheng
3144b839f0 Put cstrings in .cstring section when compiling for Mac OS X.
llvm-svn: 31203
2006-10-26 19:18:18 +00:00
Rafael Espindola
99322ef58c initial support for frame pointers
llvm-svn: 31197
2006-10-26 13:31:26 +00:00
Reid Spencer
b3409f52ef Enclose a case in { and } so that the pickier compilers don't complain.
llvm-svn: 31196
2006-10-26 06:17:40 +00:00
Reid Spencer
6833ffe8b8 For PR950:
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.

llvm-svn: 31195
2006-10-26 06:15:43 +00:00
Evan Cheng
1abe8bd233 During vector shuffle lowering, we sometimes commute a vector shuffle to try
to match MOVL (movss, movsd, etc.). Don't forget to commute it back and try
unpck* and shufp* if that doesn't pan out.

llvm-svn: 31186
2006-10-25 21:49:50 +00:00
Evan Cheng
034305a2e8 X86ISD::PEXTRW 3rd operand type is always target pointer type.
llvm-svn: 31185
2006-10-25 21:35:05 +00:00
Evan Cheng
01529405c9 Remove -disable-x86-shuffle-opti
llvm-svn: 31183
2006-10-25 20:48:19 +00:00
Devang Patel
0691019e12 Move getPreferredAlignmentLog from AsmPrinter to TargetData
llvm-svn: 31171
2006-10-24 20:32:14 +00:00
Rafael Espindola
a962656c07 expand ISD::VACOPY
llvm-svn: 31170
2006-10-24 20:15:21 +00:00
Chris Lattner
790275342a Fix CodeGen/IA64/ret-0.ll, which has apparently been broken since some of the
isel changes happened months ago.

llvm-svn: 31164
2006-10-24 17:09:43 +00:00
Rafael Espindola
2259fab5cf fix warning about missing newline at end of file
llvm-svn: 31162
2006-10-24 17:07:11 +00:00
Chris Lattner
71dc932fcb implement uncond branch insertion, mark branches with isBranch.
llvm-svn: 31160
2006-10-24 16:47:57 +00:00
Chris Lattner
34b009bf45 implement uncond branch insertion for the branch folding pass
llvm-svn: 31159
2006-10-24 16:44:55 +00:00
Chris Lattner
27b79c117a implement uncond branch insertion so alpha works work branchfolding.
llvm-svn: 31158
2006-10-24 16:41:36 +00:00
Chris Lattner
f899cf0dc5 implement uncond branch insertion for sparc to fix regressions from last night
due to branchfolding

llvm-svn: 31157
2006-10-24 16:39:19 +00:00
Chris Lattner
efee605648 new bad case
llvm-svn: 31156
2006-10-24 16:12:47 +00:00
Chris Lattner
e38c95d2a3 Add intrinsics for the rest of the DCB* instructions.
llvm-svn: 31148
2006-10-24 01:08:42 +00:00
Rafael Espindola
70f01d5cc0 implement STRB and STRH
llvm-svn: 31138
2006-10-23 20:34:27 +00:00
Rafael Espindola
357f151d9d expand ISD::MEMSET
llvm-svn: 31137
2006-10-23 20:08:22 +00:00
Chris Lattner
3826e15c8d this part implemented.
llvm-svn: 31122
2006-10-22 21:40:12 +00:00
Anton Korobeynikov
da7897a6c8 Do section switching right way for Mingw\Cygwin and Linux.
This will allow (after llvm-gcc linkage fix) more dummy tests using
libstdc++ to pass on mingw :)

llvm-svn: 31120
2006-10-22 21:37:13 +00:00
Reid Spencer
65b4f5b2dd Don't generate a prototype for _setjmp. At least on Linux, this function
has a different prototype than the one #included from <setjmp.h>. This
patch fixes siod and a number of other test cases on Linux that were
failing the CBE because of this _setjmp issue.

llvm-svn: 31112
2006-10-22 09:58:21 +00:00
Chris Lattner
a9adb1e558 Implement support for branch reversal, fix a bug in branch analysis.
This provides stuff like:

        cmpw cr0, r15, r29
        mr r14, r15
-       bge cr0, LBB3_111       ;bb656
-       b LBB3_90       ;bb501
+       blt cr0, LBB3_90        ;bb501
 LBB3_111:      ;bb656
        lwz r18, 68(r1)

which is particularly good for dispatch group formation.

llvm-svn: 31101
2006-10-21 06:03:11 +00:00
Chris Lattner
016325f336 Implement support for branch condition reversal.
llvm-svn: 31099
2006-10-21 05:52:40 +00:00
Chris Lattner
20bb8bfd45 Simplify code, no functionality change
llvm-svn: 31097
2006-10-21 05:42:09 +00:00
Chris Lattner
d3e583b2e1 implement support for inserting a cond branch
llvm-svn: 31096
2006-10-21 05:36:13 +00:00
Chris Lattner
b638d287f4 allow insertion of a conditional branch with fall-through
llvm-svn: 31095
2006-10-21 05:34:23 +00:00
Chris Lattner
596c126372 update assert message
llvm-svn: 31093
2006-10-21 04:42:29 +00:00
Chris Lattner
3fb2b87f17 bugfix
llvm-svn: 31074
2006-10-20 20:44:34 +00:00
Chris Lattner
62a0f00312 Implement branch analysis/xform hooks required by the branch folding pass.
llvm-svn: 31065
2006-10-20 17:42:20 +00:00
Reid Spencer
d414793dbc For PR950:
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.

llvm-svn: 31063
2006-10-20 07:07:24 +00:00
Rafael Espindola
c08546401b use Pat to implement extloadi8 and extloadi16
llvm-svn: 31052
2006-10-19 17:05:03 +00:00
Rafael Espindola
35e92188e0 implement undef
llvm-svn: 31049
2006-10-19 13:45:00 +00:00
Rafael Espindola
f7a41f3ddd print common symbols
llvm-svn: 31048
2006-10-19 13:30:40 +00:00
Rafael Espindola
722266845b implement extloadi8 and extloadi16
llvm-svn: 31047
2006-10-19 12:45:04 +00:00
Rafael Espindola
17544c1c1d expand SIGN_EXTEND_INREG
llvm-svn: 31046
2006-10-19 12:06:50 +00:00
Rafael Espindola
6cc20c7950 expand brind so that we don't have to implement jump tables right now
llvm-svn: 31045
2006-10-19 10:56:43 +00:00
Chris Lattner
a86fff7583 fit in 80 cols
llvm-svn: 31039
2006-10-18 18:26:48 +00:00
Chris Lattner
fa22dc8afe add a note
llvm-svn: 31038
2006-10-18 17:04:09 +00:00
Rafael Espindola
1220d18e11 add blx
llvm-svn: 31037
2006-10-18 16:21:43 +00:00
Rafael Espindola
73e8f41749 add isTerminatortto b and bcond
llvm-svn: 31036
2006-10-18 16:20:57 +00:00
Rafael Espindola
80c7461ada implement CallingConv::Fast as CallingConv::C
llvm-svn: 31034
2006-10-18 12:03:07 +00:00
Anton Korobeynikov
d1436ae792 Fixed mingw\cygwin linkonce linkage once again.
Added workaround for linker bug with linkonce sections.
Changed sections prefix to allow linker merge them
(PE loader doesn't like too much long-named sections :) )
All of this unbreaks libstdc++ on mingw32 allowing (small)
programs to be compiled, linked and run.

llvm-svn: 31033
2006-10-18 09:12:29 +00:00
Chris Lattner
0f686ec438 set the ppc64 stack pointer right, dynamic alloca now works for ppc64
llvm-svn: 31028
2006-10-18 01:20:43 +00:00