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Commit Graph

15035 Commits

Author SHA1 Message Date
Eli Friedman
d5ba38a3d2 Make sure to mark vector extload's as expand on ARM. Fixes PR11319.
llvm-svn: 144057
2011-11-08 01:43:53 +00:00
Eli Friedman
741d364aa9 Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up.

llvm-svn: 144055
2011-11-08 01:25:24 +00:00
Evan Cheng
4a63100fe3 Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222
llvm-svn: 144052
2011-11-08 00:31:58 +00:00
Bill Wendling
a855903bda Convert to the new EH model.
llvm-svn: 144050
2011-11-08 00:23:01 +00:00
Bill Wendling
788df1dca1 Convert to the new EH model.
llvm-svn: 144049
2011-11-08 00:17:28 +00:00
Bill Wendling
16499170c2 Convert tests to the new EH model.
llvm-svn: 144048
2011-11-08 00:09:27 +00:00
Chad Rosier
4b12a5b7fc Enable support for returning i1, i8, and i16. Nothing special todo as it's the
callee's responsibility to sign or zero-extend the return value.  The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).

llvm-svn: 144047
2011-11-08 00:03:32 +00:00
Pete Cooper
2f5c35ae89 Added missing newline
llvm-svn: 144046
2011-11-08 00:03:24 +00:00
Eli Friedman
8d138bf571 Revert r144034 while I try to track down a crash.
llvm-svn: 144044
2011-11-07 23:53:20 +00:00
Jakob Stoklund Olesen
1900a5f521 Fix test for Windows as well.
llvm-svn: 144038
2011-11-07 23:10:43 +00:00
Jakob Stoklund Olesen
9380d5daff Kill and collapse outstanding DomainValues.
DomainValues that are only used by "don't care" instructions are now
collapsed to the first possible execution domain after all basic blocks
have been processed.  This typically means the PS domain on x86.

For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are
completely collapsed to the PS domain instead of containing a mix of
execution domains created by isel.

llvm-svn: 144037
2011-11-07 23:08:21 +00:00
Pete Cooper
1d5d364e06 InstCombine now optimizes vector udiv by power of 2 to shifts
Fixes r8429

llvm-svn: 144036
2011-11-07 23:04:49 +00:00
Eli Friedman
c1bb1b2b09 Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
llvm-svn: 144034
2011-11-07 22:51:10 +00:00
Benjamin Kramer
89ebc7ab4b Simplify some uses of utohexstr.
As a side effect hex is printed lowercase instead of uppercase now.

llvm-svn: 144013
2011-11-07 21:00:59 +00:00
Jakob Stoklund Olesen
d33a581d93 Fix test for Linux.
llvm-svn: 144003
2011-11-07 20:47:23 +00:00
Jakob Stoklund Olesen
b53be3a67d Expand V_SET0 to xorps by default.
The xorps instruction is smaller than pxor, so prefer that encoding.

The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.

llvm-svn: 143996
2011-11-07 19:15:58 +00:00
Craig Topper
7eab73f510 Add AVX2 variable shift instructions and intrinsics.
llvm-svn: 143915
2011-11-07 08:26:24 +00:00
Craig Topper
b1ef950217 Add AVX2 VPMOVMASK instructions and intrinsics.
llvm-svn: 143904
2011-11-07 03:20:35 +00:00
Craig Topper
d422190c0f Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects.
llvm-svn: 143902
2011-11-07 02:00:04 +00:00
Craig Topper
01b852b95a More AVX2 instructions and their intrinsics.
llvm-svn: 143895
2011-11-06 23:04:08 +00:00
Craig Topper
31b1d79474 Add more AVX2 instructions and intrinsics.
llvm-svn: 143861
2011-11-06 06:12:20 +00:00
Chad Rosier
806ffd8918 Add support for passing i1, i8, and i16 call parameters. Also, be sure to
zero-extend the constant integer encoding.  Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.

llvm-svn: 143821
2011-11-05 20:16:15 +00:00
Benjamin Kramer
fde45fcf3c Update lit's list of tools.
llvm-svn: 143815
2011-11-05 16:20:52 +00:00
Benjamin Kramer
4c8932e3b8 Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
As a side effect we now print dwarf ulebs with .ascii directives.

llvm-svn: 143809
2011-11-05 11:52:44 +00:00
Nick Lewycky
7ea3dd8ae5 Do simple cross-block DSE when we encounter a free statement. Fixes PR11240.
llvm-svn: 143808
2011-11-05 10:48:42 +00:00
Eli Friedman
1478b657c8 Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes.
I'm going to wait for any review comments and perform some additional testing before turning this on by default.

llvm-svn: 143750
2011-11-04 23:46:11 +00:00
Daniel Dunbar
e57462ccc0 build/cmake: Change to require Python be available.
llvm-svn: 143742
2011-11-04 23:04:05 +00:00
Rafael Espindola
a13d4ca525 Add triple to test.
llvm-svn: 143735
2011-11-04 20:20:34 +00:00
Rafael Espindola
a022f4813e Emit declarations before definitions if they are available. This causes DW_AT_specification to
point back in the file in the included testcase. Fixes PR11300.

llvm-svn: 143726
2011-11-04 19:00:29 +00:00
Dan Gohman
e689158987 Add tests for existing InstSimplify features.
llvm-svn: 143721
2011-11-04 18:39:16 +00:00
Dan Gohman
19a8523a2f Teach instsimplify to simplify calls to undef.
llvm-svn: 143719
2011-11-04 18:32:42 +00:00
Craig Topper
6ae8fe6fbe Add intrinsics for X86 vcvtps2ph and vcvtph2ps instructions
llvm-svn: 143682
2011-11-04 06:59:21 +00:00
Chad Rosier
21cd759234 Add fast-isel support for returning i1, i8, and i16.
llvm-svn: 143669
2011-11-04 00:50:21 +00:00
Daniel Dunbar
0193e03f99 Speculatively revert "DeadStoreElimination can now trim the size of a store if
the end of it is dead.", which appears to break bootstrapping LLVM.

llvm-svn: 143668
2011-11-04 00:48:26 +00:00
Dan Gohman
a5f382da8b Reapply r143206, with fixes. Disallow physical register lifetimes
across calls, and only check for nested dependences on the special
call-sequence-resource register.

llvm-svn: 143660
2011-11-03 21:49:52 +00:00
Pete Cooper
ad3d5b2eee Reverted r143600 - selector reference change
llvm-svn: 143646
2011-11-03 20:47:50 +00:00
Dan Bailey
986e6b02b8 fixed global array handling for ptx to use the correct bit widths
llvm-svn: 143640
2011-11-03 19:24:46 +00:00
Pete Cooper
4902705b5f DeadStoreElimination can now trim the size of a store if the end of it is dead.
Only currently done if the later store is writing to a power of 2 address or 
has the same alignment as the earlier store as then its likely to not break up
large stores into smaller ones

Fixes <rdar://problem/10140300>

llvm-svn: 143630
2011-11-03 18:01:56 +00:00
Craig Topper
124b2fd08c Add new X86 AVX2 VBROADCAST instructions.
llvm-svn: 143612
2011-11-03 07:35:53 +00:00
Chad Rosier
74c4e2c2d9 Add support for sign-extending non-legal types in SelectSIToFP().
llvm-svn: 143603
2011-11-03 02:04:59 +00:00
Pete Cooper
c8a657a2b2 Treat objc selector reference globals as invariant so that MachineLICM can hoist them out of loops. Fixes <rdar://problem/6027699>
llvm-svn: 143600
2011-11-03 00:56:36 +00:00
Lang Hames
ceec8ec67e Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits.
llvm-svn: 143582
2011-11-02 22:52:45 +00:00
Nick Lewycky
3c8d2be421 I added the first test to run llvm-dwarfdump.
llvm-svn: 143571
2011-11-02 21:02:27 +00:00
Nick Lewycky
691d7f80c2 Don't emit a directory entry for the value in DW_AT_comp_dir, that is always
implied by directory index zero.

llvm-svn: 143570
2011-11-02 20:55:33 +00:00
Chad Rosier
8a613c5ec5 Add support for comparing integer non-legal types.
llvm-svn: 143559
2011-11-02 18:08:25 +00:00
Owen Anderson
ac9fd95057 Fix the issue that r143552 was trying to address the _right_ way. One-register lists are legal on LDM/STM instructions, but we should not print the PUSH/POP aliases when they appear. This fixes round tripping on this instruction.
llvm-svn: 143557
2011-11-02 18:03:14 +00:00
Daniel Dunbar
4169d2ddc9 tests: Clean up tests/CMakeLists.txt to drop some variable configuration we no
longer need substitutions for.

llvm-svn: 143555
2011-11-02 17:54:51 +00:00
Andrew Trick
3c1e831108 Rewrite LinearFunctionTestReplace to handle pointer-type IVs.
We've been hitting asserts in this code due to the many supported
combintions of modes (iv-rewrite/no-iv-rewrite) and IV types. This
second rewrite of the code attempts to deal with these cases systematically.

llvm-svn: 143546
2011-11-02 17:19:57 +00:00
Craig Topper
a2a55bd0b4 More AVX2 instructions and intrinsics.
llvm-svn: 143536
2011-11-02 06:54:17 +00:00
Craig Topper
c5482eb697 Add a bunch more X86 AVX2 instructions and their corresponding intrinsics.
llvm-svn: 143529
2011-11-02 04:42:13 +00:00
Andrew Trick
c9baf3a7a1 Broaden an assert to handle enable-iv-rewrite=true following r143183.
Narrowest possible fix for PR11279.

llvm-svn: 143522
2011-11-02 00:02:45 +00:00
Kevin Enderby
b5dc88b394 Fixed a bug in the code to create a dwarf file and directory table entires when
it is separating the directory part from the basename of the FileName.  Noticed 
that this:

  .file 1 "dir/foo"

when assembled got the two parts switched.  Using the Mac OS X dwarfdump tool
it can be seen easily:

% dwarfdump -a a.out
include_directories[  1] = 'foo'
                Dir  Mod Time   File Len   File Name
                ---- ---------- ---------- ---------------------------
file_names[  1]    1 0x00000000 0x00000000 dir
...

Which should be:
...
include_directories[  1] = 'dir'
                Dir  Mod Time   File Len   File Name
                ---- ---------- ---------- ---------------------------
file_names[  1]    1 0x00000000 0x00000000 foo

llvm-svn: 143521
2011-11-01 23:39:05 +00:00
Owen Anderson
0d69f6aa51 Fix disassembly of some VST1 instructions.
llvm-svn: 143507
2011-11-01 22:18:13 +00:00
Eli Friedman
c60a0ad611 Teach the x86 backend a couple tricks for dealing with v16i8 sra by a constant splat value. Fixes PR11289.
llvm-svn: 143498
2011-11-01 21:18:39 +00:00
Richard Osborne
5a9e575e81 Don't fold negative offsets into cp / dp accesses to avoid relocation errors.
This can happen if the address + addend is less than the start of the cp / dp.

llvm-svn: 143459
2011-11-01 11:31:53 +00:00
Richard Osborne
8175a9601d Combine various XCore tests for floating point intrinsic support into a single test.
llvm-svn: 143458
2011-11-01 10:51:48 +00:00
Richard Osborne
280d51dd14 Move various XCore tests to FileCheck
llvm-svn: 143457
2011-11-01 10:41:28 +00:00
Craig Topper
361c873b52 Fix operand type for x86 pmadd_ub_sw intrinsic.
llvm-svn: 143455
2011-11-01 07:25:22 +00:00
Eli Friedman
676558ae92 Make sure we use the right insertion point when instcombine replaces a PHI with another instruction. (Specifically, don't insert an arbitrary instruction before a PHI.) Fixes PR11275.
llvm-svn: 143437
2011-11-01 04:49:29 +00:00
Eli Friedman
172ff3d328 Move x86-specific tests into X86 folder.
llvm-svn: 143424
2011-11-01 03:21:48 +00:00
Eli Friedman
b32279f1fc Move another test requiring x86 into X86 directory.
llvm-svn: 143421
2011-11-01 03:12:47 +00:00
Eli Friedman
b97ce79891 Move test requiring x86 backend into X86 directory.
llvm-svn: 143420
2011-11-01 03:11:41 +00:00
Matt Beaumont-Gay
6f16a87ae3 Change the actual tests to match the input directory rename (duh)
llvm-svn: 143404
2011-10-31 23:56:52 +00:00
Matt Beaumont-Gay
a5dfba561b Rename "TestObjectFiles" to "Inputs" (like the pattern for Clang tests)
llvm-svn: 143400
2011-10-31 23:46:38 +00:00
Rafael Espindola
dd7a1f625b Move test to the X86 directory, note the PR number and only run MC once.
llvm-svn: 143352
2011-10-31 17:23:09 +00:00
Owen Anderson
d7700cb13f More not-crashing NEON disassembly updates for the vld refactoring.
llvm-svn: 143351
2011-10-31 17:17:32 +00:00
Craig Topper
dbf10927d7 Fix operand type for int_x86_ssse3_phadd_sw_128 intrinsic
llvm-svn: 143336
2011-10-31 07:16:37 +00:00
Craig Topper
c0f93132bd Test case for X86 FS/GS Base intrinsics
llvm-svn: 143332
2011-10-31 02:15:47 +00:00
Craig Topper
6eaf58df7c Begin adding AVX2 instructions. No selection support yet other than intrinsics.
llvm-svn: 143331
2011-10-31 02:15:10 +00:00
Nick Lewycky
7308946be2 Switch new .file directive emission off by default, change llc's flag for it to
-enable-dwarf-directory.

llvm-svn: 143326
2011-10-31 01:06:02 +00:00
Duncan Sands
1077c1fa88 Reapply commit 143214 with a fix: m_ICmp doesn't match conditions
with the given predicate, it matches any condition and returns the
predicate - d'oh!  Original commit message:
The expression icmp eq (select (icmp eq x, 0), 1, x), 0 folds to false.
Spotted by my super-optimizer in 186.crafty and 450.soplex.  We really
need a proper infrastructure for handling generalizations of this kind
of thing (which occur a lot), however this case is so simple that I decided
to go ahead and implement it directly.

llvm-svn: 143318
2011-10-30 19:56:36 +00:00
Benjamin Kramer
c0001c42c6 X86: Emit logical shift by constant splat of <16 x i8> as a <8 x i16> shift and zero out the bits where zeros should've been shifted in.
llvm-svn: 143315
2011-10-30 17:31:21 +00:00
Craig Topper
e77289b243 Fix return type for X86 mpsadbw instrinsic. The instruction takes in a vector of 8-bit integers, but produces a vector of 16-bit integers.
llvm-svn: 143313
2011-10-30 17:22:45 +00:00
Nadav Rotem
8282fc9e3b Fix pr11266.
On x86: (shl V, 1) -> add V,V

Hardware support for vector-shift is sparse and in many cases we scalarize the
result. Additionally, on sandybridge padd is faster than shl.

llvm-svn: 143311
2011-10-30 13:24:22 +00:00
Nadav Rotem
68400d352b Stabilize the test by specifying an exact cpu target
llvm-svn: 143307
2011-10-30 08:07:50 +00:00
Nadav Rotem
6c79131e39 Add a new DAGCombine optimization for BUILD_VECTOR.
If all of the inputs are zero/any_extended, create a new simple BV
which can be further optimized by other BV optimizations.

llvm-svn: 143297
2011-10-29 21:23:04 +00:00
Benjamin Kramer
24c4266ada Force SSE for this test.
llvm-svn: 143291
2011-10-29 19:43:44 +00:00
Benjamin Kramer
d32c541fe4 SimplifyLibCalls: Use IRBuilder.CreateGlobalString when creating a string for printf->puts, which correctly sets the unnamed_addr bit on the resulting GlobalVariable.
Fixes PR11264.

llvm-svn: 143289
2011-10-29 19:43:31 +00:00
Eli Friedman
7c9bef9ba8 Revert r143214; it's breaking a bunch of stuff.
llvm-svn: 143265
2011-10-29 00:56:07 +00:00
Dan Gohman
826cec9a4b Revert r143206, as there are still some failing tests.
llvm-svn: 143262
2011-10-29 00:41:52 +00:00
NAKAMURA Takumi
78a0f170d6 test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now.
llvm-svn: 143247
2011-10-28 23:11:03 +00:00
Jim Grosbach
f3285dba99 Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".
When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example,
  mov r2, #-3
becomes
  mvn r2, #2

rdar://10349224

llvm-svn: 143235
2011-10-28 22:36:30 +00:00
Owen Anderson
9e033c5b03 Fix illegal disassembly testcase.
llvm-svn: 143231
2011-10-28 21:45:09 +00:00
Duncan Sands
7791a854c3 The expression icmp eq (select (icmp eq x, 0), 1, x), 0 folds to false.
Spotted by my super-optimizer in 186.crafty and 450.soplex.  We really
need a proper infrastructure for handling generalizations of this kind
of thing (which occur a lot), however this case is so simple that I decided
to go ahead and implement it directly.

llvm-svn: 143214
2011-10-28 19:01:20 +00:00
Duncan Sands
3483c23658 A shift of a power of two is a power of two or zero.
For completeness - not spotted in the wild.

llvm-svn: 143211
2011-10-28 18:30:05 +00:00
Duncan Sands
5730fe6a31 Fold icmp ugt (udiv X, Y), X to false. Spotted by my super-optimizer
in 186.crafty.

llvm-svn: 143209
2011-10-28 18:17:44 +00:00
Owen Anderson
3dd6c949a5 Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle.
llvm-svn: 143208
2011-10-28 18:02:13 +00:00
Dan Gohman
dedcc22bcd Reapply r143177 and r143179 (reverting r143188), with scheduler
fixes: Use a separate register, instead of SP, as the
calling-convention resource, to avoid spurious conflicts with
actual uses of SP. Also, fix unscheduling of calling sequences,
which can be triggered by pseudo-two-address dependencies.

llvm-svn: 143206
2011-10-28 17:55:38 +00:00
Jim Grosbach
72ab459378 Thumb2 ADD/SUB instructions encoding selection outside IT block.
Outside an IT block, "add r3, #2" should select a 32-bit wide encoding
rather than generating an error indicating the 16-bit encoding is only
legal in an IT block (outside, the 'S' suffic is required for the 16-bit
encoding).

rdar://10348481

llvm-svn: 143201
2011-10-28 16:57:07 +00:00
NAKAMURA Takumi
2ea569c7e0 test/MC/AsmParser/2011-09-06-NoNewline.s: Add explicit -mtriple=i386. It uses X86 instruction.
FIXME: Would it be reproduced without target-specific operands?
FIXME: Why run llvm-mc as the same input by 3 times?
llvm-svn: 143195
2011-10-28 14:12:30 +00:00
NAKAMURA Takumi
bcfac720a7 Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be host-endian-neutral.
Don't assume APInt::getRawData() would hold target-aware endianness nor host-compliant endianness. rawdata[0] holds most lower i64, even on big endian host.

FIXME: Add a testcase for big endian target.

FIXME: Ditto on CompileUnit::addConstantFPValue() ?
llvm-svn: 143194
2011-10-28 14:12:22 +00:00
NAKAMURA Takumi
b5df9f3cc1 test/CodeGen/X86/2010-08-10-DbgConstant.ll: Add explicit -mtriple=i686-linux. It must be for elf!
llvm-svn: 143189
2011-10-28 10:50:52 +00:00
Duncan Sands
a6507c4bcb Speculatively disable Dan's commits 143177 and 143179 to see if
it fixes the dragonegg self-host (it looks like gcc is miscompiled).
Original commit messages:
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.

Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.

Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.

Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.

This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.

Delete #if 0 code accidentally left in.

llvm-svn: 143188
2011-10-28 09:55:57 +00:00
Nick Lewycky
5758d6af22 Always use the string pool, even when it makes the .o larger. This may help
tools that read the debug info in the .o files by making the DIE sizes more
consistent.

llvm-svn: 143186
2011-10-28 05:29:47 +00:00
Andrew Trick
77532be5e0 LFTR should avoid a type mismatch with null pointer IVs.
Fixes rdar://10359193 Indvar LinearFunctionTestReplace assertion

llvm-svn: 143183
2011-10-28 03:45:11 +00:00
Dan Gohman
484df993bd Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.

Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.

Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.

Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.

This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.

llvm-svn: 143177
2011-10-28 01:29:32 +00:00
Jim Grosbach
dac7815a91 ARM Allow 'q' registers in VLD/VST vector lists.
Just treat it as if the constituent D registers where specified.

rdar://10348896

llvm-svn: 143167
2011-10-28 00:06:50 +00:00
Dan Gohman
892b86e74c Remove the Alpha backend.
llvm-svn: 143164
2011-10-27 22:56:32 +00:00
Owen Anderson
f22cd77ceb Add testcase for r143162.
llvm-svn: 143163
2011-10-27 22:54:14 +00:00
Jakob Stoklund Olesen
de21509dcd Also set addrmode6 alignment when align==size.
Previously, we were only setting the alignment bits on over-aligned
loads and stores.

llvm-svn: 143160
2011-10-27 22:39:16 +00:00
Evan Cheng
75271d09f1 Avoid partial CPSR dependency from loop backedges. rdar://10357570
llvm-svn: 143145
2011-10-27 21:21:05 +00:00
Daniel Dunbar
9ca0ee457c tests: Rip out a bunch of now unused test code relating to use of llvm-gcc in LLVM tests.
llvm-svn: 143143
2011-10-27 20:59:26 +00:00
Daniel Dunbar
bb9f7884ae tests: Remove llvm2cpp, I'm pretty sure no one uses this.
llvm-svn: 143142
2011-10-27 20:59:21 +00:00
Duncan Sands
ca325638c8 Reapply commit 143028 with a fix: the problem was casting a ConstantExpr Mul
using BinaryOperator (which only works for instructions) when it should have
been a cast to OverflowingBinaryOperator (which also works for constants).
While there, correct a few other dubious looking uses of BinaryOperator.
Thanks to Chad Rosier for the testcase.  Original commit message:
My super-optimizer noticed that we weren't folding this expression to
true: (x *nsw x) sgt 0, where x = (y | 1).  This occurs in 464.h264ref.

llvm-svn: 143125
2011-10-27 19:16:21 +00:00
Benjamin Kramer
3bb9d5377e 2>&1 doesn't work here, it just creates an empty file called "&1"
llvm-svn: 143117
2011-10-27 18:27:45 +00:00
Pete Cooper
cca60da8cd Changed test to check for correct load size instead of shift as the shift might change if optimised
llvm-svn: 143116
2011-10-27 18:15:58 +00:00
Kevin Enderby
837c1d56a2 Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and
not depend on In32BitMode.  Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode.  rdar://9738584

llvm-svn: 143112
2011-10-27 17:40:41 +00:00
Jim Grosbach
4f7964293a Thumb2 t2LDMDB[_UPD] assembly parsing to recognize .w suffix.
rdar://10348844

llvm-svn: 143110
2011-10-27 17:33:59 +00:00
Jim Grosbach
e1ec953149 Thumb2 t2MVNi assembly parsing to recognize ".w" suffix.
rdar://10348584

llvm-svn: 143108
2011-10-27 17:16:55 +00:00
Bob Wilson
2ca603d9b7 Revert Duncan's r143028 expression folding which appears to be the culprit
behind a compile failure on 483.xalancbmk.

llvm-svn: 143102
2011-10-27 15:47:25 +00:00
Nick Lewycky
651475977d Teach our Dwarf emission to use the string pool.
llvm-svn: 143097
2011-10-27 06:44:11 +00:00
Eli Friedman
76e3969f05 Don't crash on 128-bit sdiv by constant. Found by inspection.
llvm-svn: 143095
2011-10-27 02:06:39 +00:00
Eli Friedman
e6918ac01a It is not safe to sink an alloca into a stacksave/stackrestore pair, so don't do that. <rdar://problem/10352360>
llvm-svn: 143093
2011-10-27 01:33:51 +00:00
Chad Rosier
e76ba1b654 A branch predicated on a constant can just FastEmit an unconditional branch.
llvm-svn: 143086
2011-10-27 00:21:16 +00:00
Jim Grosbach
e3c6fa663f Thumb2 ldr pc-relative encoding fixes.
We were parsing label references to the i12 encoding, which isn't right.
They need to go to the pci variant instead.

More of rdar://10348687

llvm-svn: 143068
2011-10-26 22:22:01 +00:00
Rafael Espindola
8c0e2c2fe7 Run test with -verify-machineinstrs.
Patch by Sanjoy Das.

llvm-svn: 143066
2011-10-26 21:20:26 +00:00
Rafael Espindola
1958dc7193 Fixes an issue reported by -verify-machineinstrs.
Patch by Sanjoy Das.

llvm-svn: 143064
2011-10-26 21:16:41 +00:00
Rafael Espindola
90896edc6c This commit introduces two fake instructions MORESTACK_RET and
MORESTACK_RET_RESTORE_R10; which are lowered to a RET and a RET
followed by a MOV respectively.  Having a fake instruction prevents
the verifier from seeing a MachineBasicBlock end with a
non-terminator (MOV).  It also prevents the rather eccentric case of a
MachineBasicBlock ending with RET but having successors nevertheless.

Patch by Sanjoy Das.

llvm-svn: 143062
2011-10-26 21:12:27 +00:00
Lang Hames
d87e366c7f Make sure short memsets on ARM lower to stores, even when optimizing for size.
llvm-svn: 143055
2011-10-26 20:56:52 +00:00
Duncan Sands
5c8fa99c32 The maximum power of 2 dividing a power of 2 is itself. This occurs
in 403.gcc and was spotted by my super-optimizer.

llvm-svn: 143054
2011-10-26 20:55:21 +00:00
Jim Grosbach
5a61a956cb Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
llvm-svn: 143034
2011-10-26 17:28:15 +00:00
Duncan Sands
c463f54342 My super-optimizer noticed that we weren't folding this expression to
true: (x *nsw x) sgt 0, where x = (y | 1).  This occurs in 464.h264ref.

llvm-svn: 143028
2011-10-26 15:31:51 +00:00
James Molloy
9afc8b08f7 Revert r142530 at least temporarily while a discussion is had on llvm-commits regarding exactly how much optsize should optimize for size over performance.
llvm-svn: 143023
2011-10-26 08:53:19 +00:00
Evan Cheng
941d5c148f Revert part of r142530. The patch potentially hurts performance especially
on Darwin platforms where -Os means optimize for size without hurting
performance.

llvm-svn: 143002
2011-10-26 01:17:44 +00:00
Mon P Wang
ed6360d273 The bitcode reader can create an shuffle with a place holder mask which it will
fix up later. For this special case, allow such a mask to be considered valid.
<rdar://problem/8622574>

llvm-svn: 142992
2011-10-26 00:34:48 +00:00
Michael J. Spencer
c59705a3bc Object: change test to create archive.
llvm-svn: 142982
2011-10-25 22:30:58 +00:00
Chad Rosier
381bd92630 Add a few test cases to ensure the bitcode reader is backward compatible with
LLVM 2.9.  My understanding is that we plan to maintain compatibility with 2.9
until the 3.1 release.  At that time we can generate new test cases using LLVM
3.0.

llvm-svn: 142958
2011-10-25 20:33:19 +00:00
Chad Rosier
3b4b3fe448 Simplify tests by not piping them through llvm-dis.
llvm-svn: 142948
2011-10-25 19:59:50 +00:00
Duncan Sands
be9c2e6e13 Restore commits 142790 and 142843 - they weren't breaking the build
bots.  Original commit messages:
- Reapply r142781 with fix. Original message:

  Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the
  loop header when computing the trip count.

  With this, we now constant evaluate:
    struct ListNode { const struct ListNode *next; int i; };
    static const struct ListNode node1 = {0, 1};
    static const struct ListNode node2 = {&node1, 2};
    static const struct ListNode node3 = {&node2, 3};
    int test() {
      int sum = 0;
      for (const struct ListNode *n = &node3; n != 0; n = n->next)
        sum += n->i;
      return sum;
    }

- Now that we look at all the header PHIs, we need to consider all the header PHIs
  when deciding that the loop has stopped evolving. Fixes miscompile in the gcc
  torture testsuite!

llvm-svn: 142919
2011-10-25 12:28:52 +00:00
Chandler Carruth
3cbbc35715 Fix the API usage in loop probability heuristics. It was incorrectly
classifying many edges as exiting which were in fact not. These mainly
formed edges into sub-loops. It was also not correctly classifying all
returning edges out of loops as leaving the loop. With this match most
of the loop heuristics are more rational.

Several serious regressions on loop-intesive benchmarks like perlbench's
loop tests when built with -enable-block-placement are fixed by these
updated heuristics. Unfortunately they in turn uncover some other
regressions. There are still several improvemenst that should be made to
loop heuristics including trip-count, and early back-edge management.

llvm-svn: 142917
2011-10-25 09:47:41 +00:00
Duncan Sands
da835efa2a Speculatively revert commits 142790 and 142843 to see if it fixes
the dragonegg and llvm-gcc self-host buildbots.  Original commit
messages:
- Reapply r142781 with fix. Original message:

  Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the
  loop header when computing the trip count.

  With this, we now constant evaluate:
    struct ListNode { const struct ListNode *next; int i; };
    static const struct ListNode node1 = {0, 1};
    static const struct ListNode node2 = {&node1, 2};
    static const struct ListNode node3 = {&node2, 3};
    int test() {
      int sum = 0;
      for (const struct ListNode *n = &node3; n != 0; n = n->next)
        sum += n->i;
      return sum;
    }

- Now that we look at all the header PHIs, we need to consider all the header PHIs
when deciding that the loop has stopped evolving. Fixes miscompile in the gcc
torture testsuite!

llvm-svn: 142916
2011-10-25 09:26:43 +00:00
Chad Rosier
3df1ba4d35 Fix these test cases to not use .bc files. Otherwise, we run into issues with
bitcode reader/writer backward compatibility.

llvm-svn: 142896
2011-10-25 01:22:20 +00:00
Jim Grosbach
fabe0f2f0b ARM assembly parsing and encoding for VLD1 with writeback.
Four entry register lists.

llvm-svn: 142882
2011-10-25 00:14:01 +00:00
Dan Gohman
77125e4240 Remove the Blackfin backend.
llvm-svn: 142880
2011-10-25 00:05:42 +00:00
Dan Gohman
b54d296fd4 Remove the SystemZ backend.
llvm-svn: 142878
2011-10-24 23:48:32 +00:00
Jim Grosbach
688186941f ARM assembly parsing and encoding for VLD1 w/ writeback.
Three entry register list variation.

llvm-svn: 142876
2011-10-24 23:26:05 +00:00
Eli Friedman
652497e03c Don't crash on variable insertelement on ARM. PR10258.
llvm-svn: 142871
2011-10-24 23:08:52 +00:00
Bill Wendling
e37d737f13 Check the visibility of the global variable before placing it into the stubs
table. A hidden variable could potentially end up in both lists.
<rdar://problem/10336715>

llvm-svn: 142869
2011-10-24 23:05:43 +00:00
Jim Grosbach
cf4fba1dd0 ARM assembly parsing and encoding for VLD1 w/ writeback.
One and two length register list variants.

llvm-svn: 142861
2011-10-24 22:16:58 +00:00
Nick Lewycky
289c30130a Now that we look at all the header PHIs, we need to consider all the header PHIs
when deciding that the loop has stopped evolving. Fixes miscompile in the gcc
torture testsuite!

llvm-svn: 142843
2011-10-24 21:02:38 +00:00
Owen Anderson
b0e09258e7 Fix a NEON disassembly case that was broken in the recent refactorings. As more of this code gets refactored, a lot of these manual decoding hooks should get smaller and/or go away entirely.
llvm-svn: 142817
2011-10-24 18:04:29 +00:00
Dan Gohman
f742ffd7fa Remove the explicit request for "Latency" scheduling from MSP430,
as the Latency scheduler is going away.

llvm-svn: 142811
2011-10-24 17:53:16 +00:00
Dan Gohman
6e1bd851dc Change the default scheduler from Latency to ILP, since Latency
is going away.

llvm-svn: 142810
2011-10-24 17:45:02 +00:00
Jim Grosbach
0bb9a86fc7 Update test for r142801.
llvm-svn: 142806
2011-10-24 17:26:26 +00:00
Benjamin Kramer
b4f9f1d5f9 XFAIL test on leak checkers.
llvm-svn: 142804
2011-10-24 17:24:05 +00:00
Chandler Carruth
d04f838629 Remove return heuristics from the static branch probabilities, and
introduce no-return or unreachable heuristics.

The return heuristics from the Ball and Larus paper don't work well in
practice as they pessimize early return paths. The only good hitrate
return heuristics are those for:
 - NULL return
 - Constant return
 - negative integer return

Only the last of these three can possibly require significant code for
the returning block, and even the last is fairly rare and usually also
a constant. As a consequence, even for the cold return paths, there is
little code on that return path, and so little code density to be gained
by sinking it. The places where sinking these blocks is valuable (inner
loops) will already be weighted appropriately as the edge is a loop-exit
branch.

All of this aside, early returns are nearly as common as all three of
these return categories, and should actually be predicted as taken!
Rather than muddy the waters of the static predictions, just remain
silent on returns and let the CFG itself dictate any layout or other
issues.

However, the return heuristic was flagging one very important case:
unreachable. Unfortunately it still gave a 1/4 chance of the
branch-to-unreachable occuring. It also didn't do a rigorous job of
finding those blocks which post-dominate an unreachable block.

This patch builds a more powerful analysis that should flag all branches
to blocks known to then reach unreachable. It also has better worst-case
runtime complexity by not looping through successors for each block. The
previous code would perform an N^2 walk in the event of a single entry
block branching to N successors with a switch where each successor falls
through to the next and they finally fall through to a return.

Test case added for noreturn heuristics. Also doxygen comments improved
along the way.

llvm-svn: 142793
2011-10-24 12:01:08 +00:00
Nick Lewycky
64d4e26aec Reapply r142781 with fix. Original message:
Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the
  loop header when computing the trip count.

  With this, we now constant evaluate:
    struct ListNode { const struct ListNode *next; int i; };
    static const struct ListNode node1 = {0, 1};
    static const struct ListNode node2 = {&node1, 2};
    static const struct ListNode node3 = {&node2, 3};
    int test() {
      int sum = 0;
      for (const struct ListNode *n = &node3; n != 0; n = n->next)
        sum += n->i;
      return sum;
    }

llvm-svn: 142790
2011-10-24 06:57:05 +00:00
Nick Lewycky
4d47e224d7 A dead malloc, a free(NULL) and a free(undef) are all trivially dead
instructions.

This doesn't introduce any optimizations we weren't doing before (except
potentially due to pass ordering issues), now passes will eliminate them sooner
as part of their own cleanups.

llvm-svn: 142787
2011-10-24 04:35:36 +00:00
Nick Lewycky
d72de74587 Speculatively revert r142781. Bots are showing
Assertion `i_nocapture < OperandTraits<PHINode>::operands(this) && "getOperand() out of range!"' failed.
coming out of indvars.

llvm-svn: 142786
2011-10-24 04:00:25 +00:00
Nick Lewycky
5ab7948d71 Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the
loop header when computing the trip count.

With this, we now constant evaluate:
  struct ListNode { const struct ListNode *next; int i; };
  static const struct ListNode node1 = {0, 1};
  static const struct ListNode node2 = {&node1, 2};
  static const struct ListNode node3 = {&node2, 3};
  int test() {
    int sum = 0;
    for (const struct ListNode *n = &node3; n != 0; n = n->next)
      sum += n->i;
    return sum;
  }

llvm-svn: 142781
2011-10-23 23:43:14 +00:00
Craig Topper
3cb62dca0f Add X86 SARX, SHRX, and SHLX instructions.
llvm-svn: 142779
2011-10-23 22:18:24 +00:00
Chandler Carruth
151d4fc273 Teach the BranchProbabilityInfo pass to print its results, and use that
to bring it under direct test instead of merely indirectly testing it in
the BlockFrequencyInfo pass.

The next step is to start adding tests for the various heuristics
employed, and to start fixing those heuristics once they're under test.

llvm-svn: 142778
2011-10-23 21:21:50 +00:00
Chandler Carruth
68ba25c47d Completely re-write the algorithm behind MachineBlockPlacement based on
discussions with Andy. Fundamentally, the previous algorithm is both
counter productive on several fronts and prioritizing things which
aren't necessarily the most important: static branch prediction.

The new algorithm uses the existing loop CFG structure information to
walk through the CFG itself to layout blocks. It coalesces adjacent
blocks within the loop where the CFG allows based on the most likely
path taken. Finally, it topologically orders the block chains that have
been formed. This allows it to choose a (mostly) topologically valid
ordering which still priorizes fallthrough within the structural
constraints.

As a final twist in the algorithm, it does violate the CFG when it
discovers a "hot" edge, that is an edge that is more than 4x hotter than
the competing edges in the CFG. These are forcibly merged into
a fallthrough chain.

Future transformations that need te be added are rotation of loop exit
conditions to be fallthrough, and better isolation of cold block chains.
I'm also planning on adding statistics to model how well the algorithm
does at laying out blocks based on the probabilities it receives.

The old tests mostly still pass, and I have some new tests to add, but
the nested loops are still behaving very strangely. This almost seems
like working-as-intended as it rotated the exit branch to be
fallthrough, but I'm not convinced this is actually the best layout. It
is well supported by the probabilities for loops we currently get, but
those are pretty broken for nested loops, so this may change later.

llvm-svn: 142743
2011-10-23 09:18:45 +00:00
Craig Topper
0e63b4485c Add X86 RORX instruction
llvm-svn: 142741
2011-10-23 07:34:00 +00:00
Cameron Zwarich
2dd06afcf5 The element insertion code in scalar replacement doesn't handle incorrect
element types, even though the element extraction code does. It is surprising
that this bug has been here for so long. Fixes <rdar://problem/10318778>.

llvm-svn: 142740
2011-10-23 07:02:10 +00:00
Craig Topper
7019cf1b80 Add X86 MULX instruction for disassembler.
llvm-svn: 142738
2011-10-23 00:33:32 +00:00
Nick Lewycky
1d759dcde7 Oops! Fix test I forgot to submit as part of r142735.
llvm-svn: 142736
2011-10-22 22:07:31 +00:00
Nick Lewycky
25e5f6896b A non-escaping malloc in the entry block is not unlike an alloca. Do dead-store
elimination on them too.

llvm-svn: 142735
2011-10-22 21:59:35 +00:00
Nick Lewycky
ce8bfeadff Make SCEV's brute force analysis stronger in two ways. Firstly, we should be
able to constant fold load instructions where the argument is a constant.
Second, we should be able to watch multiple PHI nodes through the loop; this
patch only supports PHIs in loop headers, more can be done here.

With this patch, we now constant evaluate:
  static const int arr[] = {1, 2, 3, 4, 5};
  int test() {
    int sum = 0;
    for (int i = 0; i < 5; ++i) sum += arr[i];
    return sum;
  }

llvm-svn: 142731
2011-10-22 19:58:20 +00:00
Nadav Rotem
7a79f94aad Fix pr11193.
SHL inserts zeros from the right, thus even when the original
sign_extend_inreg value was of 1-bit, we need to sra.

llvm-svn: 142724
2011-10-22 12:39:25 +00:00
Jim Grosbach
d964cf8939 Assembly parsing for 4-register sequential variant of VLD2.
llvm-svn: 142704
2011-10-21 23:58:57 +00:00
Jim Grosbach
a6e536367e Assembly parsing for 2-register sequential variant of VLD2.
llvm-svn: 142691
2011-10-21 22:21:10 +00:00
Eli Friedman
5012ac7cc0 Remap blockaddress correctly when inlining a function. Fixes PR10162.
llvm-svn: 142684
2011-10-21 20:45:19 +00:00
Jim Grosbach
68dfc88f95 Assembly parsing for 4-register variant of VLD1.
llvm-svn: 142682
2011-10-21 20:35:01 +00:00
Jim Grosbach
2c1ca90ac9 Assembly parsing for 3-register variant of VLD1.
llvm-svn: 142675
2011-10-21 20:02:19 +00:00
Eli Friedman
fb0b9216e1 Extend instcombine's shufflevector simplification to handle more cases where the input and output vectors have different sizes. Patch by Xiaoyi Guo.
llvm-svn: 142671
2011-10-21 19:06:29 +00:00
Jim Grosbach
6bb38d0e97 ARM VLD parsing and encoding.
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.

Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.

llvm-svn: 142670
2011-10-21 18:54:25 +00:00
Nadav Rotem
57f652cfe4 Fix pr11194. When promoting and splitting integers we need to use
ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize.

SetCC return type needs to be legalized via PromoteTargetBoolean.

llvm-svn: 142660
2011-10-21 17:35:19 +00:00
Chandler Carruth
2f20f63a01 Don't hard code the desired alignment for loops -- it isn't 16-bytes on
all x86 systems. Sorry for the breakage.

llvm-svn: 142656
2011-10-21 16:41:39 +00:00
Nadav Rotem
52d820c0dd 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.
2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1.

llvm-svn: 142648
2011-10-21 11:42:07 +00:00
Chandler Carruth
21c689d1ac Add loop aligning to MachineBlockPlacement based on review discussion so
it's a bit more plausible to use this instead of CodePlacementOpt. The
code for this was shamelessly stolen from CodePlacementOpt, and then
trimmed down a bit. There doesn't seem to be much utility in returning
true/false from this pass as we may or may not have rewritten all of the
blocks. Also, the statistic of counting how many loops were aligned
doesn't seem terribly important so I removed it. If folks would like it
to be included, I'm happy to add it back.

This was probably the most egregious of the missing features, and now
I'm going to start gathering some performance numbers and looking at
specific loop structures that have different layout between the two.

Test is updated to include both basic loop alignment and nested loop
alignment.

llvm-svn: 142645
2011-10-21 08:57:37 +00:00
Chandler Carruth
f352d2d7e3 Add a very basic test for MachineBlockPlacement. This is essentially the
canonical example I used when developing it, and is one of the primary
motivating real-world use cases for __builtin_expect (when burried under
a macro).

I'm working on more test cases here, but I'm trying to make sure both
that the pass is doing the right thing with the test cases and that they
aren't too brittle to changes elsewhere in the code generation pipeline.

Feedback and/or suggestions on how to test this are very welcome.
Especially feedback on whether testing the block comments is a good
strategy; I couldn't find any good examples to steal from but all the
other ideas I had were a lot uglier or more fragile.

llvm-svn: 142644
2011-10-21 08:01:56 +00:00
Craig Topper
fd96157f13 Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with custom isel lowering code.
llvm-svn: 142642
2011-10-21 06:55:01 +00:00
Owen Anderson
2021ad2133 Revert r142618, r142622, and r142624, which were based on an incorrect reading of the ARMv7 docs.
llvm-svn: 142626
2011-10-20 22:23:58 +00:00
Owen Anderson
8067075218 Fix decoding tests for fixed MSR encodings.
llvm-svn: 142624
2011-10-20 22:01:48 +00:00
Owen Anderson
ffca195c01 Fix tests for corrected MSR encodings.
llvm-svn: 142622
2011-10-20 21:53:19 +00:00
Jim Grosbach
e9d1df8266 ARM VLD1/VST1 (one register, no writeback) assembly parsing and encoding.
llvm-svn: 142583
2011-10-20 15:04:25 +00:00
Jim Grosbach
954465d59a Tidy up formatting.
llvm-svn: 142582
2011-10-20 14:57:47 +00:00
Jim Grosbach
972f26d936 ARM VTBX (one register) assembly parsing and encoding.
llvm-svn: 142581
2011-10-20 14:48:50 +00:00
Eli Friedman
e8f8cf1f33 Refactor code from inlining and globalopt that checks whether a function definition is unused, and enhance it so it can tell that functions which are only used by a blockaddress are in fact dead. This probably doesn't happen much on most code, but the Linux kernel's _THIS_IP_ can trigger this issue with blockaddress. (GlobalDCE can also handle the given tescase, but we only run that at -O3.) Found while looking at PR11180.
llvm-svn: 142572
2011-10-20 05:23:42 +00:00
Nick Lewycky
21a67a1454 "@string = constant i8 0" is a value i8* string of length zero. Analyze that
correctly in GetStringLength, fixing PR11181!

llvm-svn: 142558
2011-10-20 00:34:35 +00:00
Chad Rosier
38661ab3ce Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :(
llvm-svn: 142557
2011-10-20 00:07:12 +00:00
Evan Cheng
057c12c2a0 Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10291355
llvm-svn: 142550
2011-10-19 22:22:54 +00:00
Nadav Rotem
df65a641dd Improve code generation for vselect on SSE2:
When checking the availability of instructions using the TLI, a 'promoted'
instruction IS available. It means that the value is bitcasted to another type
for which there is an operation. The correct check for the availablity of an
instruction is to check if it should be expanded.

llvm-svn: 142542
2011-10-19 20:43:16 +00:00
Rafael Espindola
01d11bcdf0 Fix parsing of a line with only a # in it.
llvm-svn: 142537
2011-10-19 18:48:52 +00:00
James Molloy
73a2a8a45e Use literal pool loads instead of MOVW/MOVT for materializing global addresses when optimizing for size.
On spec/gcc, this caused a codesize improvement of ~1.9% for ARM mode and ~4.9% for Thumb(2) mode. This is
codesize including literal pools.

The pools themselves doubled in size for ARM mode and quintupled for Thumb mode, leaving suggestion that there
is still perhaps redundancy in LLVM's use of constant pools that could be decreased by sharing entries.

Fixes PR11087.

llvm-svn: 142530
2011-10-19 14:11:07 +00:00
David Greene
a34ca4c4ab Add Paste Test
This tests TableGen's paste functionality.

llvm-svn: 142526
2011-10-19 13:04:50 +00:00
David Greene
09fc0034ab Add NAME Member
Add a Value named "NAME" to each Record.  This will be set to the def or defm
name when instantiating multiclasses.  This will replace the #NAME# processing
hack once paste functionality is in place.

llvm-svn: 142518
2011-10-19 13:04:13 +00:00
Chandler Carruth
12a645d6f6 Generalize the reading of probability metadata to work for both branches
and switches, with arbitrary numbers of successors. Still optimized for
the common case of 2 successors for a conditional branch.

Add a test case for switch metadata showing up in the BlockFrequencyInfo pass.

llvm-svn: 142493
2011-10-19 10:32:19 +00:00
Chandler Carruth
18a382b4b6 Teach the BranchProbabilityInfo analysis pass to read any metadata
encoding of probabilities. In the absense of metadata, it continues to
fall back on static heuristics.

This allows __builtin_expect, after lowering through llvm.expect
a branch instruction's metadata, to actually enter the branch
probability model. This is one component of resolving PR2577.

llvm-svn: 142492
2011-10-19 10:30:30 +00:00
Chandler Carruth
13b475d4f6 Add pass printing support to BlockFrequencyInfo pass. The implementation
layer already had support for printing the results of this analysis, but
the wiring was missing.

Now that printing the analysis works, actually bring some of this
analysis, and the BranchProbabilityInfo analysis that it wraps, under
test! I'm planning on fixing some bugs and doing other work here, so
having a nice place to add regression tests and a way to observe the
results is really useful.

llvm-svn: 142491
2011-10-19 10:12:41 +00:00
Nadav Rotem
05587f317b Add support for the vector-widening of vselect and vector-setcc
llvm-svn: 142488
2011-10-19 09:45:11 +00:00
Craig Topper
b1fa647871 Rename PEXTR to PEXT. Add intrinsics for BMI instructions.
llvm-svn: 142480
2011-10-19 07:48:35 +00:00
Lang Hames
03f36ab3f6 Added testcase for <rdar://problem/10215997>
llvm-svn: 142462
2011-10-18 23:50:52 +00:00
Nadav Rotem
f9d8f801d9 Add additional element-promotion tests.
llvm-svn: 142442
2011-10-18 23:05:33 +00:00
Nadav Rotem
e435b9e2fd Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Index starts with zero.
llvm-svn: 142434
2011-10-18 22:32:43 +00:00
Jim Grosbach
6110df7008 Tidy up formatting.
llvm-svn: 142422
2011-10-18 21:09:01 +00:00
Jim Grosbach
de82cec744 Tidy up formatting.
llvm-svn: 142421
2011-10-18 21:08:16 +00:00
Jim Grosbach
f0d2d6bfc1 Enable more encoded immediate tests.
llvm-svn: 142415
2011-10-18 20:20:51 +00:00
Jim Grosbach
8c1298946c More vmov lane testcases.
llvm-svn: 142414
2011-10-18 20:19:48 +00:00