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771cdf9b5d
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14316 Commits

Author SHA1 Message Date
Evan Cheng
771cdf9b5d - Added MCSubtargetInfo to capture subtarget features and scheduling 
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.

llvm-svn: 134257
 2011-07-01 20:45:01 +00:00
Evan Cheng
157d40fba1 Hide the call to InitMCInstrInfo into tblgen generated ctor. 
llvm-svn: 134244
 2011-07-01 17:57:27 +00:00
Rafael Espindola
018ca8fea8 Fix use after free. 
llvm-svn: 134234
 2011-07-01 04:40:50 +00:00
Evan Cheng
1fa6460e3f Switch SubtargetFeatures from std::string to StringRef. 
llvm-svn: 134219
 2011-07-01 00:23:10 +00:00
Bill Wendling
28c3cfe015 Add target a target hook to get the register number used by the compact unwind 
encoding for the registers it knows about. Return -1 if it can't handle that
register.

llvm-svn: 134202
 2011-06-30 23:20:32 +00:00
Rafael Espindola
83789b3b8d Create a isFullCopy predicate. 
llvm-svn: 134189
 2011-06-30 21:15:52 +00:00
Rafael Espindola
03cd7c7b76 Add r134057 back, but splice the predecessor after the successors phi 
nodes.

Original message:
Let simplify cfg simplify bb with only debug and lifetime intrinsics.

llvm-svn: 134182
 2011-06-30 20:14:24 +00:00
Evan Cheng
034261674b Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to 
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!

llvm-svn: 134127
 2011-06-30 01:53:36 +00:00
Eric Christopher
40578e7885 Remove getRegClassForInlineAsmConstraint and all dependencies. 
Fixes rdar://9643582

llvm-svn: 134123
 2011-06-30 01:20:03 +00:00
Devang Patel
66c4bc1dda Revert r133953 for now. 
llvm-svn: 134116
 2011-06-29 23:50:13 +00:00
Andrew Trick
d755da03ed Added IRBuilder::SetInsertPoint(Use) to find a valid insertion point 
that dominates the given Use.

llvm-svn: 134111
 2011-06-29 23:01:52 +00:00
Andrew Trick
ffcd0f2f4b whitespace 
llvm-svn: 134110
 2011-06-29 22:52:51 +00:00
Evan Cheng
f496d1a4b2 Indentation 
llvm-svn: 134100
 2011-06-29 21:58:37 +00:00
Chad Rosier
fc7dc596a4 Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and 
lifetime intrinsics" due to buildbot failures.

llvm-svn: 134071
 2011-06-29 16:22:11 +00:00
Rafael Espindola
e9e560eb37 Let simplify cfg simplify bb with only debug and lifetime intrinsics. 
llvm-svn: 134057
 2011-06-29 05:25:47 +00:00
Evan Cheng
b4dc8bdd22 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC. 
llvm-svn: 134049
 2011-06-29 01:14:12 +00:00
Evan Cheng
baefa5a6ee Trim include 
llvm-svn: 134048
 2011-06-29 00:35:31 +00:00
Evan Cheng
40c31162b8 Unbreak every backend. 
llvm-svn: 134031
 2011-06-28 21:33:11 +00:00
Evan Cheng
65e7766262 Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. 
llvm-svn: 134030
 2011-06-28 21:14:33 +00:00
Evan Cheng
61530114d5 Add MCInstrInfo registeration machinery. 
llvm-svn: 134026
 2011-06-28 20:29:03 +00:00
Evan Cheng
a115f77785 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc 
llvm-svn: 134024
 2011-06-28 20:07:07 +00:00
Evan Cheng
4a169be530 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
 2011-06-28 19:10:37 +00:00
Jay Foad
fa97b8b8fa PR10210: New method ConstantArray::getAsCString(). Use it in LTO to 
avoid getting embedded trailing null bytes in std::strings.

llvm-svn: 133999
 2011-06-28 08:24:19 +00:00
Andrew Trick
9be3481cbd Cleanup. Fix a stupid variable name. 
llvm-svn: 133996
 2011-06-28 05:44:06 +00:00
Andrew Trick
4ac5dd5154 SCEVExpander: give new insts a name that identifies the reponsible pass. 
llvm-svn: 133992
 2011-06-28 05:07:32 +00:00
Evan Cheng
f79231cbd4 Remove RegClass2VRegMap from MachineRegisterInfo. 
llvm-svn: 133967
 2011-06-27 23:54:40 +00:00
Evan Cheng
b2fc68c7bc Remove RCBarriers from TargetInstrDesc. 
llvm-svn: 133964
 2011-06-27 23:47:21 +00:00
Evan Cheng
7df851a4ff Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges. 
llvm-svn: 133962
 2011-06-27 23:40:45 +00:00
Devang Patel
8fbd4b55ea During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
llvm-svn: 133953
 2011-06-27 22:32:04 +00:00
Evan Cheng
2c06c8b3c2 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. 
llvm-svn: 133944
 2011-06-27 21:26:13 +00:00
Owen Anderson
c1dcf312d1 Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. 
Patch by Jim Grosbach.

llvm-svn: 133940
 2011-06-27 21:06:21 +00:00
Evan Cheng
e2b9caad06 Rename unnecessary forward declaration. 
llvm-svn: 133928
 2011-06-27 19:41:39 +00:00
Nick Lewycky
4a0f5218f2 Move onlyUsedByLifetimeMarkers to ValueTracking so that it can be used by other 
passes as well.

llvm-svn: 133904
 2011-06-27 04:20:45 +00:00
Jakob Stoklund Olesen
557793fb60 Distinguish early clobber output operands from clobbered registers. 
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.

The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.

This will pop a register off the stack:

  asm("fstp %st" : : "t"(x) : "st");

While this will pop the input and push an output:

  asm("fst %st" : "=&t"(r) : "t"(x));

We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.

llvm-svn: 133902
 2011-06-27 04:08:33 +00:00
Rafael Espindola
45a2fa5664 There is only one register coalescer. Merge it into the base class and 
remove the analysis group.

llvm-svn: 133899
 2011-06-26 22:34:10 +00:00
Rafael Espindola
7ad658a832 Move RegisterCoalescer.h to lib/CodeGen. 
llvm-svn: 133895
 2011-06-26 21:41:06 +00:00
Michael J. Spencer
83e956656a Object: Add proper error handling. 
llvm-svn: 133872
 2011-06-25 17:55:23 +00:00
Michael J. Spencer
d5934fefee Make Binary the parent of ObjectFile and update children to new interface. 
llvm-svn: 133870
 2011-06-25 17:54:50 +00:00
Michael J. Spencer
8cb6d93f56 Add Binary class. This is a cleaner parent than ObjectFile. 
llvm-svn: 133869
 2011-06-25 17:54:29 +00:00
Michael J. Spencer
435e1ee994 Add Object/Error. 
llvm-svn: 133868
 2011-06-25 17:42:56 +00:00
Nick Lewycky
3e7058c303 Enhance the sanity check for block sizes; check that the resulting pointer is 
pointing to the range [first character, last character] instead of just not
after the last character. Patch by Yan Ivnitskiy!

llvm-svn: 133867
 2011-06-25 17:08:50 +00:00
Evan Cheng
43acb2c7a9 Rename TargetRegisterDesc to MCRegisterDesc 
llvm-svn: 133845
 2011-06-24 23:44:48 +00:00
Jim Grosbach
440526a1e8 Refactor MachO relocation generaration into the Target directories. 
Move the target-specific RecordRelocation logic out of the generic MC
MachObjectWriter and into the target-specific object writers. This allows
nuking quite a bit of target knowledge from the supposedly target-independent
bits in lib/MC.

llvm-svn: 133844
 2011-06-24 23:44:37 +00:00
Devang Patel
10271bcdad Fix struct member's scope. Patch by Xi Wang. 
llvm-svn: 133828
 2011-06-24 22:00:39 +00:00
Devang Patel
91fee59b74 Handle debug info for i128 constants. 
llvm-svn: 133821
 2011-06-24 20:46:11 +00:00
Evan Cheng
391461842d - Add MCRegisterInfo registration machinery. Also added x86 registration routines. 
- Rename TargetRegisterDesc to MCRegisterDesc.

llvm-svn: 133820
 2011-06-24 20:42:09 +00:00
Evan Cheng
e0801b07e0 Starting to refactor Target to separate out code that's needed to fully describe 
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.

llvm-svn: 133782
 2011-06-24 01:44:41 +00:00
Jakub Staszak
4cd344d775 Calculate backedge probability correctly. 
llvm-svn: 133776
 2011-06-23 23:52:11 +00:00
Jakub Staszak
d28a800e6b Missing files for the BlockFrequency analysis added. 
llvm-svn: 133767
 2011-06-23 21:56:59 +00:00
Jakub Staszak
d74cc36bcb Introduce BlockFrequency analysis for BasicBlocks. 
llvm-svn: 133766
 2011-06-23 21:45:20 +00:00