1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-31 07:52:55 +01:00
Commit Graph

20587 Commits

Author SHA1 Message Date
Bill Schmidt
84204dd94d [PowerPC] More fast-isel chunks (returns and integer extends)
Incremental improvement to fast-isel for PPC64.  This allows us to
select on ret, sext, and zext.  Filling in sext/zext improves some of
the existing logic in handling compare-immediates that needed extends.

A simplified return convention for fast-isel is also added to the
PPC64 calling conventions.  All call/return processing for DAG
selection is handled with custom code, so there isn't an existing CC
to rely on here.  The include of PPCGenCallingConv.inc causes compiler
warnings due to the 32-bit calling conventions that are not used, so
the dummy function "usePPC32CCs()" is added here to silence those.

Test cases for the return and extend logic are added.

llvm-svn: 189266
2013-08-26 19:42:51 +00:00
Matt Arsenault
adea897e71 Forgot to add slp threshold to test
llvm-svn: 189248
2013-08-26 18:08:35 +00:00
Matt Arsenault
fe57252c78 Vectorize starting from insertelements building a vector
llvm-svn: 189233
2013-08-26 17:56:35 +00:00
Tom Stellard
f7fd8102dd SelectionDAG: Remove unnecessary uses of TargetLowering::getPointerTy()
If we have a binary operation like ISD:ADD, we can set the result type
equal to the result type of one of its operands rather than using
TargetLowering::getPointerTy().

Also, any use of DAG.getIntPtrConstant(C) as an operand for a binary
operation can be replaced with:
DAG.getConstant(C, OtherOperand.getValueType());

llvm-svn: 189227
2013-08-26 15:06:10 +00:00
Tom Stellard
471cae1398 R600: Add support for vector local memory loads
llvm-svn: 189226
2013-08-26 15:06:04 +00:00
Tom Stellard
951bdd0d80 R600: Add support for i8 and i16 local memory loads
llvm-svn: 189225
2013-08-26 15:05:59 +00:00
Tom Stellard
dec9289d7b SelectionDAG: Use correct pointer size when splitting vector stores
llvm-svn: 189224
2013-08-26 15:05:55 +00:00
Tom Stellard
38c07cc5d7 R600: Add support for i8 and i16 local memory stores
llvm-svn: 189223
2013-08-26 15:05:49 +00:00
Tom Stellard
743d74f1b3 R600: Add support for v4i32 and v2i32 local stores
llvm-svn: 189222
2013-08-26 15:05:44 +00:00
Tom Stellard
1287fd01c3 SelectionDAG: Use correct pointer size when lowering function arguments v2
This adds minimal support to the SelectionDAG for handling address spaces
with different pointer sizes.  The SelectionDAG should now correctly
lower pointer function arguments to the correct size as well as generate
the correct code when lowering getelementptr.

This patch also updates the R600 DataLayout to use 32-bit pointers for
the local address space.

v2:
  - Add more helper functions to TargetLoweringBase
  - Use CHECK-LABEL for tests

llvm-svn: 189221
2013-08-26 15:05:36 +00:00
Elena Demikhovsky
4333460954 AVX-512: Added shuffle instructions -
VPSHUFD, VPERMILPS, VMOVDDUP, VMOVLHPS, VMOVHLPS, VSHUFPS, VALIGN
 single and double forms.

llvm-svn: 189215
2013-08-26 12:45:35 +00:00
Vladimir Medic
78876a9ef9 This patch implements trap instructions for mips. The test cases are added.
llvm-svn: 189213
2013-08-26 10:02:40 +00:00
Bill Schmidt
c010bfbf75 [PowerPC] Add fast-isel branch and compare selection.
First chunk of actual fast-isel selection code.  This handles direct
and indirect branches, as well as feeding compares for direct
branches.  PPCFastISel::PPCEmitIntExt() is just roughed in and will be
expanded in a future patch.  This also corrects a problem with
selection for constant pool entries in JIT mode or with small code
model.

llvm-svn: 189202
2013-08-25 22:33:42 +00:00
Craig Topper
3f15756092 First round of fixes for the x86 fixes for the x86 move accumulator from/to memory offset instructions.
-Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted.
-x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size.
-Intel syntax printing prints the ptr size and places brackets around the address immediate.

Known remaining issues with these instructions:
-Segment override prefix is not supported. PR16962 and PR16961.
-Immediate size should be changed by address size prefix.

llvm-svn: 189201
2013-08-25 22:23:38 +00:00
Venkatraman Govindaraju
a3fc2b00cc [Sparc] Add long double (f128) instructions to sparc backend.
llvm-svn: 189198
2013-08-25 18:30:06 +00:00
Venkatraman Govindaraju
1d08468931 [Sparc] Added V9's extra floating point registers and their aliases.
llvm-svn: 189195
2013-08-25 17:03:02 +00:00
Elena Demikhovsky
15c3ef8486 AVX-512: added UNPACK instructions and tests for all-zero/all-ones vectors
llvm-svn: 189189
2013-08-25 12:54:30 +00:00
Reed Kotler
8738736cec Start to add the LLVM builtins to the mips16 exclusion lists for fp.
I need to add the rest of these to the list or else to delay putting
out the actual stub until later in code generation when I know if
the external function ever got emitted

Resubmit this patch. The target triple needs to be added to the test so that 
clang does not tell the backend the wrong target when the host is BSD. There
is a clang bug in here somewhere that I need to track down. At Mips this
has been filed internally as a bug.

llvm-svn: 189186
2013-08-25 02:40:25 +00:00
Shuxin Yang
e1653d8592 Revert 189161
llvm-svn: 189176
2013-08-24 17:53:16 +00:00
Reed Kotler
42e1d3fb15 Start to add the builtind to the mips16 exclusion lists for fp.
I need to add the rest of these to the list or else to delay putting
out the actual stub until later in code generation when I know if
the external function ever got emitted.

llvm-svn: 189161
2013-08-24 01:24:44 +00:00
Justin Holewinski
f9ed859e28 [NVPTX] Re-enable assembly printing support for inline assembly
This support was removed by accident during the MC conversion

llvm-svn: 189160
2013-08-24 01:17:23 +00:00
Rafael Espindola
8648d2d87d Update test to use rdrnd instead of rdrand.
llvm-svn: 189146
2013-08-23 20:49:02 +00:00
Rafael Espindola
dd918e13f0 Update tests to use sse4.2 instead of sse42.
llvm-svn: 189145
2013-08-23 20:46:35 +00:00
Rafael Espindola
b9807cdcf1 Replace more uses of sse41 with sse4.1.
llc using the host cpu features and *waning* on unknown features is probably
not a good thing :-(

llvm-svn: 189144
2013-08-23 20:39:19 +00:00
Rafael Espindola
e8f25b8c77 Update a test that I missed in the previous commit.
llvm-svn: 189143
2013-08-23 20:27:02 +00:00
Rafael Espindola
112bdc8929 Rename features to match what gcc and clang use.
There is no advantage in being different and using the same names simplifies
clang a bit.

llvm-svn: 189141
2013-08-23 20:21:34 +00:00
Peter Collingbourne
a2ec50d21b DataFlowSanitizer: correctly combine labels in the case where they are equal.
llvm-svn: 189133
2013-08-23 18:45:06 +00:00
Joey Gouly
25375f9ffb [ARM] Fix another ARM FastISel -verify-machineinstrs issue.
llvm-svn: 189109
2013-08-23 15:20:56 +00:00
Evgeniy Stepanov
47f9a57504 [msan] Fix handling of va_arg overflow area on x86_64.
The code was erroneously reading overflow area shadow from the TLS slot,
bypassing the local copy. Reading shadow directly from TLS is wrong, because
it can be overwritten by a nested vararg call, if that happens before va_start.

llvm-svn: 189104
2013-08-23 12:11:00 +00:00
Joey Gouly
9ebd1c7d68 [ARMv8] Add CodeGen for VMAXNM/VMINNM.
llvm-svn: 189103
2013-08-23 12:01:13 +00:00
Andrea Di Biagio
b486212f5a Add function attribute 'optnone'.
This function attribute indicates that the function is not optimized
by any optimization or code generator passes with the 
exception of interprocedural optimization passes.

llvm-svn: 189101
2013-08-23 11:53:55 +00:00
Richard Sandiford
9867b44c59 [SystemZ] Add basic prefetch support
Just the instructions and intrinsics for now.

llvm-svn: 189100
2013-08-23 11:36:42 +00:00
Richard Sandiford
152d2f09a8 [SystemZ] Try reversing comparisons whose first operand is in memory
This allows us to make more use of the many compare reg,mem instructions.

llvm-svn: 189099
2013-08-23 11:27:19 +00:00
Richard Sandiford
de9eba2208 [SystemZ] Prefer LHI;ST... over LAY;MV...
If we had a store of an integer to memory, and the integer and store size
were suitable for a form of MV..., we used MV... no matter what.  We could
then have sequences like:

    lay %r2, 0(%r3,%r4)
    mvi 0(%r2), 4

In these cases it seems better to force the constant into a register
and use a normal store:

    lhi %r2, 4
    stc %r2, 0(%r3, %r4)

since %r2 is more likely to be hoisted and is easier to rematerialize.

llvm-svn: 189098
2013-08-23 11:18:53 +00:00
Richard Sandiford
b195d89bde Turn MipsOptimizeMathLibCalls into a target-independent scalar transform
...so that it can be used for z too.  Most of the code is the same.
The only real change is to use TargetTransformInfo to test when a sqrt
instruction is available.

The pass is opt-in because at the moment it only handles sqrt.

llvm-svn: 189097
2013-08-23 10:27:02 +00:00
Tim Northover
7c24b95efe ARM: make sure ARM-mode pseudo-inst requires IsARM
I'd forgotten that "Requires" blocks override rather than add to the
constraints, so my pseudo-instruction was being selected in Thumb mode leading
to nonsense instructions.

rdar://problem/14817358

llvm-svn: 189096
2013-08-23 10:16:39 +00:00
Daniel Dunbar
e151ccad38 [PR11606] ocaml bindings tests produce binaries in source dir
- Workaround for ocamlopt producing outputs adjacent to its source inputs, by
   having the tests copy the inputs into temporary directories in the output
   paths before building.

 - Patch by edward-san.

llvm-svn: 189081
2013-08-23 00:55:32 +00:00
Michael Gottesman
5f6dfacead Filecheckize some tests.
llvm-svn: 189079
2013-08-23 00:23:28 +00:00
Michael Gottesman
0f9b142f60 Update StripDeadDebugInfo to use DebugInfoFinder so that it is no longer stale to the point of not working and more resilient to debug info changes.
The current version of StripDeadDebugInfo became stale and no longer actually
worked since it was expecting an older version of debug info.

This patch updates it to use DebugInfoFinder and the modern DebugInfo classes as
much as possible to make it more redundent to such changes. Additionally, the
only place where that was avoided (the code where we replace the old sets with
the new), I call verify on the DIContextUnit implying that if the format changes
and my live set changes no longer make sense an assert will be hit. In order to
ensure that that occurs I have included a test case.

The actual stripping of the dead debug info follows the same strategy as was
used before in this class: find the live set and replace the old set in the
given compile unit (which may contain dead global variables/functions) with the
new live one.

llvm-svn: 189078
2013-08-23 00:23:24 +00:00
Michael Gottesman
cb2cf901dc [stack protector] Work around an issue with the BMOVPCB_CALL instruction on ARM by disabling does not return on __stack_chk_fail.
This is to fix the bots while I look to see if there is something I can do here.

rdar://14811848

llvm-svn: 189076
2013-08-22 23:45:24 +00:00
Bill Wendling
fa2b06a7e7 Update to remove the no-frame-pointer-elim-non-leaf flag if it was set to 'false'.
llvm-svn: 189068
2013-08-22 21:28:54 +00:00
Bill Wendling
77e4bfaf0d Fix some tests. The 'false' version just omits the attribute altogether.
llvm-svn: 189065
2013-08-22 21:20:14 +00:00
Bill Wendling
4910234c0f FileCheckize some tests.
llvm-svn: 189060
2013-08-22 20:46:05 +00:00
Tom Stellard
d70d216860 R600/SI: Fix another case of illegal VGPR to SGPR copy
This fixes a crash in Unigine Tropics.

https://bugs.freedesktop.org/show_bug.cgi?id=68389

llvm-svn: 189057
2013-08-22 20:21:02 +00:00
Peter Collingbourne
1e7de1b7af DataFlowSanitizer: Replace non-instrumented aliases of instrumented functions, and vice versa, with wrappers.
Differential Revision: http://llvm-reviews.chandlerc.com/D1442

llvm-svn: 189054
2013-08-22 20:08:15 +00:00
Peter Collingbourne
ac1c1c4377 DataFlowSanitizer: Prefix the name of each instrumented function with "dfs$".
DFSan changes the ABI of each function in the module.  This makes it possible
for a function with the native ABI to be called with the instrumented ABI,
or vice versa, thus possibly invoking undefined behavior.  A simple way
of statically detecting instances of this problem is to prepend the prefix
"dfs$" to the name of each instrumented-ABI function.

This will not catch every such problem; in particular function pointers passed
across the instrumented-native barrier cannot be used on the other side.
These problems could potentially be caught dynamically.

Differential Revision: http://llvm-reviews.chandlerc.com/D1373

llvm-svn: 189052
2013-08-22 20:08:08 +00:00
Manman Ren
b66c695f15 [Debug Info Tests] Update testing cases.
A single metadata will not span multiple lines. This also helps me with
my script to automatic update the testing cases.
A debug info testing case should have a llvm.dbg.cu.
Do not use hard-coded id for debug nodes.

llvm-svn: 189033
2013-08-22 17:11:18 +00:00
Joey Gouly
355a09f268 [ARMv8] Add CodeGen support for VSEL.
This uses the ARMcmov pattern that Tim cleaned up in r188995.

Thanks to Simon Tatham for his floating point help!

llvm-svn: 189024
2013-08-22 15:29:11 +00:00
Mihai Popa
dfdccf5f00 Fix ARM vcvt encoding when the number of fractional bits is zero.
The instruction to convert between floating point and fixed point representations
takes an immediate operand for the number of fractional bits of the fixed point
value. ARMARM specifies that when that number of bits is zero, the assembler
should encode floating point/integer conversion instructions. 

This patch adds the necessary instruction aliases to achieve this behaviour.

llvm-svn: 189009
2013-08-22 13:16:07 +00:00
Chandler Carruth
e6b6740e73 Teach the SLP vectorizer the correct way to check for consecutive access
using GEPs. Previously, it used a number of different heuristics for
analyzing the GEPs. Several of these were conservatively correct, but
failed to fall back to SCEV even when SCEV might have given a reasonable
answer. One was simply incorrect in how it was formulated.

There was good code already to recursively evaluate the constant offsets
in GEPs, look through pointer casts, etc. I gathered this into a form
code like the SLP code can use in a previous commit, which allows all of
this code to become quite simple.

There is some performance (compile time) concern here at first glance as
we're directly attempting to walk both pointers constant GEP chains.
However, a couple of thoughts:

1) The very common cases where there is a dynamic pointer, and a second
   pointer at a constant offset (usually a stride) from it, this code
   will actually not do any unnecessary work.

2) InstCombine and other passes work very hard to collapse constant
   GEPs, so it will be rare that we iterate here for a long time.

That said, if there remain performance problems here, there are some
obvious things that can improve the situation immensely. Doing
a vectorizer-pass-wide memoizer for each individual layer of pointer
values, their base values, and the constant offset is likely to be able
to completely remove redundant work and strictly limit the scaling of
the work to scrape these GEPs. Since this optimization was not done on
the prior version (which would still benefit from it), I've not done it
here. But if folks have benchmarks that slow down it should be straight
forward for them to add.

I've added a test case, but I'm not really confident of the amount of
testing done for different access patterns, strides, and pointer
manipulation.

llvm-svn: 189007
2013-08-22 12:45:17 +00:00