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Commit Graph

180095 Commits

Author SHA1 Message Date
Xing GUO
848f59e047 [DOC] Fix load instructions' syntax, function definition.
Summary: In this patch, I updated `load` instruction syntax and fixed function definition. Besides, I re-named some variables to make them obey SSA rule.

Reviewers: MaskRay

Reviewed By: MaskRay

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63186

llvm-svn: 363142
2019-06-12 11:24:22 +00:00
Simon Pilgrim
19f2a39cd4 [XCore] CombineSTORE - Use allowsMemoryAccess wrapper. NFCI.
Noticed in D63075 - there was a allowsMisalignedMemoryAccesses call to check for unaligned loads and a check for aligned legal type loads - which is exactly what allowsMemoryAccess does.

llvm-svn: 363141
2019-06-12 11:08:29 +00:00
Ben Dunbobbin
33ef399ccf [ThinLTO]LTO]Legacy] Fix dependent libraries support by adding querying of the IRSymtab
Dependent libraries support for the legacy api was committed in a
broken state (see: https://reviews.llvm.org/D60274). This was missed
due to the painful nature of having to integrate the changes into a
linker in order to test. This change implements support for dependent
libraries in the legacy LTO api:

- I have removed the current api function, which returns a single
string, and   added functions to access each dependent library
specifier individually.

- To reduce the testing pain, I have made the api functions as thin as
possible to   maximize coverage from llvm-lto.

- When doing ThinLTO the system linker will load the modules lazily
when scanning   the input files. Unfortunately, when modules are
lazily loaded there is no access   to module level named metadata. To
fix this I have added api functions that allow   querying the IRSymtab
for the dependent libraries. I hope to expand the api in the   future
so that, eventually, all the information needed by a client linker
during   scan can be retrieved from the IRSymtab.

Differential Revision: https://reviews.llvm.org/D62935

llvm-svn: 363140
2019-06-12 11:07:56 +00:00
James Henderson
9d4306679a [docs] Fix typo
llvm-svn: 363138
2019-06-12 10:48:33 +00:00
Simon Pilgrim
005170f5cd [XCore] LowerLOAD/LowerSTORE - Use allowsMemoryAccess wrapper. NFCI.
Noticed in D63075 - there was a allowsMisalignedMemoryAccesses call to check for unaligned loads and a check for aligned legal type loads - which is exactly what allowsMemoryAccess does.

llvm-svn: 363137
2019-06-12 10:46:50 +00:00
James Henderson
339634cc14 [llvm-nm] Fix docs and help text for --print-size
The --print-size help text and documentation claimed that the size was
printed instead of the address, but this is incorrect. It is printed as
well as the address. This patch fixes this issue.

Reviewed by: MaskRay, mtrent, ruiu

Differential Revision: https://reviews.llvm.org/D63142

llvm-svn: 363136
2019-06-12 10:44:41 +00:00
Orlando Cazalet-Hyams
36848c0d04 Revert "[DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop even after completion"
This reverts commit 1a0f7a2077b70c9864faa476e15b048686cf1ca7.
See phabricator thread for D60831.

llvm-svn: 363132
2019-06-12 08:34:51 +00:00
Dylan McKay
5892dcede7 [AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests
When these tests were originally written, the middle end would introduce
an unnecessary copy from r24:r23->GPR16->r24:r23, and these tests
mistakenly relied on it.

The most optimal codegen for the functions in the test cases before this patch
would be NOPs. This is because the first i16 argument always gets the same register
allocation as an i16 return value in the AVR calling convention.

These tests broke in r362963 when the codegen was improved and the
redundant copy was eliminated. After this, the test functions
were lowered to their optimal form - a 'ret' and nothing else.

This patch prepends an extra i16 operand to each of the test functions
so that a 16-bit copy must be inserted for the program to be correct.

llvm-svn: 363131
2019-06-12 08:31:07 +00:00
Sjoerd Meijer
8733a60c96 [AArch64] Merge globals when optimising for size
Extern global merging is good for code-size. There's definitely potential for
performance too, but there's one regression in a benchmark that needs
investigating, so that's why we enable it only when we optimise for size for
now.

Patch by Ramakota Reddy and Sjoerd Meijer.

Differential Revision: https://reviews.llvm.org/D61947

llvm-svn: 363130
2019-06-12 08:28:35 +00:00
Nikolai Kosjar
7dbf452627 gitignore: Ignore Qt Creator project configuration files. NFC
llvm-svn: 363129
2019-06-12 08:28:31 +00:00
Craig Topper
e4ce834ce9 [X86] Add VCMPSSZrr_Intk and VCMPSDZrr_Intk to isNonFoldablePartialRegisterLoad.
The non-masked versions are already in there. I'm having some
trouble coming up with a way to test this right now. Most load
folding should happen during isel so I'm not sure how to get
peephole pass to do it.

llvm-svn: 363125
2019-06-12 06:29:53 +00:00
Alex Bradbury
d474c37619 [RISCV] Fix inline-asm.ll test by adding nounwind attribute
This test failed since CFI directive support was added in r361320.

llvm-svn: 363123
2019-06-12 05:32:30 +00:00
Hsiangkai Wang
8937023816 [RISCV] Add CFI directives for RISCV prologue/epilog.
In order to generate correct debug frame information, it needs to
generate CFI information in prologue and epilog.

Differential Revision: https://reviews.llvm.org/D61773

llvm-svn: 363120
2019-06-12 03:04:22 +00:00
Hsiangkai Wang
8afec865a1 [NFC] Correct comments in RegisterCoalescer.
Differential Revision: https://reviews.llvm.org/D63124

llvm-svn: 363119
2019-06-12 02:58:04 +00:00
Kai Luo
79b2f06446 [PowerPC][NFC] Added test for sext/shl combination after isel.
llvm-svn: 363118
2019-06-12 02:45:27 +00:00
Cameron McInally
08e993ca7f [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll
X86/avx512vl-intrinsics-fast-isel.ll is only partially complete.

llvm-svn: 363114
2019-06-12 00:18:54 +00:00
Philip Reames
444a117ed7 Fix a bug in getSCEVAtScope w.r.t. non-canonical loops
The issue is that if we have a loop with multiple predecessors outside the loop, the code was expecting to merge them and only return if equal, but instead returned the first one seen.

I have no idea if this actually tripped anywhere.  I noticed it by accident when reading the code and have no idea how to go about constructing a test case.

llvm-svn: 363112
2019-06-11 23:21:24 +00:00
Philip Reames
931f560d47 Generalize icmp matching in IndVars' eliminateTrunc
We were only matching RHS being a loop invariant value, not the inverse. Since there's nothing which appears to canonicalize loop invariant values to RHS, this means we missed cases.

Differential Revision: https://reviews.llvm.org/D63112

llvm-svn: 363108
2019-06-11 22:43:25 +00:00
Sanjay Patel
9db50a3254 [Analysis] add isSplatValue() for vectors in IR
We have the related getSplatValue() already in IR (see code just above the proposed addition).
But sometimes we only need to know that the value is a splat rather than capture the splatted
scalar value. Also, we have an isSplatValue() function already in SDAG.

Motivation - recent bugs that would potentially benefit from improved splat analysis in IR:
https://bugs.llvm.org/show_bug.cgi?id=37428
https://bugs.llvm.org/show_bug.cgi?id=42174

Differential Revision: https://reviews.llvm.org/D63138

llvm-svn: 363106
2019-06-11 22:25:18 +00:00
Jinsong Ji
0ea02e1312 [PowerPC][NFC]Remove sms-simple.ll test temporarily.
Looks like a MachinePipeliner algorithm problem found by
sanitizer-x86_64-linux-fast.
I will backout this test first while investigating the problem to
unblock buildbot.

==49637==ERROR: AddressSanitizer: heap-buffer-overflow on address
0x614000002e08 at pc 0x000004364350 bp 0x7ffe228a3bd0 sp 0x7ffe228a3bc8
READ of size 4 at 0x614000002e08 thread T0
    #0 0x436434f in
llvm::SwingSchedulerDAG::checkValidNodeOrder(llvm::SmallVector<llvm::NodeSet,
8u> const&) const
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:3736:11
    #1 0x4342cd0 in llvm::SwingSchedulerDAG::schedule()
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:486:3
    #2 0x434042d in
llvm::MachinePipeliner::swingModuloScheduler(llvm::MachineLoop&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:385:7
    #3 0x433eb90 in
llvm::MachinePipeliner::runOnMachineFunction(llvm::MachineFunction&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:207:5
    #4 0x428b7ea in
llvm::MachineFunctionPass::runOnFunction(llvm::Function&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachineFunctionPass.cpp:73:13
    #5 0x4d1a913 in llvm::FPPassManager::runOnFunction(llvm::Function&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1648:27
    #6 0x4d1b192 in llvm::FPPassManager::runOnModule(llvm::Module&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1685:16
    #7 0x4d1c06d in runOnModule
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1752:27
    #8 0x4d1c06d in llvm::legacy::PassManagerImpl::run(llvm::Module&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1865
    #9 0xa48ca3 in compileModule(char**, llvm::LLVMContext&)
/b/sanitizer-x86_64-linux-fast/build/llvm/tools/llc/llc.cpp:611:8
    #10 0xa4270f in main
/b/sanitizer-x86_64-linux-fast/build/llvm/tools/llc/llc.cpp:365:22
    #11 0x7fec902572e0 in __libc_start_main
(/lib/x86_64-linux-gnu/libc.so.6+0x202e0)
    #12 0x971b69 in _start
(/b/sanitizer-x86_64-linux-fast/build/llvm_build_asan/bin/llc+0x971b69)

llvm-svn: 363105
2019-06-11 22:09:33 +00:00
Jordan Rupprecht
da23aa20fe [docs] Add "GNU binutils Replacements" section to command guide
Summary:
This splits out a section in the command guide for llvm tools that can be used as replacements for GNU tools. For pages that didn't exist, I added stub pages that can be individually filled in by followup patches.

Tested by running `ninja docs-llvm-html` and inspecting locally.

Reviewers: jhenderson, MaskRay, grimar, alexshap

Reviewed By: jhenderson, MaskRay, grimar

Subscribers: smeenai, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63014

llvm-svn: 363100
2019-06-11 21:13:01 +00:00
Amara Emerson
9b31bc723f [GlobalISel] Add a G_JUMP_TABLE opcode.
This opcode generates a pointer to the address of the jump table
specified by the source operand, which is a jump table index.

It will be used in conjunction with an upcoming G_BRJT opcode to support
jump table codegen with GlobalISel.

Differential Revision: https://reviews.llvm.org/D63111

llvm-svn: 363096
2019-06-11 19:58:06 +00:00
Alina Sbirlea
193da55f93 [MemorySSA] When applying updates, clean unnecessary Phis.
Summary: After applying a set of insert updates, there may be trivial Phis left over. Clean them up.

Reviewers: george.burgess.iv

Subscribers: jlebar, Prazek, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63033

llvm-svn: 363094
2019-06-11 19:09:34 +00:00
Cameron McInally
d484729fd7 [NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll
llvm-svn: 363093
2019-06-11 18:55:13 +00:00
Alina Sbirlea
536de2714e Only passes that preserve MemorySSA must mark it as preserved.
Summary:
The method `getLoopPassPreservedAnalyses` should not mark MemorySSA as
preserved, because it's being called in a lot of passes that do not
preserve MemorySSA.
Instead, mark the MemorySSA analysis as preserved by each pass that does
preserve it.
These changes only affect the new pass mananger.

Reviewers: chandlerc

Subscribers: mehdi_amini, jlebar, Prazek, george.burgess.iv, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62536

llvm-svn: 363091
2019-06-11 18:27:49 +00:00
Amy Huang
b00b579f45 Deduplicate S_CONSTANTs in LLD.
Summary: Deduplicate S_CONSTANTS when linking, if they have the same value.

Reviewers: rnk

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63151

llvm-svn: 363089
2019-06-11 18:02:39 +00:00
Jinsong Ji
983e632f04 [PowerPC] Enable MachinePipeliner for P9 with -ppc-enable-pipeliner
Implement necessary target hooks to enable MachinePipeliner for P9 only.
The pass is off by default, can be enabled with -ppc-enable-pipeliner for P9.

Differential Revision: https://reviews.llvm.org/D62164

llvm-svn: 363085
2019-06-11 17:40:39 +00:00
Cameron McInally
7a07bb1dad [NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll
llvm-svn: 363084
2019-06-11 17:05:36 +00:00
Jonas Devlieghere
6359609b7d [Path] Set FD to -1 in moved-from TempFile
When moving a temp file, explicitly set the file descriptor to -1 so we
can never accidentally close the moved-from TempFile.

Differential revision: https://reviews.llvm.org/D63087

llvm-svn: 363083
2019-06-11 16:42:42 +00:00
Cameron McInally
e131342efa [InstCombine] Handle -(X-Y) --> (Y-X) for unary fneg when NSZ
Differential Revision: https://reviews.llvm.org/D62612

llvm-svn: 363082
2019-06-11 16:21:21 +00:00
James Henderson
f743742a51 [docs][llvm-nm] Add darwin as --format option
llvm-svn: 363081
2019-06-11 15:58:10 +00:00
Cameron McInally
0b227e0180 [InstCombine] Update fptrunc (fneg x)) -> (fneg (fptrunc x) for unary FNeg
Differential Revision: https://reviews.llvm.org/D62629

llvm-svn: 363080
2019-06-11 15:45:41 +00:00
Sander de Smalen
2392666841 Fix docs build issue introduced by r363035
Replacing '.. code-block:: llvm' by '::' is a quick fix to the
build warning/error: Could not lex literal_block as "llvm".

llvm-svn: 363079
2019-06-11 15:28:13 +00:00
Nico Weber
1aeeff713a lld-link: Reject more than one resource .obj file
Users are exepcted to pass all .res files to the linker, which then
merges all the resource in all .res files into a tree structure and then
converts the final tree structure to a .obj file with .rsrc$01 and
.rsrc$02 sections and then links that.

If the user instead passes several .obj files containing such resources,
the correct thing to do would be to have custom code to merge the trees
in the resource sections instead of doing normal section merging -- but
link.exe rejects if multiple resource obj files are passed in with
LNK4078, so let lld-link do that too instead of silently writing broken
.rsrc sections in that case.

The only real way to run into this is if users manually convert .res
files to .obj files by running cvtres and then handing the resulting
.obj files to lld-link instead, which in practice likely never happens.

(lld-link is slightly stricter than link.exe now: If link.exe is passed
one .obj file created by cvtres, and a .res file, for some reason it
just emits a warning instead of an error and outputs strange looking
data. lld-link now errors out on mixed input like this.)

One way users could accidentally run into this is the following
scenario: If a .res file is passed to lib.exe, then lib.exe calls
cvtres.exe on the .res file before putting it in the output .lib.
(llvm-lib currently doesn't do this.)
link.exe's /wholearchive seems to only add obj files referenced from the
static library index, but lld-link current really adds all files in the
archive. So if lld-link /wholearchive is used with .lib files produced
by lib.exe and .res files were among the files handed to lib.exe, we
previously silently produced invalid output, but now we error out.

link.exe's /wholearchive semantics on the other hand mean that it
wouldn't load the resource object files from the .lib file at all.
Since this scenario is probably still an unlikely corner case,
the difference in behavior here seems fine -- and lld-link might have to
change to use link.exe's /wholearchive semantics in the future anyways.

Vaguely related to PR42180.

Differential Revision: https://reviews.llvm.org/D63109

llvm-svn: 363078
2019-06-11 15:22:28 +00:00
Simon Pilgrim
6e876b8416 [X86] Regenerate CmpISel test for future patch
llvm-svn: 363077
2019-06-11 15:13:11 +00:00
James Henderson
f444b367b7 [docs][llvm-nm] Make --help help text consistent with other options
llvm-svn: 363073
2019-06-11 14:55:31 +00:00
James Henderson
b580c2689b [llvm-dwarfdump] Simplify --ignore-case help text and documentation
There was a typo in the --ignore-case help text that was copied into the
llvm-dwarfdump command-guide. Additionally, this patch simplifies the
wording, since it was unnecessarily verbose: the switch applies for
searching in general and doesn't need explicitly stating different
search modes (which might go out-of-date as options are added or
removed).

Reviwed by: JDevlieghere

Differential Revision: https://reviews.llvm.org/D63133

llvm-svn: 363066
2019-06-11 13:51:18 +00:00
James Henderson
3c07dee073 [docs][llvm-nm] Fix documentation regarding llvm-nm reading stdin
llvm-nm reads a.out NOT stdin when no input file is specified. This
patch fixes the doc accordingly, and rephrases the surrounding sentence
slightly.

Reviewed by: grimar

Differential Revision: https://reviews.llvm.org/D63135

llvm-svn: 363065
2019-06-11 13:46:52 +00:00
Ilya Biryukov
bc8fc40ea1 [ARM] Fix a typo in the test from r363039
llvm-svn: 363063
2019-06-11 13:36:06 +00:00
Lewis Revill
5737f73fac [RISCV] Add lowering of addressing sequences for PIC
This patch allows lowering of PIC addresses by using PC-relative
addressing for DSO-local symbols and accessing the address through the
global offset table for non-DSO-local symbols.

Differential Revision: https://reviews.llvm.org/D55303

llvm-svn: 363058
2019-06-11 12:57:47 +00:00
Lewis Revill
f7467a8a75 [RISCV][NFC] Add missing test file for D54093
llvm-svn: 363057
2019-06-11 12:52:05 +00:00
Lewis Revill
5b399a46f6 [RISCV] Lower inline asm constraints I, J & K for RISC-V
This validates and lowers arguments to inline asm nodes which have the
constraints I, J & K, with the following semantics (equivalent to GCC):

I: Any 12-bit signed immediate.
J: Immediate integer zero only.
K: Any 5-bit unsigned immediate.

Differential Revision: https://reviews.llvm.org/D54093

llvm-svn: 363054
2019-06-11 12:42:13 +00:00
Mikhail Maltsev
57e0a9920e [ARM] First MVE instructions: scalar shifts.
This introduces a new decoding table for MVE instructions, and starts
by adding the family of scalar shift instructions that are part of the
MVE architecture extension: saturating shifts within a single GPR, and
long shifts across a pair of GPRs (both saturating and normal).

Some of these shift instructions have only 3-bit register fields in
the encoding, with the low bit fixed. So they can only address an odd
or even numbered GPR (depending on the operand), and therefore I add
two new register classes, GPREven and GPROdd.

Differential Revision: https://reviews.llvm.org/D62668

Change-Id: Iad95d5f83d26aef70c674027a184a6b1e0098d33
llvm-svn: 363051
2019-06-11 12:04:32 +00:00
Nico Weber
f78666fc01 Let writeWindowsResourceCOFF() take a TimeStamp parameter
For lld, pass in Config->Timestamp (which is set based on lld's
/timestamp: and /Brepro flags). Since the writeWindowsResourceCOFF()
data is only used in-memory by LLD and the obj's timestamp isn't used
for anything in the output, this doesn't change behavior.

For llvm-cvtres, add an optional /timestamp: parameter, and use the
current behavior of calling time() if the parameter is not passed in.

This doesn't really change observable behavior (unless someone passes
/timestamp: to llvm-cvtres, which wasn't possible before), but it
removes the last unqualified call to time() from llvm/lib, which seems
like a good thing.

Differential Revision: https://reviews.llvm.org/D63116

llvm-svn: 363050
2019-06-11 11:26:50 +00:00
David Bolvansky
b57c4e067b [NFC] Fixed arm/aarch64 test
llvm-svn: 363049
2019-06-11 11:09:25 +00:00
Simon Pilgrim
3d3a3945a8 [TargetLowering] Add allowsMemoryAccess(MachineMemOperand) helper wrapper. NFCI.
As suggested by @arsenm on D63075 - this adds a TargetLowering::allowsMemoryAccess wrapper that takes a Load/Store node's MachineMemOperand to handle the AddressSpace/Alignment arguments and will also implicitly handle the MachineMemOperand::Flags change in D63075.

llvm-svn: 363048
2019-06-11 11:00:23 +00:00
Orlando Cazalet-Hyams
9f636c8c46 [DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop even after completion
Summary:
Bug: https://bugs.llvm.org/show_bug.cgi?id=39024

The bug reports that a vectorized loop is stepped through 4 times and each step through the loop seemed to show a different path. I found two problems here:

A) An incorrect line number on a preheader block (for.body.preheader) instruction causes a step into the loop before it begins.
B) Instructions in the middle block have different line numbers which give the impression of another iteration.

In this patch I give all of the middle block instructions the line number of the scalar loop latch terminator branch. This seems to provide the smoothest debugging experience because the vectorized loops will always end on this line before dropping into the scalar loop. To solve problem A I have altered llvm::SplitBlockPredecessors to accommodate loop header blocks.

I have set up a separate review D61933 for a fix which is required for this patch.

Reviewers: samsonov, vsk, aprantl, probinson, anemet, hfinkel, jmorse

Reviewed By: hfinkel, jmorse

Subscribers: jmorse, javed.absar, eraman, kcc, bjope, jmellorcrummey, hfinkel, gbedwell, hiraditya, zzheng, llvm-commits

Tags: #llvm, #debug-info

Differential Revision: https://reviews.llvm.org/D60831

llvm-svn: 363046
2019-06-11 10:37:20 +00:00
George Rimar
f97d29f81c [llvm-readobj] - Do not use precompiled binary in elf-broken-dynsym-link.test
Now we can remove the "TODO" since https://bugs.llvm.org/show_bug.cgi?id=42216
was fixed.

llvm-svn: 363045
2019-06-11 10:28:15 +00:00
James Henderson
fa3a9f7a98 [llvm-dwarfdump] Add -o to help text and remove --out-file from doc
-o is in the documentation, but not in the llvm-dwarfdump help text.
This patch adds it by inverting the -o and --out-file aliasing. It also
removes --out-file from the documentation, since we don't really want
people to be using this switch in practice.

Reviewed by: aprantl, JDevlieghere, dblaikie

Differential Revision: https://reviews.llvm.org/D63013

llvm-svn: 363044
2019-06-11 10:20:07 +00:00
Simon Tatham
04c57e44c9 [ARM] Fix unused-variable warning in rL363039.
The variable `OffsetMask` is currently only used in an assertion, so
if assertions are compiled out and -Werror is enabled, it becomes a
build failure.

llvm-svn: 363043
2019-06-11 10:09:12 +00:00