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Commit Graph

129019 Commits

Author SHA1 Message Date
Saleem Abdulrasool
866cc7fa60 ARM: fix optimised division on WoA
We did not have an explicit branch to the continuation BB.  When the check was
hoisted, this could permit control follow to fall through into the division
trap.  Add the explicit branch to the continuation basic block to ensure that
code execution is correct.

llvm-svn: 264370
2016-03-25 00:34:11 +00:00
Matt Arsenault
1c86c8a2a7 TTI: Report 0 cost for free addrspacecasts
llvm-svn: 264369
2016-03-25 00:26:29 +00:00
Matt Arsenault
ab1f6bea74 TTI: Use 0 for cost of fabs if free
Ideally this would also happen for fneg, but that
isn't a distinct operation in the IR.

llvm-svn: 264368
2016-03-25 00:26:22 +00:00
Matt Arsenault
ffa532b58f AMDGPU: TTI: Make insertelement free.
We don't want to have a cost to scalarizing operations.

llvm-svn: 264364
2016-03-25 00:14:11 +00:00
Reid Kleckner
57ae7f9db2 Try to fix ODR violation of ErrorInfo::ID
This implements my suggestion to Lang.

llvm-svn: 264360
2016-03-24 23:49:34 +00:00
Manman Ren
abf6fcb013 CXX TLS: collect return blocks after SelectAllBasicBlocks.
It is incorrect to get the corresponding MBB for a ReturnInst before
SelectAllBasicBlocks since SelectAllBasicBlocks can change the
correspondence between a ReturnInst and the MBB it is in.

PR27062

llvm-svn: 264358
2016-03-24 23:21:29 +00:00
Sanjay Patel
005a2447bd Add utility script to generate checks for opt or llc regression tests
This is an enhancement of the existing update_llc_test_checks.py script.
It adds some of the functionality from the script used in D17999 to make
the IR checking more flexible.

The bad news: 
This actually is 'My First Python Program'. Thus, it's likely that I have
violated all best practices of Python programming if I've made a functional
change from the original program. If you see anything that's obviously 
wrong, please let me know or feel free to fix it. I didn't even read any
documentation...

The good news: 
I tested this on ~10 existing opt/llc regression tests, and it does what 
I hoped for. It produces exact checking for IR regression tests and doesn't
signficantly change the existing llc-with-x86-target asm checking. The opt
tests that were modified in r263667, r263668, r263674, and r263679 are
examples of the expected results, except that this version of the script 
puts the check lines ahead of the IR to follow the existing llc/asm 
behavior.

If there are no complaints/fallout, we should be able to remove the 
original script. Extending this script to be used for non-x86 and clang
regression tests would be the expected follow-up steps.

llvm-svn: 264357
2016-03-24 23:19:26 +00:00
Sanjoy Das
f86c960aaf Reduce code duplication by extracting out a helper function; NFC
llvm-svn: 264355
2016-03-24 22:51:49 +00:00
Sanjoy Das
43d252542e Lower varargs correctly in deopt bundle lowering
Earlier we were ignoring varargs in LowerCallSiteWithDeoptBundle because
populateCallLoweringInfo does not set CallLoweringInfo::IsVarArg.

llvm-svn: 264354
2016-03-24 22:37:52 +00:00
Sean Silva
73782171b6 Fix typo: XDS -> XDG
Patch by Robert Ma <bob1211@gmail.com>!

llvm-svn: 264352
2016-03-24 22:27:27 +00:00
David Blaikie
0feb27005d llvm-dwp: Coalesce code for reading the CU's DW_AT_GNU_dwo_id and DW_AT_name
Going to be reading the DW_AT_GNU_dwo_name shortly as well, and there
was already enough duplication here that it was worth refactoring
rather than adding even more.

llvm-svn: 264350
2016-03-24 22:17:08 +00:00
Mike Aizatsky
3edddc591b [sancov] renaming statistics fields.
llvm-svn: 264349
2016-03-24 21:49:55 +00:00
Matthias Braun
8753a39411 LiveInterval: Fix Distribute() failing on liveranges with unused VNInfos
This fixes http://llvm.org/PR26991

llvm-svn: 264345
2016-03-24 21:41:38 +00:00
David Majnemer
70dbe266d3 [LoopStrengthReduce] Don't hoist into a catchswitch
We try to hoist the insertion point as high as possible to encourage
sharing.  However, we must be careful not to hoist into a catchswitch as
it is both an EHPad and a terminator.

llvm-svn: 264344
2016-03-24 21:40:22 +00:00
Lang Hames
0993090e85 [Support] Add ErrorInfo::ID static member definition.
Somehow this got dropped in an earlier patch.

llvm-svn: 264341
2016-03-24 21:17:50 +00:00
Eric Christopher
6ddb84b162 Finish the incomplete 'd' inline asm constraint support for PPC by
making sure we give it a register and mark it as a register constraint.

llvm-svn: 264340
2016-03-24 21:04:52 +00:00
Eric Christopher
0b5937f7d0 Reorder check lines, comments in test and remove unnecessary IR.
llvm-svn: 264339
2016-03-24 21:04:47 +00:00
Kostya Serebryany
6ff8ede73a [libFuzzer] handle SIGTERM
llvm-svn: 264338
2016-03-24 21:03:58 +00:00
Sanjoy Das
80e91d62ed Match call and target calling conventions in test
Fixes an issue in rL264329.

llvm-svn: 264337
2016-03-24 20:51:24 +00:00
Mike Aizatsky
997e3b6cf8 [sancov] adding leading zeros to coverage pct.
Summary:
Using leading zeroes allows you to search for "000%" to find non-covered
items.

Differential Revision: http://reviews.llvm.org/D18420

llvm-svn: 264336
2016-03-24 20:41:18 +00:00
Dimitry Andric
d8a3f46e15 Add <atomic> to ThreadPool.h, since std::atomic is used
Summary:
Apparently, when compiling with gcc 5.3.2 for powerpc64, the order of
headers is such that it gets an error about std::atomic<> use in
ThreadPool.h, since this header is not included explicitly.  See also:

https://llvm.org/bugs/show_bug.cgi?id=27058

Fix this by including <atomic>.  Patch by Bryan Drewery.

Reviewers: chandlerc, joker.eph

Subscribers: bdrewery, llvm-commits

Differential Revision: http://reviews.llvm.org/D18460

llvm-svn: 264335
2016-03-24 20:39:17 +00:00
Reid Kleckner
03c7bd1877 Revert "Recommitted r263424 "Supporting all entities declared in lexical scope in LLVM debug info." After fixing PR26942 (the fix is included in this commit)."
This reverts commit r264280.

This broke building Chromium for iOS. We'll upload a reproducer to the
PR soon.

llvm-svn: 264334
2016-03-24 20:38:49 +00:00
Krzysztof Parzyszek
6caeef4fa5 [Hexagon] Be sure to treat subregisters of a CSR as CSRs as well
llvm-svn: 264331
2016-03-24 20:31:41 +00:00
David Blaikie
4824d34fa2 [ADT] C++11ify SmallVector::erase's arguments from iterator to const_iterator
llvm-svn: 264330
2016-03-24 20:25:51 +00:00
Sanjoy Das
b1899b2cab Add lowering support for llvm.experimental.deoptimize
Summary:
Only adds support for "naked" calls to llvm.experimental.deoptimize.
Support for round-tripping through RewriteStatepointsForGC will come
as a separate patch (should be simpler than this one).

Reviewers: reames

Subscribers: sanjoy, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18429

llvm-svn: 264329
2016-03-24 20:23:29 +00:00
Krzysztof Parzyszek
80d0666040 [Hexagon] Add support for run-time stack overflow checking
Patch by Sundeep Kushwaha.

llvm-svn: 264328
2016-03-24 20:20:07 +00:00
Teresa Johnson
ea65bef4df [ThinLTO] Use bulk importing in llvm-link
Summary:
Use bulk importing so we can avoid the use of post-pass metadata
linking. Cloned the ModuleLazyLoaderCache from the FunctionImport pass
to facilitate this.

Reviewers: joker.eph

Subscribers: dexonsmith, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D18455

llvm-svn: 264326
2016-03-24 19:52:20 +00:00
Krzysztof Parzyszek
513db043c7 [Hexagon] Generate PIC-specific versions of save/restore routines
In PIC mode, the registers R14, R15 and R28 are reserved for use by
the PLT handling code. This causes all functions to clobber these
registers. While this is not new for regular function calls, it does
also apply to save/restore functions, which do not follow the standard
ABI conventions with respect to the volatile/non-volatile registers.

Patch by Jyotsna Verma.

llvm-svn: 264324
2016-03-24 19:18:48 +00:00
Richard Smith
8edc6624b9 Stop relying on mapped_iterator's function having a result_type. That facility
is deprecated in modern C++ and unnecessary since decltype can be used to query
the relevant type.

llvm-svn: 264321
2016-03-24 19:10:58 +00:00
Sanjoy Das
af0494dc3b [Statepoints] Fix yet another issue around gc pointer uniqueing
Given that StatepointLowering now uniques derived pointers before
putting them in the per-statepoint spill map, we may end up with missing
entries for derived pointers when we visit a gc.relocate on a pointer
that was de-duplicated away.

Fix this by keeping two maps, one mapping gc pointers to their
de-duplicated values, and one mapping a de-duplicated value to the slot
it is spilled in.

llvm-svn: 264320
2016-03-24 18:57:39 +00:00
Sanjoy Das
4d8366ac18 Minor cosmestic changes (NFC)
- Reflow comments
 - Rename function

llvm-svn: 264319
2016-03-24 18:57:31 +00:00
Chris Bieneman
c6ea540077 [Docs] Updating CMake docs to include LLVM_OPTIMIZED_TABLEGEN
This is based on feedback on llvm-commits from Sean Silvas.

llvm-svn: 264318
2016-03-24 18:46:43 +00:00
David Blaikie
c53c8ed03b [debuginfo] Include dwo_name in the split unit to improve dwp diagnostics
When multiple DWP files are merged together and duplicate DWO IDs are
found it's currently difficult to give an actionable error message - the
DW_AT_name of the CU could be provided, but might be identical (if the
same source file is built into two different configurations), which
doesn't help the user identify the problem.

When no intermediate DWP files are generated, the path to the two DWO
files could be provided - but is lost once the DWOs are merged into a
DWP.

So, include the name of the DWO (dwo_name) in the split file so that
collissions involving a source CU from a DWP can be better diagnosed.

(improvements to llvm-dwp using this to come shortly)

llvm-svn: 264316
2016-03-24 18:37:08 +00:00
Lang Hames
18415e1c16 [docs] Clarify Error example in Programmer's Manual.
llvm-svn: 264314
2016-03-24 18:05:21 +00:00
Adam Nemet
8da6eb65c3 [LLE] Check for mismatching types between the store and the load earlier
isDependenceDistanceOfOne asserts that the store and the load access
through the same type.  This function is also used by
removeDependencesFromMultipleStores so we need to make sure we filter
out mismatching types before reaching this point.

Now we do this when the initial candidates are gathered.

This is a refinement of the fix made in r262267.

Fixes PR27048.

llvm-svn: 264313
2016-03-24 17:59:26 +00:00
Sanjay Patel
b9fb991cea don't hardcode the name of the llc checks script
We lose the 'utils' directory name in our advertising line with
this change. We could retain that, but I don't see the point.
This removes a dependency for making the script apply to more than
'llc'. Ie, we'll want to change the script name if it works with 
opt/clang too.

llvm-svn: 264310
2016-03-24 17:30:38 +00:00
Simon Atanasyan
64d083c81a [MC][mips] Add MipsMCInstrAnalysis class and register it as MC instruction analyzer
The `MipsMCInstrAnalysis` class overrides the `evaluateBranch` method
and calculates target addresses for branch and calls instructions.
That allows llvm-objdump to print functions' names in branch instructions
in the disassemble mode.

Differential Revision: http://reviews.llvm.org/D18209

llvm-svn: 264309
2016-03-24 17:18:14 +00:00
Sanjoy Das
d336a67dfe Remove unnecessary redirect from test
llvm-svn: 264308
2016-03-24 17:18:00 +00:00
Sanjay Patel
1613bbab8d reorganize llc checks script to allow more flexibility, part 2; NFCI
The goal is to enhance this script to be used with opt and clang:
Break 'main' into functions and change variable names to be more
generic because we want to handle more than x86 asm output.

llvm-svn: 264307
2016-03-24 17:15:42 +00:00
Rafael Espindola
f2350e6ece Fix gold tests for llvm-readobj format change.
llvm-svn: 264306
2016-03-24 16:45:41 +00:00
Simon Pilgrim
cc78833907 [X86][XOP] Fixed instruction postfixes to more closely match operands
Suggested by Sanjay in D18189 as the multiple folding options in XOP instructions can be tricky

llvm-svn: 264305
2016-03-24 16:31:30 +00:00
Duncan P. N. Exon Smith
27bcd4da30 BitcodeWriter: Move abbreviation for GenericDINode; almost NFC
Simplify ValueEnumerator and WriteModuleMetadata by shifting the logic
for the METADATA_GENERIC_DEBUG abbreviation into WriteGenericDINode.
(This is just like r264302, but for GenericDINode.)

The only change is that the abbreviation is emitted later in the
bitcode, just before the first `GenericDINode` record.  This shouldn't
be observable though.

llvm-svn: 264303
2016-03-24 16:30:18 +00:00
Duncan P. N. Exon Smith
cc1d84c50c BitcodeWriter: Move abbreviation for DILocation; almost NFC
Simplify ValueEnumerator and WriteModuleMetadata by shifting the logic
for the METADATA_LOCATION abbreviation into WriteDILocation.

The only change is that the abbreviation is emitted later in the
bitcode, just before the first `DILocation` record.  This shouldn't be
observable though.

llvm-svn: 264302
2016-03-24 16:25:51 +00:00
Duncan P. N. Exon Smith
b30b033cb6 BitcodeWriter: Split out named metadata; almost NFC
Split writeNamedMetadata out of WriteModuleMetadata to write named
metadata, and createNamedMetadataAbbrev for the abbreviation.

There should be no effective functionality change, although the layout
of the bitcode will change.  Previously, the abbreviation was emitted at
the top of the block, but now it is delayed until immediately before the
named metadata records are emitted.

llvm-svn: 264301
2016-03-24 16:16:08 +00:00
Simon Atanasyan
a5a68b8d26 [llvm-readobj] Decode st_other symbol's flags
The patch supports common STV_xxx visibility flags and MIPS specific
STO_MIPS_xxx flags.

Differential Revision: http://reviews.llvm.org/D18447

llvm-svn: 264300
2016-03-24 16:10:37 +00:00
Duncan P. N. Exon Smith
81458cc6e7 Bitcode: Module* -> Module&, NFC
llvm-svn: 264299
2016-03-24 16:01:46 +00:00
Elena Demikhovsky
40f394e95d AVX-512: Generate KTEST instead of TEST fir i1 vectors
KTEST instruction may be used instead of TEST in this case:

%int_sel3 = bitcast <8 x i1> %sel3 to i8
%res = icmp eq i8 %int_sel3, zeroinitializer
br i1 %res, label %L2, label %L1

Differential Revision: http://reviews.llvm.org/D18444

llvm-svn: 264298
2016-03-24 15:53:45 +00:00
NAKAMURA Takumi
5fba946e7d ErrorTest.cpp: Move instantiations out of anonymous namespace. gcc didn't complain.
llvm-svn: 264297
2016-03-24 15:40:46 +00:00
Tim Northover
c43df20a4d CodeGen: extend RHS when splitting ATOMIC_CMP_SWAP_WITH_SUCCESS.
If the operation's type has been promoted during type legalization, we
need to account for the fact that the high bits of the comparison
operand are likely unspecified.

The LHS is usually zero-extended, but MIPS sign extends it, so we have
to be slightly careful.

Patch by Simon Dardis.

llvm-svn: 264296
2016-03-24 15:38:38 +00:00
Tom Stellard
ecc10afe4f AMDGPU/SI: Add Polaris support
Patch By: Sonny Jiang

llvm-svn: 264295
2016-03-24 15:31:05 +00:00