1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
Commit Graph

119110 Commits

Author SHA1 Message Date
Arnaud A. de Grandmaison
90c89b61da [AArch64] Select SBFIZ or UBFIZ instead of left + right shifts
And rename LSB to Immr / MSB to Imms to match the ARM ARM terminology.

llvm-svn: 241803
2015-07-09 14:33:38 +00:00
Scott Douglass
08f31271aa [ARM] Thumb1 3 to 2 operand convertion for commutative operations
Differential Revision: http://reviews.llvm.org/D11057

llvm-svn: 241802
2015-07-09 14:13:55 +00:00
Scott Douglass
480340a7cb [ARM] Don't be overzealous converting Thumb1 3 to 2 operands
Differential Revision: http://reviews.llvm.org/D11056

llvm-svn: 241801
2015-07-09 14:13:48 +00:00
Scott Douglass
82d04ef2eb [ARM] Add Thumb2 ADD with PC narrowing from 3 operand to 2
Differential Revision: http://reviews.llvm.org/D11055

llvm-svn: 241800
2015-07-09 14:13:41 +00:00
Scott Douglass
a3566efdd9 [ARM] Refactor converting Thumb1 from 3 to 2 operand (nfc)
Also adds some test cases.

Differential Revision: http://reviews.llvm.org/D11054

llvm-svn: 241799
2015-07-09 14:13:34 +00:00
Scott Douglass
7b927c9cd5 [ARM] Add ADD tests for Thumb2 narrowing (nfc)
Differential Revision: http://reviews.llvm.org/D11053

llvm-svn: 241798
2015-07-09 14:13:22 +00:00
Renato Golin
fc38fe2618 Test for 241794 (nest attribute in AArch64)
Forgot to git add the test.

Patch by Stephen Cross.

llvm-svn: 241797
2015-07-09 13:29:35 +00:00
Renato Golin
70c96c7b55 Add support for nest attribute to AArch64 backend
The nest attribute is currently supported on the x86 (32-bit) and x86-64
backends, but not on ARM (32-bit) or AArch64. This patch adds support for
nest to the AArch64 backend.

Register x18 is used by GCC for this purpose and hence is used here.
As discussed on the GCC mailing list the register choice is an ABI issue
and so choosing the same register as GCC means __builtin_call_with_static_chain
is compatible.

Patch by Stephen Cross.

llvm-svn: 241794
2015-07-09 10:18:02 +00:00
Tamas Berghammer
bbb74e817c Add getSizeInBits function to the APFloat class
The newly added function returns the size of the specified floating
point semantics in bits.

Differential revision: http://reviews.llvm.org/D8413

llvm-svn: 241793
2015-07-09 10:13:39 +00:00
Pawel Bylica
7aa3d79c2c Revert r241790: Fix shift legalization and lowering for big constants.
llvm-svn: 241792
2015-07-09 09:50:54 +00:00
Pawel Bylica
f94083a5ee Fix shift legalization and lowering for big constants.
Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt.

Reviewers: nadav, majnemer, sanjoy, RKSimon

Subscribers: RKSimon, llvm-commits

Differential Revision: http://reviews.llvm.org/D10767

llvm-svn: 241790
2015-07-09 08:01:36 +00:00
Elena Demikhovsky
88c04dfc81 Extended syntax of vector version of getelementptr instruction.
The justification of this change is here: http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-March/082989.html

According to the current GEP syntax, vector GEP requires that each index must be a vector with the same number of elements.

%A = getelementptr i8, <4 x i8*> %ptrs, <4 x i64> %offsets

In this implementation I let each index be or vector or scalar. All vector indices must have the same number of elements. The scalar value will mean the splat vector value.

(1) %A = getelementptr i8, i8* %ptr, <4 x i64> %offsets
or
(2) %A = getelementptr i8, <4 x i8*> %ptrs, i64 %offset

In all cases the %A type is <4 x i8*>

In the case (2) we add the same offset to all pointers.

The case (1) covers C[B[i]] case, when we have the same base C and different offsets B[i].

The documentation is updated.

http://reviews.llvm.org/D10496

llvm-svn: 241788
2015-07-09 07:42:48 +00:00
Adam Nemet
0248df44fb [LAA] Fix line break in comment
llvm-svn: 241785
2015-07-09 06:47:21 +00:00
Adam Nemet
f7994e3356 [LAA] Rename IsRTNeeded to IsRTCheckAnalysisNeeded
The original name was too close to NeedRTCheck which is what the actual
memcheck analysis returns.  This flag, as the new name suggests, is only
used to whether to initiate that analysis.

Also a comment is added to answer one question I had about this code for
a long time.  Namely, how does this flag differ from
isDependencyCheckNeeded since they are seemingly set at the same time.

llvm-svn: 241784
2015-07-09 06:47:18 +00:00
Justin Bogner
a395151a4b llvm-readobj: Fix an unused variable after r241764
llvm-svn: 241783
2015-07-09 04:27:36 +00:00
Adrian Prantl
e71dc1d0ed Temporarily reverting 241765, 241768, and 241772 to unbreak the build bots.
llvm-svn: 241781
2015-07-09 02:14:49 +00:00
Mehdi Amini
17080aa296 Remove getDataLayout() from TargetSelectionDAGInfo (had no users)
Summary:
Remove empty subclass in the process.

This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, llvm-commits, rafael, yaron.keren, ted

Differential Revision: http://reviews.llvm.org/D11045

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 241780
2015-07-09 02:10:08 +00:00
Mehdi Amini
80730bca4b Remove getDataLayout() from TargetLowering
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: yaron.keren, rafael, llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D11042

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 241779
2015-07-09 02:09:52 +00:00
Mehdi Amini
761f22ac31 Make isLegalAddressingMode() taking DataLayout as an argument
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, llvm-commits, rafael, yaron.keren

Differential Revision: http://reviews.llvm.org/D11040

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 241778
2015-07-09 02:09:40 +00:00
Mehdi Amini
fd227e0aee Make getByValTypeAlignment() taking DataLayout as an argument
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: yaron.keren, rafael, llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D11038

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 241777
2015-07-09 02:09:28 +00:00
Mehdi Amini
547576cef1 Make TargetLowering::getShiftAmountTy() taking DataLayout as an argument
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, llvm-commits, rafael, yaron.keren

Differential Revision: http://reviews.llvm.org/D11037

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 241776
2015-07-09 02:09:20 +00:00
Mehdi Amini
abf873c623 Make TargetLowering::getPointerTy() taking DataLayout as an argument
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D11028

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 241775
2015-07-09 02:09:04 +00:00
Mehdi Amini
8fce925ea2 Make TargetTransformInfo keeping a reference to the Module DataLayout
DataLayout is no longer optional. It was initialized with or without
a DataLayout, and the DataLayout when supplied could have been the
one from the TargetMachine.

Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, llvm-commits, rafael, yaron.keren

Differential Revision: http://reviews.llvm.org/D11021

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 241774
2015-07-09 02:08:42 +00:00
Mehdi Amini
c61d582f14 Redirect DataLayout from TargetMachine to Module in ComputeValueVTs()
Summary:
Avoid using the TargetMachine owned DataLayout and use the Module owned
one instead. This requires passing the DataLayout up the stack to
ComputeValueVTs().

This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, yaron.keren, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D11019

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 241773
2015-07-09 01:57:34 +00:00
Davide Italiano
caa7b95d82 Silence a warning, trying to unbreak the build after r241765.
llvm-svn: 241772
2015-07-09 01:45:02 +00:00
Michael J. Spencer
80c10c497b Fix typename issues.
llvm-svn: 241768
2015-07-09 00:46:24 +00:00
Michael J. Spencer
b5535ebef9 [Object][ELF] Support dumping hash-tables from files with no section table.
llvm-svn: 241765
2015-07-09 00:21:06 +00:00
David Majnemer
7357b5b4b1 [CodeView] Add support for emitting column information
Column information is present in CodeView when the line table subsection
has bit 0 set to 1 in it's flags field.  The column information is
represented as a pair of 16-bit quantities: a starting and ending
column.  This information is present at the end of the chunk, after all
the line-PC pairs.

llvm-svn: 241764
2015-07-09 00:19:51 +00:00
Adam Nemet
743520f4d8 [LAA] Fix misleading use of word 'consecutive'
Fix some places where the word consecutive is used but the code really
means constant-stride (i.e. not just unit stride).

llvm-svn: 241763
2015-07-09 00:03:22 +00:00
Alex Lorenz
284c4b13e7 MIR Serialization: Serialize the 'undef' register machine operand flag.
llvm-svn: 241762
2015-07-08 23:58:31 +00:00
Sanjay Patel
c325a497d8 [SLPVectorizer] Try different vectorization factors for store chains
...and set max vector register size based on target 

This patch is based on discussion on the llvmdev mailing list:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-July/087405.html

and also solves:
https://llvm.org/bugs/show_bug.cgi?id=17170

Several FIXME/TODO items are noted in comments as potential improvements.

Differential Revision: http://reviews.llvm.org/D10950

llvm-svn: 241760
2015-07-08 23:40:55 +00:00
Matthias Braun
08e0b80601 RegisterPressure: Add PressureDiff::dump()
Also display the pressure diff in the case of a
getMaxUpwardPressureDelta() verify failure.

llvm-svn: 241759
2015-07-08 23:40:27 +00:00
Adam Nemet
24c6a55664 [LAA] Revert a small part of r239295
This commit ([LAA] Fix estimation of number of memchecks) regressed the
logic a bit.  We shouldn't quit the analysis if we encounter a pointer
without known bounds *unless* we actually need to emit a memcheck for
it.

The original code was using NumComparisons which is now computed
differently.  Instead I compute NeedRTCheck from NumReadPtrChecks and
NumWritePtrChecks.

As side note, I find the separation of NeedRTCheck and CanDoRT
confusing, so I will try to merge them in a follow-up patch.

llvm-svn: 241756
2015-07-08 22:58:48 +00:00
Juergen Ributzka
ce43222043 Run clang-format before making changes to StackMaps. NFC.
llvm-svn: 241754
2015-07-08 22:42:09 +00:00
Rafael Espindola
3eb81c15a2 Revert part of "Disallow Archive::child_iterator that don't point to an archive."
This reverts parts of commit r241747. MSVC doesn't like it.

llvm-svn: 241753
2015-07-08 22:41:41 +00:00
Sanjay Patel
806e80e796 [x86] enable machine combiner reassociations for scalar single-precision multiplies
llvm-svn: 241752
2015-07-08 22:35:20 +00:00
Rafael Espindola
a73aa6c568 Don't reject an archive with just a symbol table.
It is pretty unambiguous how to interpret it and gnu ar accepts it too.

llvm-svn: 241750
2015-07-08 22:27:54 +00:00
Rafael Espindola
aa281f8938 Disallow Archive::child_iterator that don't point to an archive.
NFC, just less error prone.

llvm-svn: 241747
2015-07-08 22:15:07 +00:00
Michael Zolotukhin
c78312ed70 [LoopVectorizer] Rename BypassBlock to VectorPH, and CheckBlock to NewVectorPH. NFCI.
llvm-svn: 241742
2015-07-08 21:48:03 +00:00
Michael Zolotukhin
39c3ba74c5 [LoopVectorizer] Restructurize code for emitting RT checks. NFCI.
Place all code corresponding to a run-time check in one place.
Previously we generated some code, then proceeded to a next check, then
finished the code for the first check (like splitting blocks and
generating branches). Now the code for generating a check is
self-contained.

llvm-svn: 241741
2015-07-08 21:47:59 +00:00
Michael Zolotukhin
0fb643f1ed [LoopVectorizer] Remove redundant variables PastOverflowCheck and OverflowCheckAnchor. NFCI.
llvm-svn: 241740
2015-07-08 21:47:56 +00:00
Michael Zolotukhin
59d3340a8d [LoopVectorizer] Move some code around to ease further refactoring. NFCI.
llvm-svn: 241739
2015-07-08 21:47:53 +00:00
Michael Zolotukhin
3f4ea2f1f8 [LoopVectorizer] Remove redundant variable LastBypassBlock. NFC.
llvm-svn: 241738
2015-07-08 21:47:47 +00:00
Alex Lorenz
980dc95b68 MIR Parser: Remove redundant TODO comment. NFC.
This TODO comment has been redundant since r240474.

llvm-svn: 241737
2015-07-08 21:30:21 +00:00
Eli Bendersky
374b7e43da Add tests for the NVPTXLowerAggrCopies pass.
Note: not testing memmove lowering for now, as it's broken
[see https://llvm.org/bugs/show_bug.cgi?id=24056]

llvm-svn: 241736
2015-07-08 21:29:28 +00:00
Alex Lorenz
1fa43c2c9d MIR Serialization: Serialize the 'killed' register machine operand flag.
llvm-svn: 241734
2015-07-08 21:23:34 +00:00
Diego Novillo
47b6978e39 Add missing dependency to Hexagon target.
A recent patch added calls to isInstructionTriviallyDead without the
corresponding dependency on TransformUtils.

llvm-svn: 241731
2015-07-08 21:13:37 +00:00
Simon Pilgrim
0c528a0762 [X86][SSE] Vector shift test cleanup. NFC.
llvm-svn: 241730
2015-07-08 21:11:17 +00:00
Rafael Espindola
9d348c0806 Use a raw_svector_ostream and simplify a loop. NFC.
llvm-svn: 241727
2015-07-08 21:07:18 +00:00
Reid Kleckner
f93836486a [Win64] Only treat some functions as having the Win64 convention
All the usual X86 target-specific conventions are collapsed to the
normal Win64 convention, but the custom conventions like GHC and webkit
should not be.

Previously we would assume that the caller allocated 32 bytes of shadow
space for us, which is not how webkit_jscc or other custom conventions
are supposed to work.

Based on a patch by peavo@outlook.com.

Fixes PR24051.

llvm-svn: 241725
2015-07-08 21:03:47 +00:00