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Author SHA1 Message Date
Jim Grosbach
9cddc3746d Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos. 
llvm-svn: 127445
 2011-03-11 01:16:49 +00:00
Jim Grosbach
ed45ac390c Properly pseudo-ize ARM MOVCCi and MOVCCi16. 
llvm-svn: 127442
 2011-03-11 01:09:28 +00:00
Eric Christopher
46f43c9cce Change the x86 32-bit scheduler to register pressure and fix up the 
corresponding testcases back to the previous versions.

Fixes some performance regressions only seen on 32-bit.

llvm-svn: 127441
 2011-03-11 01:05:58 +00:00
Evan Cheng
d5d2d4a158 Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613. 
llvm-svn: 127440
 2011-03-11 00:48:56 +00:00
Jim Grosbach
1986d9ac8f Properly pseudo-ize MOVCCr and MOVCCs. 
llvm-svn: 127434
 2011-03-10 23:56:09 +00:00
Dan Gohman
051cc738c3 RecursivelyDeleteTriviallyDeadInstructions only needs a 
Value, not an Instruction, so casting is not necessary. Also,
it's theoretically possible that the Value is not an
Instruction, since WeakVH follows RAUWs.

llvm-svn: 127427
 2011-03-10 20:57:44 +00:00
Rafael Espindola
222ccb2bdd Don't compute the file size if we don't need to. 
llvm-svn: 127426
 2011-03-10 20:54:07 +00:00
Dan Gohman
bb9c77f5bd Fix reassociate to postpone certain instruction deletions until 
after it has finished all of its reassociations, because its
habit of unlinking operands and holding them in a datastructure
while working means that it's not easy to determine when an
instruction is really dead until after all its regular work is
done. rdar://9096268.

llvm-svn: 127424
 2011-03-10 19:51:54 +00:00
Jim Grosbach
5891b1323a DMB can just be a pat referencing MCR. 
llvm-svn: 127423
 2011-03-10 19:27:17 +00:00
Jim Grosbach
4b74ef6ca9 Reorganize a bit. No functional change, just moving patterns up. 
llvm-svn: 127422
 2011-03-10 19:21:08 +00:00
Jim Grosbach
db549a7f6c Pseudo-instructions are codegenonly by definition. 
llvm-svn: 127420
 2011-03-10 19:06:39 +00:00
Jim Grosbach
41694b91ad Memory barrier instructions don't need special handling in tblgen anymore. 
llvm-svn: 127419
 2011-03-10 19:05:48 +00:00
Benjamin Kramer
52a44b9c80 InstCombine: Turn umul_with_overflow into mul nuw if we can prove that it cannot overflow. 
This happens a lot in clang-compiled C++ code because it adds overflow checks to operator new[]:
  unsigned *foo(unsigned n) { return new unsigned[n]; }
We can optimize away the overflow check on 64 bit targets because (uint64_t)n*4 cannot overflow.

llvm-svn: 127418
 2011-03-10 18:40:14 +00:00
Rafael Espindola
a271db1a12 Add r127409 back now that the windows file was updated. 
llvm-svn: 127417
 2011-03-10 18:33:29 +00:00
Rafael Espindola
11ae298b4f Try to fix the windows build. 
llvm-svn: 127416
 2011-03-10 18:30:48 +00:00
Jakob Stoklund Olesen
891bfab351 Revert r127409 which broke all the Windows bots. 
llvm-svn: 127413
 2011-03-10 18:01:43 +00:00
Justin Holewinski
a26d2f782e PTX: Add preliminary support for floating-point divide and multiply-and-add 
llvm-svn: 127410
 2011-03-10 16:57:18 +00:00
Rafael Espindola
b7a2d86ef5 Add support for MemoryBuffers that are not null terminated and add 
support for creating buffers that cover only a part of a file.

llvm-svn: 127409
 2011-03-10 16:10:30 +00:00
Chris Lattner
bf47cbabd9 rip out llvm 2.8 release notes to make room for llvm 2.9 notes. 
llvm-svn: 127399
 2011-03-10 07:43:44 +00:00
Cameron Zwarich
206503113e Add an option to disable critical edge splitting in PHIElimination. 
llvm-svn: 127398
 2011-03-10 05:59:17 +00:00
Che-Liang Chiou
fc6c7ba9d5 ptx: add the rest of special registers of ISA version 2.0 
llvm-svn: 127397
 2011-03-10 04:05:57 +00:00
Jakob Stoklund Olesen
92652a803f Change the Spiller interface to take a LiveRangeEdit reference. 
This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.

llvm-svn: 127389
 2011-03-10 01:51:42 +00:00
Jakob Stoklund Olesen
70541686bf Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors. 
llvm-svn: 127388
 2011-03-10 01:21:58 +00:00
Francois Pichet
348d41b59b Unbreak the CMake build. 
llvm-svn: 127383
 2011-03-10 00:51:01 +00:00
Stuart Hastings
fd42046d56 Revert 127359; it broke lencod. 
llvm-svn: 127382
 2011-03-10 00:25:53 +00:00
Devang Patel
73d68195ce Introduce DebugInfoProbe. This is used to monitor how llvm optimizer is treating debugging information. 
It generates output that lools like

8 times line number info lost by Scalar Replacement of Aggregates (SSAUp) 
1 times line number info lost by Simplify well-known library calls 
12 times variable info lost by Jump Threading

llvm-svn: 127381
 2011-03-10 00:21:25 +00:00
Evan Cheng
a3a7a7e364 Re-commit 127368 and 127371. They are exonerated. 
llvm-svn: 127380
 2011-03-10 00:16:32 +00:00
Evan Cheng
d7a2008a55 Revert 127368 and 127371 for now. 
llvm-svn: 127376
 2011-03-09 23:53:17 +00:00
Evan Cheng
c4a9f8a319 Restore the default implementation of getCrossCopyRegClass: no need for cross-regclass copies. 
llvm-svn: 127371
 2011-03-09 23:15:40 +00:00
Daniel Dunbar
11a8b6c4ff Revert "Re-enable test and hope to silence the buildbots", still broken. 
llvm-svn: 127369
 2011-03-09 22:48:46 +00:00
Evan Cheng
b717770dfe Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more 
flexible.

If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.

llvm-svn: 127368
 2011-03-09 22:47:38 +00:00
Benjamin Kramer
8313cf1cf4 Fix mistyped CHECK lines. 
llvm-svn: 127366
 2011-03-09 22:07:31 +00:00
Benjamin Kramer
f1c1220d8f Fix a pasto that broke all x86_64-elf targets. 
llvm-svn: 127365
 2011-03-09 22:07:13 +00:00
Stuart Hastings
6c99b422b1 Tweak test to work on Linux. 
llvm-svn: 127364
 2011-03-09 21:35:10 +00:00
Stuart Hastings
5c555821bb Disable this test temporarily to reduce BuildBot complaints. 
llvm-svn: 127363
 2011-03-09 21:33:47 +00:00
Devang Patel
7a4edc6463 Preserve line number information while simplifying libcalls. 
llvm-svn: 127362
 2011-03-09 21:27:52 +00:00
Stuart Hastings
61f9a3dab2 X86 byval copies no longer always_inline. <rdar://problem/8706628> 
llvm-svn: 127359
 2011-03-09 21:10:30 +00:00
Bruno Cardoso Lopes
f34376b0e1 Add a testcase for the addc improvements introduced some commits ago. Patch by Akira Hatanaka 
llvm-svn: 127358
 2011-03-09 21:05:32 +00:00
Bruno Cardoso Lopes
51df3638f8 Re-enable test and hope to silence the buildbots 
llvm-svn: 127357
 2011-03-09 21:00:16 +00:00
Bruno Cardoso Lopes
64f0169989 try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka. 
llvm-svn: 127356
 2011-03-09 20:59:05 +00:00
Johnny Chen
6bf5d7a170 LLVM combines the offset mode of A8.6.199 A1 & A2 into STRBT. 
The insufficient encoding information of the combined instruction confuses the decoder wrt
UQADD16.  Add extra logic to recover from that.

Fixed an assert reported by Sean Callanan

llvm-svn: 127354
 2011-03-09 20:01:14 +00:00
Eric Christopher
f99de77b19 Make these options hidden to reduce the amount of text -help puts on the 
command line, they'll still be seen with -help-hidden.

llvm-svn: 127353
 2011-03-09 19:46:51 +00:00
Devang Patel
c969bd2ff1 These llvm.dbg.* constants are not used anymore. 
llvm-svn: 127352
 2011-03-09 19:41:33 +00:00
Jakob Stoklund Olesen
4d0c9d0af7 Make physreg coalescing independent on the number of uses of the virtual register. 
The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.

The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.

Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.

llvm-svn: 127351
 2011-03-09 19:27:06 +00:00
Jakob Stoklund Olesen
10d5d5d25c Delete a test case that is very sensitive to coalescer behavior. 
The test is derived from an old miscompilation of
MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not
losing coverage.

llvm-svn: 127350
 2011-03-09 19:27:02 +00:00
Bruno Cardoso Lopes
88bef593d8 Improve varags handling, with testcases. Patch by Sasa Stankovic 
llvm-svn: 127349
 2011-03-09 19:22:22 +00:00
Andrew Trick
0b0002dfba This test case should work with list-ilp or list-burr. 
llvm-svn: 127348
 2011-03-09 19:17:10 +00:00
Andrew Trick
e529ddb2d7 Improve pre-RA-sched register pressure tracking for duplicate operands. 
This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks

llvm-svn: 127347
 2011-03-09 19:12:43 +00:00
Jan Sjödin
c7c66d9f88 Add createELFObjectTargetWriter method to TargetAsmBackend, which enables construction of non-standard ELFObjectWriters that can be used in MCJIT. 
llvm-svn: 127346
 2011-03-09 18:44:41 +00:00
Jan Sjödin
c2e23ec55c Missing file from previous commmit (127341) for InitializeTargetAsmParser function. 
llvm-svn: 127345
 2011-03-09 18:36:40 +00:00