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11648 Commits

Author SHA1 Message Date
Daniel Dunbar
ca38bc510e Add virtual printMCInst method to AsmPrinter, as a quick way to expose the API 
to print one instruction.

llvm-svn: 78985
 2009-08-14 03:43:57 +00:00
Daniel Dunbar
b0adbe646d Add X86 instruction printer support for printing MCValue operands. 
llvm-svn: 78984
 2009-08-14 03:42:12 +00:00
Evan Cheng
45d6a21e21 Shrink ADR and LDR from constantpool late during constantpool island pass. 
llvm-svn: 78970
 2009-08-14 00:32:16 +00:00
Evan Cheng
22969c64d0 New entry. 
llvm-svn: 78968
 2009-08-14 00:16:47 +00:00
Dan Gohman
ba476a2945 Make these matching rules more strict so that they don't 
accidentally match unrelated things.

llvm-svn: 78966
 2009-08-14 00:10:19 +00:00
Daniel Dunbar
eab68eaec4 TargetRegistry: Change AsmPrinter constructor to be typed as returning an 
AsmPrinter instance (instead of just a FunctionPass)

llvm-svn: 78962
 2009-08-13 23:48:47 +00:00
Bruno Cardoso Lopes
98ffbd5041 Remove HasCrazyBSS and add a flag in TAI to indicate that '.section' 
must be emitted for PowerPC-Linux '.bss' section

llvm-svn: 78958
 2009-08-13 23:30:21 +00:00
Owen Anderson
9df206d02d Push LLVMContexts through the IntegerType APIs. 
llvm-svn: 78948
 2009-08-13 21:58:54 +00:00
Daniel Dunbar
62eec42595 TargetRegistry: Reorganize AsmPrinter construction so that clients pass in the 
TargetAsmInfo. This eliminates a dependency on TargetMachine.h from
TargetRegistry.h, which technically was a layering violation.
 - Clients probably can only sensibly pass in the same TargetAsmInfo as the
   TargetMachine has, but there are only limited clients of this API.

llvm-svn: 78928
 2009-08-13 19:38:51 +00:00
Daniel Dunbar
854120b114 Reapply pieces of 78914 reverted in 78916, this has been fixed. 
llvm-svn: 78921
 2009-08-13 17:08:54 +00:00
Daniel Dunbar
40f904fcfb Revert 78892 and 78895, these break generating working executables on 
x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp

llvm-svn: 78919
 2009-08-13 17:03:38 +00:00
Jim Grosbach
361b7db9bd Add missing defs of R2 and D1. 
llvm-svn: 78918
 2009-08-13 16:59:44 +00:00
Daniel Dunbar
42cd283c34 Remove obsoleted files (from AsmPrinter move) 
llvm-svn: 78917
 2009-08-13 16:57:03 +00:00
Owen Anderson
99061befb3 Revert r78914, as it was breaking the build. 
llvm-svn: 78916
 2009-08-13 16:54:39 +00:00
Sanjiv Gupta
fd1ffc19f9 Move PIC16 AsmPrinter to PIC16/AsmPrinter directory. 
Remove CooperTargetMachine, as currently only one is supported.

llvm-svn: 78914
 2009-08-13 16:37:05 +00:00
David Goodwin
dd797db6bd Finalize itineraries for cortex-a8 integer multiply 
llvm-svn: 78908
 2009-08-13 15:51:13 +00:00
Jim Grosbach
6511e74282 Remove unnecessary newline 
llvm-svn: 78905
 2009-08-13 15:12:16 +00:00
Jim Grosbach
aba7f6b60b Correct comment wording 
llvm-svn: 78904
 2009-08-13 15:11:43 +00:00
Chris Lattner
4cebf6ca28 reintroduce support for Mips "small" section handling. This is 
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.

llvm-svn: 78900
 2009-08-13 06:28:06 +00:00
Evan Cheng
8bfaf895e5 tPOP_RET now has predicate operands. 
llvm-svn: 78898
 2009-08-13 06:05:07 +00:00
Bob Wilson
e3eedf3cd2 Add a fixme message about canonicalizing floating-point vector types. 
llvm-svn: 78897
 2009-08-13 06:01:30 +00:00
Bob Wilson
8cb7da85e3 Revert r78852 for now. I want to do this differently, but I don't have time 
to fix it tonight.

llvm-svn: 78896
 2009-08-13 05:58:56 +00:00
Chris Lattner
696f1d8318 fix typo, add 10.6 version of test for my previous patch. 
llvm-svn: 78895
 2009-08-13 05:43:33 +00:00
Chris Lattner
fa4858791d Restore some "small section" support code, reverting my patch from r76936. 
llvm-svn: 78894
 2009-08-13 05:41:27 +00:00
Evan Cheng
309650d7ba It's ok to spill a tGPR register as long as it's still allocated a low register. 
llvm-svn: 78893
 2009-08-13 05:40:51 +00:00
Chris Lattner
4df533ba16 fix a minor fixme. When building with SL and later tools, the ".eh" symbols 
don't need to be exported from the .o files.

llvm-svn: 78892
 2009-08-13 05:30:22 +00:00
Bruno Cardoso Lopes
f2855aabec Change MCSectionELF to represent a section semantically instead of 
syntactically as a string, very similiar to what Chris did with MachO.
The parsing support and validation is not introduced yet.

llvm-svn: 78890
 2009-08-13 05:07:35 +00:00
Bob Wilson
2940b8e9a5 Add a comment to describe why vector shuffles are legalized to custom DAG nodes. 
llvm-svn: 78884
 2009-08-13 02:13:04 +00:00
Bob Wilson
11ee30bdc8 Use cast<> instead of dyn_cast<> in places where the type is known. 
llvm-svn: 78881
 2009-08-13 01:57:47 +00:00
Dan Gohman
4b9cae5af3 Various AsmWriter output cleanups. Use WriteAsOperand instead of 
PrintUnmangledNameSafely.

llvm-svn: 78878
 2009-08-13 01:36:44 +00:00
Chris Lattner
04f74d3510 sink uniquing of sections out of MCContext into the ELF and PECOFF TLOF implementations. 
MCContext no longer maintains a string -> section map.

llvm-svn: 78874
 2009-08-13 00:37:15 +00:00
Dale Johannesen
0e41973cf4 Symbols with LinkerPrivateLinkage are weak. 
This allows WebKit to build again.

llvm-svn: 78872
 2009-08-13 00:28:52 +00:00
Chris Lattner
bd02c60d9e make PIC16 unique its own sections instead of having mcontext do it. 
llvm-svn: 78871
 2009-08-13 00:26:52 +00:00
Chris Lattner
7ead5b498b add some comments: MCContext owns the MCSections, but it bump pointer allocates 
them, so it doesn't have to explicitly free them.

llvm-svn: 78870
 2009-08-13 00:21:53 +00:00
Chris Lattner
52e6d663b3 reject invalid code like: 
int x __attribute__((section("_foo, _bar"))) = 4;
int y __attribute__((section("_foo, _bar, 4byte_literals"))) = 1;

llvm-svn: 78867
 2009-08-13 00:05:07 +00:00
Chris Lattner
4c9dae455e implement support for uniquing MachO sections. 
llvm-svn: 78866
 2009-08-12 23:55:02 +00:00
Chris Lattner
456301c2cd some compiler don't get string from TLOF.h implicitly or something. 
llvm-svn: 78864
 2009-08-12 23:53:59 +00:00
Chris Lattner
7eeb032b37 reduce #includage 
llvm-svn: 78860
 2009-08-12 23:34:27 +00:00
Bob Wilson
b089d07a1f Recognize Neon VDUP shuffles during legalization instead of selection. 
llvm-svn: 78852
 2009-08-12 22:54:19 +00:00
Bob Wilson
d8b7ca4c28 Recognize Neon VREV shuffles during legalization instead of selection. 
llvm-svn: 78850
 2009-08-12 22:31:50 +00:00
Dan Gohman
bc6b14ba00 This void is implicit in C++. 
llvm-svn: 78848
 2009-08-12 22:10:57 +00:00
Bob Wilson
0cf2be2466 Generate Neon VTBL and VTBX instructions from the corresponding intrinsics. 
llvm-svn: 78835
 2009-08-12 20:51:55 +00:00
Dan Gohman
61b163ccdc Use PadToColumn instead of tabs. 
llvm-svn: 78834
 2009-08-12 18:55:32 +00:00
Evan Cheng
9199f62b3d PredCC is meant to be 2 bits wide, like PredCC1. 
llvm-svn: 78829
 2009-08-12 18:35:50 +00:00
David Goodwin
90e7f9873c Enhance the InstrStage object to enable the specification of an Itinerary with overlapping stages. The default is to maintain the current behavior that the "next" stage immediately follows the previous one. 
llvm-svn: 78827
 2009-08-12 18:31:53 +00:00
Jim Grosbach
74c682dde4 Add catch block handling to SjLj exception handling. 
llvm-svn: 78817
 2009-08-12 17:38:44 +00:00
Bob Wilson
61f35e39cf Fix TableGen warnings. This partly reverts my previous change to this file, 
leaving the mayLoad and mayStore settings around only the load/store
instructions where those can't be inferred from the patterns.

llvm-svn: 78815
 2009-08-12 17:04:56 +00:00
Chris Lattner
736c853143 change CBE to just get TAI now, instead of TM to get TAI. 
llvm-svn: 78813
 2009-08-12 16:41:44 +00:00
Dan Gohman
00ee3a9a1a Transform -X/C to X/-C, implementing a README.txt entry. 
llvm-svn: 78812
 2009-08-12 16:37:02 +00:00
Oscar Fuentes
b153643da2 CMake: Added asm file to x86_64 MSVC build. 
llvm-svn: 78807
 2009-08-12 15:54:28 +00:00
Jim Grosbach
77d5653945 register naming cleanup (s/ip/r12/) 
llvm-svn: 78806
 2009-08-12 15:21:13 +00:00
Chris Lattner
55df534293 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple 
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
 2009-08-12 07:22:17 +00:00
Jakob Stoklund Olesen
7ec5ee575e Move immediate constant predicate templates from the Blackfin target to MathExtras.h 
llvm-svn: 78793
 2009-08-12 06:22:07 +00:00
Evan Cheng
c369ccbe83 Shrink Thumb2 movcc instructions. 
llvm-svn: 78790
 2009-08-12 05:17:19 +00:00
Evan Cheng
bb24fe8602 Remove another Darwin assembler workaround. 
llvm-svn: 78779
 2009-08-12 02:07:19 +00:00
Evan Cheng
410447e028 80 col violation. 
llvm-svn: 78778
 2009-08-12 02:03:03 +00:00
Evan Cheng
9302c40108 Remove an Darwin assembler workaround. 
llvm-svn: 78777
 2009-08-12 01:56:42 +00:00
Evan Cheng
65f3e466df Shrink ADDS, ADC, RSB, and SUBS. 
llvm-svn: 78776
 2009-08-12 01:49:45 +00:00
Bob Wilson
00d605d359 Add missing chain operands for VLD* and VST* instructions. 
Set "mayLoad" and "mayStore" on the load/store instructions.

llvm-svn: 78761
 2009-08-12 00:49:01 +00:00
Owen Anderson
dbf9a912fb Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first. 
llvm-svn: 78759
 2009-08-12 00:36:31 +00:00
Chris Lattner
0624ad99f0 prune #include 
llvm-svn: 78749
 2009-08-11 23:07:27 +00:00
Chris Lattner
70cdd11e1c prune #includage. 
llvm-svn: 78748
 2009-08-11 23:06:16 +00:00
Chris Lattner
57aca57c35 fix CodeGen/PowerPC/2007-01-15-AsmDialect.ll, fallout from r78742 
llvm-svn: 78747
 2009-08-11 23:03:40 +00:00
Chris Lattner
c2a229453e change the -x86-asm-syntax=intel/att flag to be in X86TAI 
instead of X86 Subtarget.  This elimianates dependencies on
X86Subtarget from X86TAI.

llvm-svn: 78746
 2009-08-11 23:01:09 +00:00
Evan Cheng
a29ee9f509 Shrinkify Thumb2 r = add sp, imm. 
llvm-svn: 78745
 2009-08-11 23:00:31 +00:00
Chris Lattner
d45aa1bcf1 second half of commit. 
llvm-svn: 78744
 2009-08-11 22:52:15 +00:00
Chris Lattner
dfc686541d pass "is64Bit" flag into PPC TAI ctors instead of a whole targetmachine. 
llvm-svn: 78743
 2009-08-11 22:51:34 +00:00
Chris Lattner
0ff895cd83 eliminate asmflavor from subtarget, PPCTAI is the only client 
and each callee knows that it returns.

llvm-svn: 78742
 2009-08-11 22:49:34 +00:00
Chris Lattner
a74023896f Change the asmprinter to print the comment character before the 
"inlineasmstart/end" strings so that the contents of the directive
are separate from the comment character.  This lets elf targets
get #APP/#NOAPP for free even if they don't use "#" as the comment
character.  This also allows hoisting the darwin stuff up to the
shared TAI class.

llvm-svn: 78737
 2009-08-11 22:39:40 +00:00
David Goodwin
2686178489 Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter. 
llvm-svn: 78736
 2009-08-11 22:38:43 +00:00
Chris Lattner
f27d5f6662 factorize more darwin TAI stuff. Note that this gives 
darwin/arm support for .no_dead_strip

llvm-svn: 78734
 2009-08-11 22:31:42 +00:00
Daniel Dunbar
514498ccec X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm, FS_MOV32rm as codegen only. 
llvm-svn: 78733
 2009-08-11 22:24:40 +00:00
Chris Lattner
7015f75b6a factorize darwin ProtectedDirective and SetDirective. 
llvm-svn: 78732
 2009-08-11 22:22:44 +00:00
Daniel Dunbar
63f93255ae Add 'isCodeGenOnly' bit to Instruction .td records. 
- Used to mark fake instructions which don't correspond to an actual machine
   instruction (or are duplicates of a real instruction). This is to be used for
   "special cases" in the .td files, which should be ignored by things like the
   assembler and disassembler. We still need a good solution to handle pervasive
   duplication, like with the Int_ instructions.

 - Set the bit on fake "mov 0" style instructions, which allows turning an
   assembler matcher warning into a hard error.

 - -2 FIXMEs.

llvm-svn: 78731
 2009-08-11 22:17:52 +00:00
Chris Lattner
bf7a1a3e38 all darwin targets have .space and .zerofill, pull up. 
llvm-svn: 78730
 2009-08-11 22:17:31 +00:00
Chris Lattner
44a2fda8c1 eliminate template from arm TAI 
llvm-svn: 78729
 2009-08-11 22:14:59 +00:00
Chris Lattner
b460bd4895 fix a bug I introduced in r78724 that caused failures in: 
CodeGen/X86/dll-linkage.ll & CodeGen/X86/mingw-alloca.ll

llvm-svn: 78728
 2009-08-11 22:12:58 +00:00
Chris Lattner
8c7eb509d3 move LCOMMDirective = "\t.lcomm\t" up to DarwinTAI, eliminate 
template in PPC backend for TAI.

llvm-svn: 78727
 2009-08-11 22:06:07 +00:00
Owen Anderson
75ebfc8728 Fix warnings. 
llvm-svn: 78725
 2009-08-11 21:59:30 +00:00
Chris Lattner
05bde58b5e eliminate the X86TargetAsmInfo template. 
llvm-svn: 78724
 2009-08-11 21:57:08 +00:00
Sean Callanan
b2288f269b Added ADD instructions with rAX as one parameter to the Intel instruction 
tables.

llvm-svn: 78721
 2009-08-11 21:26:06 +00:00
Evan Cheng
783028063e Shrinkify Thumb2 load / store multiple instructions. 
llvm-svn: 78717
 2009-08-11 21:11:32 +00:00
Daniel Dunbar
186ba504b3 llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will be 
used to strip hard coded comments out of .td assembly strings.

llvm-svn: 78716
 2009-08-11 20:59:47 +00:00
Owen Anderson
48f2f0ae72 Split EVT into MVT and EVT, the former representing _just_ a primitive type, while 
the latter is capable of representing either a primitive or an extended type.

llvm-svn: 78713
 2009-08-11 20:47:22 +00:00
Chris Lattner
30d9c39337 pass the TargetTriple down from each target ctor to the 
LLVMTargetMachine ctor.  It is currently unused.

llvm-svn: 78711
 2009-08-11 20:42:37 +00:00
Chris Lattner
40af6d5199 now that JumpTableDirective can differentate picness itself, MIPS TAI 
no longer needs a targetmachine to initialize itself.

llvm-svn: 78710
 2009-08-11 20:32:51 +00:00
Chris Lattner
45bdc96988 split "JumpTableDirective" (an existing hack) into a PIC and nonPIC 
version.  This allows TAI implementations to specify the directive to use
based on the mode being codegen'd for.

The real fix for this is to remove JumpTableDirective, but I don't feel
like diving into the jumptable snarl just now.

llvm-svn: 78709
 2009-08-11 20:30:58 +00:00
Jim Grosbach
67841ae0a8 Add Thumb2 eh_sjlj_setjmp implementation 
llvm-svn: 78701
 2009-08-11 19:42:21 +00:00
Jim Grosbach
c80da41574 fix GetInstSizeInBytes for eh_sjlj_setjmp 
llvm-svn: 78683
 2009-08-11 17:08:15 +00:00
Chris Lattner
edb3daa5e9 move some 32-bit instrs to x86instrinfo.td 
llvm-svn: 78680
 2009-08-11 16:58:39 +00:00
Benjamin Kramer
0481803d2a This void is implicit in C++. 
llvm-svn: 78678
 2009-08-11 16:03:08 +00:00
Dan Gohman
24939b2c4f Tidy #includes. 
llvm-svn: 78677
 2009-08-11 16:02:12 +00:00
Dan Gohman
9fbdb3de0d Simplify this code. The case where one class is GR64RegClass and the 
other is a subclass of it is effectively handled by the prior tests.

llvm-svn: 78676
 2009-08-11 15:59:48 +00:00
Jim Grosbach
3c898a99bd Whitespace cleanup. Remove trailing whitespace. 
llvm-svn: 78666
 2009-08-11 15:33:49 +00:00
Jim Grosbach
d5fc7e81b2 Move ~ARMConstantPoolValue() to the .cpp file to avoid needing to include <cstdlib> in the header. 
llvm-svn: 78665
 2009-08-11 15:26:27 +00:00
Evan Cheng
249f07cf57 Fix the previous accidental commit. Now shrinking common Thumb2 load / store instructions. 
llvm-svn: 78659
 2009-08-11 09:37:40 +00:00
Evan Cheng
434a66fa9b Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form to 
match base only address, i.e. [r] since Thumb2 requires a offset register field.
For those, use [r + imm12] where the immediate is zero.
Note the generated assembly code does not look any different after the patch.
But the bug would have broken the JIT (if there is Thumb2 support) and it can
break later passes which expect the address mode to be well-formed.

llvm-svn: 78658
 2009-08-11 08:52:18 +00:00
Evan Cheng
9fdf9b4435 80 column violation. 
llvm-svn: 78657
 2009-08-11 08:47:46 +00:00
Evan Cheng
766c076bea Cosmetic changes. 
llvm-svn: 78655
 2009-08-11 07:36:14 +00:00
Evan Cheng
dbccf353d1 Adding a blank line back. 
llvm-svn: 78654
 2009-08-11 07:32:58 +00:00
Bob Wilson
d64e304671 Use vAny type to get rid of Neon intrinsics that differed only in whether 
the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.

If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.

llvm-svn: 78646
 2009-08-11 05:39:44 +00:00
Daniel Dunbar
4e0d543e35 llvm-mc/X86: Parse '*' correctly (in the way the matcher expects). 
llvm-svn: 78642
 2009-08-11 05:00:25 +00:00
Sanjiv Gupta
239a8992f6 Fixed more problems caused by 78142. 
Passing of indirect arguments starts after return value on the callee's frame.

llvm-svn: 78635
 2009-08-11 01:51:55 +00:00
Bob Wilson
1c75a23299 Use new EVT::vAny type to combine Neon intrinsics for VPADD. 
llvm-svn: 78632
 2009-08-11 01:15:26 +00:00
Sean Callanan
b6295e7143 Added the x86 INT instructions; both the special-case INT 3 and the general-case 
INT i8.  These instructions are only for interpretation by disassemblers, not
for emission, so they do not as yet have patterns.

llvm-svn: 78630
 2009-08-11 01:09:06 +00:00
David Goodwin
8ca187462c Fix bug in NEON convert for single-precision FP. This also fixes the tblgen warnings. 
llvm-svn: 78629
 2009-08-11 01:07:38 +00:00
Jim Grosbach
c2fd915309 Add stdlib.h 
llvm-svn: 78627
 2009-08-11 00:20:00 +00:00
Jim Grosbach
c9a1dd9291 SjLj based exception handling unwinding support. This patch is nasty, brutish 
and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.

llvm-svn: 78625
 2009-08-11 00:09:57 +00:00
Evan Cheng
49aac700f4 Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck. 
llvm-svn: 78622
 2009-08-10 23:56:04 +00:00
Dan Gohman
888bcd3483 Fix a bug where DAGCombine was producing an illegal ConstantFP 
node after legalize, and remove the workaround code from the
ARM backend.

llvm-svn: 78615
 2009-08-10 23:15:10 +00:00
Owen Anderson
b4bce99769 Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. 
llvm-svn: 78610
 2009-08-10 22:56:29 +00:00
Eric Christopher
e1bfb18ec3 Whitespace, 80-column, and isTwoAddress -> Constraints = "" changes. 
No functional change.

llvm-svn: 78608
 2009-08-10 22:37:37 +00:00
David Goodwin
36a5b02e4f Use NEON for single-precision int<->FP conversions. 
llvm-svn: 78604
 2009-08-10 22:17:39 +00:00
Devang Patel
d56797d16f Do not rely on magic "llvm.dbg.*" global variable name to find debug info. 
PIC16 developers, please verify. 

llvm-svn: 78603
 2009-08-10 22:11:20 +00:00
Eric Christopher
88514e18ca Fix up whitespace, remove commented out code. 
llvm-svn: 78600
 2009-08-10 21:48:58 +00:00
Daniel Dunbar
1ff8dc01aa llvm-mc/AsmParser: Disambiguate i64i8imm. 
llvm-svn: 78598
 2009-08-10 21:06:41 +00:00
Daniel Dunbar
15c79b6fd7 llvm-mc/AsmParser: Allow .td users to redefine the names of the methods to call 
on target specific operands for testing class membership and converting to
MCInst operands.

llvm-svn: 78597
 2009-08-10 21:00:45 +00:00
Owen Anderson
30bf6c8dab SimpleValueType-ify a few more methods on TargetLowering. 
llvm-svn: 78595
 2009-08-10 20:46:15 +00:00
Evan Cheng
f0bb0f5204 Handle the constantfp created during post-legalization dag combiner phase. 
llvm-svn: 78594
 2009-08-10 20:25:59 +00:00
Owen Anderson
cf56d576eb Continue the SimpleValueType-ification. 
llvm-svn: 78593
 2009-08-10 20:18:46 +00:00
Daniel Dunbar
20829b121a llvm-mc/AsmMatcher: Fix thinko, Mem isn't a subclass of Imm. 
llvm-svn: 78587
 2009-08-10 19:08:02 +00:00
Owen Anderson
dcb47bda67 Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future. 
llvm-svn: 78584
 2009-08-10 18:56:59 +00:00
Daniel Dunbar
749ff1de5a llvm-mc/AsmMatcher: Change assembler parser match classes to their own record 
structure.

llvm-svn: 78581
 2009-08-10 18:41:10 +00:00
Chris Lattner
3e6da637f6 split MachO section handling stuff out to its out .h/.cpp file. 
llvm-svn: 78576
 2009-08-10 18:15:01 +00:00
Chris Lattner
7abff8fdb4 arm only needs to emit one .align directive for hidden nlp's, not one 
per pointer.

llvm-svn: 78574
 2009-08-10 18:02:16 +00:00
Chris Lattner
b89551026b make sure that arm nonlazypointers are aligned properly 
llvm-svn: 78573
 2009-08-10 18:01:34 +00:00
Chris Lattner
49b8a24b7e Fix a weird ppc64-specific link error during an llvm-gcc build: 
ld: bad offset (0x00000091) for lo14 instruction pic-base fix-up in ___popcountdi2 from libgcc/./_popcountsi2_s.o

The problem is that the non lazy symbol pointers need to be 8 byte aligned
on ppc64 and .section doesn't have an implicit alignment like ".non_lazy_symbol_pointer"
does.

llvm-svn: 78572
 2009-08-10 17:58:51 +00:00
Chris Lattner
7ee4b3a2c0 fix some warnings for the MSVC build, by Yonggang Luo! 
llvm-svn: 78571
 2009-08-10 17:35:42 +00:00
David Goodwin
b2f53ed68a Checkpoint scheduling itinerary changes. 
llvm-svn: 78564
 2009-08-10 15:56:13 +00:00
Evan Cheng
0a08d1bb9c Watch out for empty BB. 
llvm-svn: 78562
 2009-08-10 08:10:13 +00:00
Evan Cheng
1ecffadc8d rev, rev16, and revsh do not set CPSR. 
llvm-svn: 78561
 2009-08-10 07:58:45 +00:00
Evan Cheng
87030de948 Duh. Most 16-bit Thumb rr instructions are two-address. Fix table. 
llvm-svn: 78560
 2009-08-10 07:20:37 +00:00
Evan Cheng
e76bc4a520 CPSR can be livein; transfer predicate operands correctly; tMUL is two-address. 
llvm-svn: 78559
 2009-08-10 06:57:42 +00:00
Evan Cheng
b0a0b99918 Add support for folding loads / stores into 16-bit moves used by Thumb2. 
llvm-svn: 78558
 2009-08-10 06:32:05 +00:00
Evan Cheng
b05ad1d066 80 col violation. 
llvm-svn: 78557
 2009-08-10 05:51:48 +00:00
Evan Cheng
f54e50e4e8 Use tMOVgpr2gpr instead of t2MOVr. 
llvm-svn: 78556
 2009-08-10 05:49:43 +00:00
Evan Cheng
ad380aa97a Add support to reduce most of 32-bit Thumb2 arithmetic instructions. 
llvm-svn: 78550
 2009-08-10 02:37:24 +00:00
Evan Cheng
09cacea9fb Always use the 16-bit tMOVgpr2gpr instead of the 32-bit t2MOVr. 
llvm-svn: 78549
 2009-08-10 02:06:53 +00:00
Chris Lattner
cc70d578be Make the big switch: Change MCSectionMachO to represent a section *semantically* 
instead of syntactically as a string.  This means that it keeps track of the 
segment, section, flags, etc directly and asmprints them in the right format.
This also includes parsing and validation support for llvm-mc and 
"attribute(section)", so we should now start getting errors about invalid 
section attributes from the compiler instead of the assembler on darwin.

Still todo: 
1) Uniquing of darwin mcsections
2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h]
3) there are a few FIXMEs, for example what is the syntax to get the
   S_GB_ZEROFILL segment type?

llvm-svn: 78547
 2009-08-10 01:39:42 +00:00
Benjamin Kramer
259a140521 Use abs64 instead abs; some platforms don't have a 64-bit abs overload. Noticed by Yonggang Luo! 
llvm-svn: 78543
 2009-08-09 22:37:07 +00:00
Evan Cheng
390e1927bf Add support to convert 32-bit instructions to 16-bit non-two-address ones. 
llvm-svn: 78540
 2009-08-09 19:17:19 +00:00
Daniel Dunbar
15e6a41728 llvm-mc/AsmParser: Implement user defined super classes. 
- We can now discriminate SUB32ri8 from SUB32ri, for example.

llvm-svn: 78530
 2009-08-09 07:20:21 +00:00
Daniel Dunbar
5a6c69d37d Extend comment on ParserMatchClass .td field, and add some missing 
classes for X86.

llvm-svn: 78524
 2009-08-09 06:00:04 +00:00
Daniel Dunbar
dff8502076 llvm-mc/AsmParser: Define match classes in the .td file. 
-2 FIXMEs.

llvm-svn: 78523
 2009-08-09 05:18:30 +00:00
Chris Lattner
9e2c3aa666 sink the 'name' and 'isdirective' state out of MCSection into its derived classes. 
This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)

llvm-svn: 78517
 2009-08-08 23:39:42 +00:00
Anton Korobeynikov
44fa9f179c Use subclassing to print lane-like immediates (w/o hash) eliminating 
'no_hash' modifier. Hopefully this will make Daniel happy :)

llvm-svn: 78514
 2009-08-08 23:10:41 +00:00
Chris Lattner
df9c45048d add a note about dead zero extends. 
llvm-svn: 78511
 2009-08-08 22:46:59 +00:00
Chris Lattner
2849883bd5 1. Make MCSection an abstract class. 
2. Move section switch printing to MCSection virtual method which takes a
   TAI.  This eliminates textual formatting stuff from TLOF.
3. Eliminate SwitchToSectionDirective, getSectionFlagsAsString, and 
   TLOFELF::AtIsCommentChar.

llvm-svn: 78510
 2009-08-08 22:41:53 +00:00
Eric Christopher
40031ed766 Add crc32 instruction and intrinsics. Add a new class of prefix 
bytes for F2 0F 38 and propagate. Add a FIXME for a set
of possibilities which correspond to intrinsics already used.

New test.

llvm-svn: 78508
 2009-08-08 21:55:08 +00:00
Jakob Stoklund Olesen
ed8219b3a1 Add support for READCYCLECOUNTER in Blackfin back-end. 
llvm-svn: 78506
 2009-08-08 21:42:22 +00:00
Chris Lattner
8329a281b2 add new PIC16Section class, this time hopefully not breaking the build :) 
llvm-svn: 78505
 2009-08-08 21:37:01 +00:00
Daniel Dunbar
246602757e llvm-mc/AsmMatcher: Switch token matching to use the new string matcher. 
Also, redefined MatchRegisterName to just return the register value or a
sentinel, to simplify the generated code.

llvm-svn: 78504
 2009-08-08 21:22:41 +00:00
Daniel Dunbar
e5e5b0a1bd Revert r78501, it doesn't build. 
--- Reverse-merging r78501 into '.':
U    lib/Target/PIC16/PIC16TargetObjectFile.cpp
D    lib/Target/PIC16/PIC16Section.h

llvm-svn: 78503
 2009-08-08 21:12:40 +00:00
Chris Lattner
a9f2648ef6 make PIC16 create its own custom MCSection. 
llvm-svn: 78501
 2009-08-08 20:55:25 +00:00
Chris Lattner
53cc0d6439 make target-specific TLOF impls (except PIC16) create target-specific 
MCSection instances.

llvm-svn: 78500
 2009-08-08 20:52:13 +00:00
Chris Lattner
1c704ad33e eliminate TargetLoweringObjectFileSparc in favor of a TAI hook. 
A TAI hook is appropriate in this case because this is just an
asm syntax issue, not a semantic difference. TLOF should model
the semantics of the section.

llvm-svn: 78498
 2009-08-08 20:43:12 +00:00
Chris Lattner
0dabef30f5 give pic16 a target-specific section creation name too 
llvm-svn: 78496
 2009-08-08 20:23:47 +00:00
Chris Lattner
1e8ed03507 now that getOrCreateSection is all object-file specific, 
give the impls an object-file-specific name.  In the future
they can take different arguments etc.

llvm-svn: 78495
 2009-08-08 20:22:20 +00:00
Chris Lattner
637296415e sink getOrCreateSection down into all the object file implementations, 
now that they create *all* the sections.

llvm-svn: 78494
 2009-08-08 20:14:13 +00:00
Bruno Cardoso Lopes
c27b2ecf07 Use reloc_absolute_word_sext relocation for X86::MOV64(ri/mi)32 instructions, 
since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since 
it handles both word absolute relocations in the same way

llvm-svn: 78479
 2009-08-08 17:47:41 +00:00
Daniel Dunbar
63159fdd2c Update CMake 
llvm-svn: 78475
 2009-08-08 17:03:13 +00:00
Anton Korobeynikov
f8256ecbb5 Add insert_elt / extract_elt patterns for v4f32 stuff. 
Did anyone tests v4f32 ever?

llvm-svn: 78470
 2009-08-08 14:06:07 +00:00
Anton Korobeynikov
0471ef8dd6 Lane number should be printed w/o hash 
llvm-svn: 78469
 2009-08-08 14:05:53 +00:00
Anton Korobeynikov
ae22c37afb Use VLDM / VSTM to spill/reload 128-bit Neon registers 
llvm-svn: 78468
 2009-08-08 13:35:48 +00:00
Andrew Lenharth
aadd8cfa2f move this fp select into a pattern 
llvm-svn: 78464
 2009-08-08 12:49:07 +00:00
Daniel Dunbar
07d36a8194 llvm-mc/AsmMatcher: Improve match code. 
- This doesn't actually improve the algorithm (its still linear), but the
   generated (match) code is now fairly compact and table driven. Still need a
   generic string matcher.

 - The table still needs to be compressed, this is quite simple to do and should
   shrink it to under 16k.

 - This also simplifies and restructures the code to make the match classes more
   explicit, in anticipation of resolving ambiguities.

llvm-svn: 78461
 2009-08-08 07:50:56 +00:00
Bob Wilson
88fafd84ea Implement Neon VZIP and VUZP instructions. These are very similar to VTRN, 
so I generalized the class for VTRN in the .td file to handle all 3 of them.

llvm-svn: 78460
 2009-08-08 06:13:25 +00:00
Bob Wilson
935ee0c122 Implement Neon VTRN instructions. For now, anyway, these are selected 
directly from the intrinsics produced by the frontend.  If it is more
convenient to have a custom DAG node for using these to implement shuffles,
we can add that later.

llvm-svn: 78459
 2009-08-08 05:53:00 +00:00
Evan Cheng
d19807e327 Add a skeleton Thumb2 instruction size reduction pass. 
llvm-svn: 78456
 2009-08-08 03:21:23 +00:00
Evan Cheng
4046c75e96 Code refactoring. No functionality change. 
llvm-svn: 78455
 2009-08-08 03:20:32 +00:00
Evan Cheng
fb833354b6 tADDhirr should target GPR, not tGPR. 
llvm-svn: 78454
 2009-08-08 03:19:44 +00:00
Evan Cheng
fe745cba18 I can type. 
llvm-svn: 78453
 2009-08-08 02:54:37 +00:00
Chris Lattner
7bf6e40552 make printInstruction return void since its result is omitted. Make the 
error condition get trapped with an assert.

llvm-svn: 78449
 2009-08-08 01:32:19 +00:00
Chris Lattner
2fc10a4dd9 don't check the result of printInstruction anymore. 
llvm-svn: 78444
 2009-08-08 00:05:42 +00:00
Anton Korobeynikov
e02d21a125 Do not generate 32-bit call on win64 when imm does not fit 
llvm-svn: 78443
 2009-08-07 23:59:21 +00:00
David Goodwin
c0fe95d8ce Make NEON single-precision FP support the default for cortex-a8 (again). 
llvm-svn: 78430
 2009-08-07 23:32:33 +00:00
Chris Lattner
bdb5a03875 remove a bunch of now-dead crud from the asmprinter and TAI interfaces. 
llvm-svn: 78428
 2009-08-07 23:16:27 +00:00
Anton Korobeynikov
2dfb75ca36 Unbreak the stuff 
llvm-svn: 78425
 2009-08-07 22:51:13 +00:00
Andrew Lenharth
a2eec41e49 avoid this libcall with long inline expansion 
llvm-svn: 78420
 2009-08-07 22:37:20 +00:00
Anton Korobeynikov
9b52601704 2 more vdup.32 cases 
llvm-svn: 78419
 2009-08-07 22:36:50 +00:00
Evan Cheng
897663328b A big oops. Thumb1 default CC is a def of CPSR, not a use of CPSR. 
llvm-svn: 78418
 2009-08-07 22:36:37 +00:00
Bill Wendling
f9e384bab7 Reformatting of lines. Put multiple DEBUG statements under one DEBUG statement. 
llvm-svn: 78411
 2009-08-07 21:33:25 +00:00
Evan Cheng
2bdb247c12 Thumb2 32-bit ldm / stm needs .w suffix if submode is ia. 
llvm-svn: 78410
 2009-08-07 21:19:10 +00:00
Daniel Dunbar
ced1e5c532 llvm-mc/AsmMatcher: Tweaks in response to feedback. 
llvm-svn: 78404
 2009-08-07 20:33:39 +00:00
Evan Cheng
7a2e5ba404 This is done. 
llvm-svn: 78399
 2009-08-07 19:34:52 +00:00
Evan Cheng
9c51e8f1fa Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode. 
llvm-svn: 78398
 2009-08-07 19:34:35 +00:00
Evan Cheng
0dab4cc8a0 Fix support to use NEON for single precision fp math. 
llvm-svn: 78397
 2009-08-07 19:30:41 +00:00
Sanjiv Gupta
35b980d8ba Minor fixes to avoid using invalid debugloc. 
llvm-svn: 78383
 2009-08-07 11:00:02 +00:00
Benjamin Kramer
02c9c67820 Simplify code and avoid allocations. 
llvm-svn: 78382
 2009-08-07 10:42:28 +00:00
Daniel Dunbar
9385ba560a Improve disabling of X86 AsmMatcher. 
llvm-svn: 78381
 2009-08-07 09:06:38 +00:00
Daniel Dunbar
b66377bda2 Disable X86 AsmMatcher for now, it is causing gcc-4.0 to run out of memory on 
i386-apple-darwin9. This presumably will get fixed once the generated code
improves.

llvm-svn: 78379
 2009-08-07 08:45:03 +00:00
Daniel Dunbar
88ccb58384 llvm-mc/AsmMatcher: Move to a slightly more sane matching design. 
- Still not very sane, but a least its not 60k lines on X86. :)

 - In terms of correctness, currently some things are hard wired for X86, and we
   still don't properly resolve ambiguities (this is ignoring the instructions
   we don't even match due to funny .td stuff or other corner cases).

The high level changes:
 1. Represent tokens which are significant for matching explicitly as separate
    operands. This uniformly handles not only the instruction mnemonic, but
    also 'signficiant' syntax like the '*' in "call * ...".

 2. Separate the matching of operands to an instruction from the construction of
    the MCInst. In theory this can be done during matching, but since the number
    of variations is small I think it makes sense to decompose the problems.

 3. Improved a few of the mechanisms to at least successfully flatten / tokenize
    the assembly strings for PowerPC and ARM.

 4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
    moving towards for handling ambiguous instructions. The high-bit is to infer
    a partial ordering of the operand classes (and force the user to specify one
    if we can't) and use that to resolve ambiguities.

llvm-svn: 78378
 2009-08-07 08:26:05 +00:00
Evan Cheng
ece37695db Error out, rather than infinite looping, if constant island pass can't converge. 
llvm-svn: 78377
 2009-08-07 07:35:21 +00:00
Evan Cheng
5af3c8154b tBfar is bl, which clobbers LR. 
llvm-svn: 78370
 2009-08-07 05:45:07 +00:00
Sanjiv Gupta
1738d18060 Run memsel inserter just before emit assembly to avoid tinkering by other passes. 
llvm-svn: 78369
 2009-08-07 05:44:27 +00:00
Andrew Lenharth
8482b5a16a These should be expanded 
llvm-svn: 78365
 2009-08-07 02:17:44 +00:00
Dan Gohman
1c41d60c4a Fix a bunch of namespace pollution. 
llvm-svn: 78363
 2009-08-07 01:32:21 +00:00
Evan Cheng
48b49cf5b9 It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. 
This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time.

This fixes PR4659 and PR4682.

llvm-svn: 78361
 2009-08-07 00:34:42 +00:00
Nicolas Geoffray
0cd17db516 Output the new StructType constructor, which takes the context of the 
module as first argument.

llvm-svn: 78340
 2009-08-06 21:31:35 +00:00
Devang Patel
157f0b79c8 Use DebugInfoFinder 
llvm-svn: 78334
 2009-08-06 20:53:24 +00:00
Bob Wilson
bd7627b23e Implement Neon VST[234] operations. 
llvm-svn: 78330
 2009-08-06 18:47:44 +00:00
David Goodwin
3aafcc1dd2 Add parameter to pattern classes to enable an itinerary to be specified for instructions. For now just use the existing itineraries or NoItinerary. 
llvm-svn: 78321
 2009-08-06 16:52:47 +00:00
Chris Lattner
2d90fbe8be Fix several fixmes and clean up code by sinking *all* section 
creation activity into the target-specific subclasses of TLOF.
Before this, globals with explicit sections could be created by
the base class.

1. make getOrCreateSection protected, add a new getExplicitSectionGlobal
   pure virtual method to assign sections to globals with a specified
   section.
2. eliminate getSpecialCasedSectionGlobals, which is now PIC specific.
3. eliminate the getKindForNamedSection virtual method, which is
   now just a static method for ELF.
4. Add implementions of getExplicitSectionGlobal for ELF/PECOFF/Darwin/PIC16.
   They are now all detangled and understandable, woo! :)

llvm-svn: 78319
 2009-08-06 16:39:58 +00:00
Chris Lattner
affa6e37ef go through PIC16TargetObjectFile to make sections instead of 
creating them directly in the pic16 asmprinter.

llvm-svn: 78317
 2009-08-06 16:27:28 +00:00
Anton Korobeynikov
0c6314a3e2 We need to sext global addresses in kernel code model, not zext 
llvm-svn: 78299
 2009-08-06 11:23:24 +00:00
Dan Gohman
668a0ff5ef Fix a bug in x86's PreprocessForRMW logic that was exposed 
by aggressive chain operand optimization. UpdateNodeOperands
does not modify the node in place if it would result in
a node identical to an existing node.

llvm-svn: 78297
 2009-08-06 09:22:57 +00:00
Anton Korobeynikov
9232ddb6f2 Missed part of recent kernel codemodel tweaks 
llvm-svn: 78293
 2009-08-06 09:11:19 +00:00
Bob Wilson
905678ab37 Neon does not actually have VLD{234}.64 instructions. 
These operations will have to be synthesized from other instructions.

llvm-svn: 78263
 2009-08-06 00:24:27 +00:00
Bob Wilson
6ee52e0047 Add a new pre-allocation pass to assign adjacent registers for Neon instructions 
that have that constraint.  This is currently just assigning a fixed set of
registers, and it only handles VLDn for n=2,3,4 with DPR registers.
I'm going to expand it to handle more operations next; we can make it smarter
once everything is working correctly.

llvm-svn: 78256
 2009-08-05 23:12:45 +00:00
Anton Korobeynikov
8e6a142223 Better handle kernel code model. Also, generalize the things and fix one 
subtle bug with small code model.

llvm-svn: 78255
 2009-08-05 23:01:26 +00:00
Dan Gohman
2bce18dae9 Use GR32 for copies between GR32_NOSP and GR32_NOREX, as neither 
is a subset of the other, but both are subsets of GR32.

llvm-svn: 78250
 2009-08-05 22:18:26 +00:00
David Goodwin
6e4065d7c6 When using NEON for single-precision FP, the NEON result must be placed in D0-D15 as these are the only D registers with S subregs. Introduce a new regclass to represent D0-D15 and use it in the NEON single-precision FP patterns. 
llvm-svn: 78244
 2009-08-05 21:02:22 +00:00
Chris Lattner
8a74485e06 remove the 'DataSectionStartSuffix' and 'TextSectionStartSuffix' knobs. 
llvm-svn: 78242
 2009-08-05 20:49:52 +00:00
Anton Korobeynikov
7a0835dec5 Remove redundand checks: the only way to have, e.g. f32 RegVT is exactly 
hardfloat case.

llvm-svn: 78237
 2009-08-05 20:15:19 +00:00
Dan Gohman
892fcb1d57 hasSuperClass tests for a strict superset relation, rather than 
a superset relation. This code wants to test the regular superset
relation.

llvm-svn: 78236
 2009-08-05 20:13:45 +00:00
Anton Korobeynikov
7f9b6ff4a3 Unbreak the stuff, this is ugly, but we cannot do better for now with 'plain' C calling conv. 
llvm-svn: 78232
 2009-08-05 19:40:16 +00:00
Anton Korobeynikov
07ce0611d9 Missed pieces for ARM HardFP ABI. 
Patch by Sandeep Patel!

llvm-svn: 78225
 2009-08-05 19:04:42 +00:00
Andrew Lenharth
fe85ecc26b Use elf Object File directly 
llvm-svn: 78220
 2009-08-05 18:13:04 +00:00
Daniel Dunbar
3d2ac751da Remove some dead code. 
llvm-svn: 78219
 2009-08-05 18:12:37 +00:00
Dan Gohman
ac47a4b9ed Enable the new no-SP register classes by default. This is to address 
PR4572. A few tests have some minor code regressions due to different
coalescing.

llvm-svn: 78217
 2009-08-05 17:40:24 +00:00
Bob Wilson
c0e1bed13f Remove a redundant declaration. 
llvm-svn: 78216
 2009-08-05 17:39:44 +00:00
Anton Korobeynikov
81300620cf Convert bswap test to filecheck, add more test entries & convert stuff to filecheck 
llvm-svn: 78212
 2009-08-05 16:50:53 +00:00
Dan Gohman
dda3c89020 Fix a bug in the PIC16 backend. 
llvm-svn: 78211
 2009-08-05 16:46:43 +00:00
David Goodwin
9013115518 Disable NEON single-precision FP support for Cortex-A8, for now... 
llvm-svn: 78209
 2009-08-05 16:40:57 +00:00
Devang Patel
fde898c9f1 Remove dead code. MDNode and MDString are not Constant anymore. 
llvm-svn: 78207
 2009-08-05 16:40:02 +00:00
Anton Korobeynikov
c95b5fb0e5 Add memory versions of some instructions. 
Patch by Neale Ferguson!

llvm-svn: 78203
 2009-08-05 16:16:11 +00:00
David Goodwin
47064aa1c6 By default, for cortex-a8 use NEON for single-precision FP. 
llvm-svn: 78200
 2009-08-05 16:01:19 +00:00
Anton Korobeynikov
27fdf43425 Special constants as destinations does not work as expected - drop the patterns. 
llvm-svn: 78191
 2009-08-05 14:42:00 +00:00
Andrew Lenharth
1c03c3e158 Alpha: Get section directives right 
llvm-svn: 78189
 2009-08-05 13:59:57 +00:00
Anton Korobeynikov
021f465fb5 Cleanup in dbg_stoppoint handling in CBE. Patch by Sandeep Patel. 
llvm-svn: 78182
 2009-08-05 09:31:40 +00:00
Anton Korobeynikov
0b9020497c Minor arm CBE fixes. Patch by Sandeep. 
llvm-svn: 78181
 2009-08-05 09:31:07 +00:00
Anton Korobeynikov
f2b8211265 Emit module-level inline asm for CBE. 
Patch by Sandeep Patel

llvm-svn: 78180
 2009-08-05 09:29:56 +00:00
Bruno Cardoso Lopes
2ae97a2777 - Remove custom handling of jumptables by the elf writter (this was 
a dirty hack and isn't need anymore since the last x86 code emitter patch)
- Add a target-dependent modifier to addend calculation
- Use R_X86_64_32S relocation for X86::reloc_absolute_word_sext
- Use getELFSectionFlags whenever possible
- fix getTextSection to use TLOF and emit the right text section 
- Handle global emission for static ctors, dtors and Type::PointerTyID
- Some minor fixes

llvm-svn: 78176
 2009-08-05 06:57:03 +00:00
Evan Cheng
a27fac5075 80 col violations. 
llvm-svn: 78175
 2009-08-05 06:41:25 +00:00
Dan Gohman
1110fb6bbd Teach X86FastISel how to handle CCValAssign::BCvt, which is used for 
MMX arguments. This fixes PR4684.

llvm-svn: 78163
 2009-08-05 05:33:42 +00:00
Chris Lattner
19d238562d Clarify common linkage and the requirements on it. Enforce 
them in the verifier.

llvm-svn: 78160
 2009-08-05 05:21:07 +00:00
Chris Lattner
fd211f171d expose SectionKindForGlobal to curious clients, named as 
getKindForGlobal.

llvm-svn: 78156
 2009-08-05 04:25:40 +00:00
Bob Wilson
15c5c15ccb Oops. I didn't mean to commit this piece yet. 
llvm-svn: 78146
 2009-08-05 02:47:13 +00:00
Dan Gohman
5d566d918b Major calling convention code refactoring. 
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.

llvm-svn: 78142
 2009-08-05 01:29:28 +00:00
Dan Gohman
fd9e5bc299 Remove an unnecessary flush in the CppBackend's output. 
llvm-svn: 78138
 2009-08-05 01:06:38 +00:00
Dan Gohman
4b2748d474 Don't flush the raw_ostream between each MachineFunction. These flush 
calls were originally put in place because errs() at one time was
not unbuffered, and these print routines are commonly used with errs()
for debugging. However, errs() is now properly unbuffered, so the
flush calls are no longer needed. This significantly reduces the
number of write(2) calls for regular asm printing when there are many
small functions.

llvm-svn: 78137
 2009-08-05 00:49:25 +00:00
Bob Wilson
1fe51064ba Change DAG nodes for Neon VLD2/3/4 operations to return multiple results. 
Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions.  The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.

llvm-svn: 78136
 2009-08-05 00:49:09 +00:00
Bruno Cardoso Lopes
21bb984953 1) Proper emit displacements for x86, using absolute relocations where necessary 
for ELF to work.  
2) RIP addressing: Use SIB bytes for absolute relocations where RegBase=0, 
IndexReg=0.
3) The JIT can get the real address of cstpools and jmptables during
code emission, fix that for object code emission

llvm-svn: 78129
 2009-08-05 00:11:21 +00:00
Evan Cheng
e366789b50 Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode. 
llvm-svn: 78126
 2009-08-04 23:47:55 +00:00
Bob Wilson
3607eeebfa Replace dregsingle operand modifier with explicit escaped curly brackets. 
For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.

llvm-svn: 78109
 2009-08-04 21:39:33 +00:00
Mike Stump
ba093f21d7 Restlyize to match other targets, fixes cmake build to boot. 
llvm-svn: 78105
 2009-08-04 21:27:06 +00:00
Evan Cheng
2ec9ab08d8 Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet. 
llvm-svn: 78104
 2009-08-04 21:12:13 +00:00
Chris Lattner
ab57a6c861 remove a random reference to subtarget. Even without this, we 
still get "intel syntax" instructions from llc with  
-x86-asm-syntax=intel

llvm-svn: 78103
 2009-08-04 21:12:08 +00:00
David Goodwin
648590849c Add NEON single-precision FP support for fabs and fneg. 
llvm-svn: 78101
 2009-08-04 20:39:05 +00:00
Chris Lattner
87372c0978 rip out SectionEndDirectiveSuffix support, only uses by 
the masm backend.  If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.

llvm-svn: 78096
 2009-08-04 20:09:41 +00:00