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Commit Graph

89457 Commits

Author SHA1 Message Date
Tim Northover
9f3ff5cc4c AArch64: refactor frame handling to use movz/movk for overlarge offsets.
In the near future litpools will be in a different section, which means that
any access to them is at least two instructions. This makes the case for a
movz/movk pair (if total offset <= 32-bits) even more compelling.

llvm-svn: 175257
2013-02-15 09:33:26 +00:00
Alexey Samsonov
ce14af1162 clang-formatize llvm-symbolizer code
llvm-svn: 175255
2013-02-15 08:54:47 +00:00
Bill Wendling
12753ce9bc Simplify the 'operator<' for the attribute object.
llvm-svn: 175252
2013-02-15 05:25:26 +00:00
Hal Finkel
5e320e9019 BBVectorize: Cap the number of candidate pairs in each instruction group
For some basic blocks, it is possible to generate many candidate pairs for
relatively few pairable instructions. When many (tens of thousands) of these pairs
are generated for a single instruction group, the time taken to generate and
rank the different vectorization plans can become quite large. As a result, we now
cap the number of candidate pairs within each instruction group. This is done by
closing out the group once the threshold is reached (set now at 3000 pairs).

Although this will limit the overall compile-time impact, this may not be the best
way to achieve this result. It might be better, for example, to prune excessive
candidate pairs after the fact the prevent the generation of short, but highly-connected
groups. We can experiment with this in the future.

This change reduces the overall compile-time slowdown of the csa.ll test case in
PR15222 to ~5x. If 5x is still considered too large, a lower limit can be
used as the default.

This represents a functionality change, but only for very large inputs
(thus, there is no regression test).

llvm-svn: 175251
2013-02-15 04:28:42 +00:00
Anna Zaks
ebd25dd190 Revert "Simplify the attributes '<' comparison function."
This reverts commit 82c101153fe7b35bce48781fab038e1b8f31a7bd.

llvm-svn: 175250
2013-02-15 04:15:55 +00:00
Anna Zaks
a87266cbd6 Revert "Fix testcase for attribute ordering."
This reverts commit 58f20a3cbfca7384fe5e25e095f18572736a4792.

llvm-svn: 175249
2013-02-15 04:15:53 +00:00
Anna Zaks
c132a765bf Revert "Fix testcase for attribute ordering."
This reverts commit 997c6516ca161073a1d516ebca7c0ca7722f64e2.

llvm-svn: 175248
2013-02-15 04:15:50 +00:00
Bill Wendling
ab58f55c09 Fix testcase for attribute ordering.
llvm-svn: 175238
2013-02-15 01:04:46 +00:00
Reed Kotler
45e1076551 Fix minor mips16 issues in directives for function prologue. Probably this does
not matter but makes it more gcc compatible which avoids possible subtle
problems. Also, turned back on a disabled check in helloworld.ll. 

llvm-svn: 175237
2013-02-15 01:04:38 +00:00
Bill Wendling
26186dc103 Fix testcase for attribute ordering.
llvm-svn: 175236
2013-02-15 00:58:25 +00:00
Bill Wendling
67e51ec173 Simplify the attributes '<' comparison function.
llvm-svn: 175235
2013-02-15 00:55:08 +00:00
Akira Hatanaka
3bea5ea392 [mips] Disallow moving load/store instructions past volatile instructions.
Unfortunately, I wasn't able to create a test case that demonstrates the
problem I was trying to fix with this patch.

llvm-svn: 175226
2013-02-14 23:54:40 +00:00
Akira Hatanaka
592ad108fa [mips] Replace usage of SmallSet with BitVector, which is used to keep track of
defined and used registers. Also add a few helper functions to simplify the
code. 

llvm-svn: 175224
2013-02-14 23:40:57 +00:00
Akira Hatanaka
78e6c7fa42 [mips] Fix comments and coding style violations. Declare functions to be const.
llvm-svn: 175222
2013-02-14 23:20:15 +00:00
Joel Jones
17b64a424b The ARM NEON vector compare instructions take three arguments. However, the
assembler should also accept a two arg form, as the docuemntation specifies that
the first (destination) register is optional.

This patch uses TwoOperandAliasConstraint to add the two argument form.

It also fixes an 80-column formatting problem in:
  test/MC/ARM/neon-bitwise-encoding

<rdar://problem/12909419> Clang rejects ARM NEON assembly instructions

llvm-svn: 175221
2013-02-14 23:18:40 +00:00
Eli Bendersky
3c50981d2a The operand listing is very much outdated.
llvm-svn: 175220
2013-02-14 23:17:03 +00:00
Akira Hatanaka
845f839577 [mips] Simplify code in function Filler::findDelayInstr.
1. Define and use function terminateSearch.
2. Use MachineBasicBlock::iterator instead of MachineBasicBlock::instr_iterator.
3. Delete the line which checks whether an instruction is a pseudo. 

llvm-svn: 175219
2013-02-14 23:11:24 +00:00
Preston Gurd
d2b7797529 Mark getRawBits const.
Patch by Tyler Nowicki.

llvm-svn: 175218
2013-02-14 22:49:29 +00:00
Hal Finkel
29b84d5692 BBVectorize: Remove the remaining instances of std::multimap
All instances of std::multimap have now been replaced by
DenseMap<K, std::vector<V> >, and this yields a speedup of 5% on the
csa.ll test case from PR15222.

No functionality change intended.

llvm-svn: 175216
2013-02-14 22:38:04 +00:00
Hal Finkel
b302f08ac1 BBVectorize: Don't store candidate pairs in a std::multimap
This is another commit on the road to removing std::multimap from
BBVectorize. This gives an ~1% speedup on the csa.ll test case
in PR15222.

No functionality change intended.

llvm-svn: 175215
2013-02-14 22:37:09 +00:00
Jakub Staszak
9ef0442cde Simplify code. Remove "else after return".
llvm-svn: 175212
2013-02-14 21:50:09 +00:00
Chad Rosier
1b3680d74d Update comment.
llvm-svn: 175209
2013-02-14 20:44:07 +00:00
Jyotsna Verma
8fb6be0cdc Hexagon: Change insn class to support instruction encoding.
This patch doesn't introduce any functionality changes.
It adds some new fields to the Hexagon instruction classes and
changes their layout to support instruction encoding.

llvm-svn: 175205
2013-02-14 19:57:17 +00:00
Bill Wendling
0b2ac39b29 s/bool/LLVMBool/
llvm-svn: 175204
2013-02-14 19:40:27 +00:00
Bill Wendling
3263ae2d36 s/bool/LLVMBool/
llvm-svn: 175203
2013-02-14 19:39:14 +00:00
Kay Tiong Khoo
2f0d06fb51 death to extra whitespace
llvm-svn: 175200
2013-02-14 19:15:14 +00:00
Bill Wendling
cff8f3e5f2 Add two new functions to the C API:
LLVMCreateMemoryBufferWithMemoryRange - exposes MemoryBuffer::getMemBuffer
 LLVMCreateMemoryBufferWithMemoryRangeCopy - exposes MemoryBuffer::getMemBufferCopy

Patch by Moritz Maxeiner!

llvm-svn: 175199
2013-02-14 19:11:28 +00:00
Kay Tiong Khoo
45b3d90921 added basic support for Intel ADX instructions
-feature flag, instructions definitions, test cases

llvm-svn: 175196
2013-02-14 19:08:21 +00:00
Michel Danzer
32c67fd5da R600/SI: Fix int_SI_fs_interp_constant
The important fix is that the constant interpolation value is stored in the
parameter slot P0, which is encoded as 2.

In addition, drop the SI_INTERP_CONST pseudo instruction, pass the parameter
slot as an operand to V_INTERP_MOV_F32 instead of hardcoding it there, and
add a special operand class for the parameter slots for type checking and
pretty printing.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 175193
2013-02-14 19:03:25 +00:00
Dmitry Vyukov
85b0b97f34 include/llvm/Object/ELF.h: do debug checks only when NDEBUG
validateSymbol() is called all over the place, and it seems it's a debug check.
It significantly speedups llvm-symbolizer used in tsan/asan/msan. validateSymbol() is the second hot function and accounts for 15% of runtime.

llvm-svn: 175192
2013-02-14 18:41:42 +00:00
Nadav Rotem
da8ef29d81 Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.
llvm-svn: 175190
2013-02-14 18:28:52 +00:00
Nadav Rotem
402093b121 80-col
llvm-svn: 175189
2013-02-14 18:20:48 +00:00
Jyotsna Verma
38aab141d7 Hexagon: Use multiclass for absolute addressing mode loads.
This patch doesn't introduce any functionality changes.

llvm-svn: 175187
2013-02-14 18:15:29 +00:00
Weiming Zhao
c1d92fe42d Re-apply r175088 for bug fix 13622: Add paired register support for
inline asm with 64-bit data on ARM

Update test case to use -mtriple=arm-linux-gnueabi

llvm-svn: 175186
2013-02-14 18:10:21 +00:00
Jyotsna Verma
37dad03d5b Fix for bug 15246 -- out-of-bound error in the TableGen backend, CodeGenMapTable.cpp.
llvm-svn: 175185
2013-02-14 17:58:13 +00:00
Vincent Lejeune
f597698c9c R600: Do not fold single instruction with more that 3 kcache read
It fixes around 100 tfb piglit tests and 16 glean tests.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175183
2013-02-14 16:57:19 +00:00
Vincent Lejeune
0c8a844f4b R600: Export instructions are no longer terminator
This allows MachineInstScheduler to reorder them, and thus make scheduling more
efficient.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175182
2013-02-14 16:55:11 +00:00
Vincent Lejeune
62582e7a09 R600: Fold zero/one in export instructions
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175181
2013-02-14 16:55:06 +00:00
Vincent Lejeune
829906263d R600: Do not fold modifier/litterals in vector inst
This fixes a couple of regressions on (probably not just) cayman

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175180
2013-02-14 16:55:01 +00:00
Tim Northover
1c56ae5a70 Use correct host/target CMake variables to define lit variables.
CMake and autotools disagree on what "host" means in a cross-compilation
context. Autotools (and lit) take it to be the machine the binaries being
compiled now will run on. CMake takes it to be the machine actually compiling
the binaries now.

This change makes lit.site-cfg more consistent between autotools and CMake,
allowing lit tests (particularly in ExecutionEngine) to run correctly when
cross-compiled with CMake

llvm-svn: 175179
2013-02-14 16:49:32 +00:00
Tim Northover
025494b1c4 AArch64: switch from neverHasSideEffects to hasSideEffects.
llvm-svn: 175176
2013-02-14 16:31:12 +00:00
Tim Northover
8e64e01243 Add deprecation of neverHasSideEffects to documentation comments.
llvm-svn: 175175
2013-02-14 16:31:06 +00:00
Rafael Espindola
ead97036ea Revert r15266. This fixes llvm.org/pr15266.
llvm-svn: 175173
2013-02-14 16:23:08 +00:00
Tim Northover
57e550e670 AArch64: stop claiming that NEON registers are usable for now.
If vector types have legal register classes, then LLVM bypasses LegalizeTypes
on them, which causes faults currently since the code to handle them isn't in
place.

This fixes test failures when AArch64 is the default target.

llvm-svn: 175172
2013-02-14 16:22:14 +00:00
Tim Northover
21f54fd5c2 AArch64: add block comments where missing
Only comments affected. No code change at all.

llvm-svn: 175169
2013-02-14 16:17:01 +00:00
Krzysztof Parzyszek
e5b4384acf Add testcase for llvm-dwarfdump to test parsing of the pubnames data.
llvm-svn: 175168
2013-02-14 16:10:58 +00:00
David Chisnall
79c47e94d7 On FreeBSD, we need to look in /usr/local/include so that libxml2 finds iconv.h
Patch by Jonathan Anderson!

llvm-svn: 175167
2013-02-14 15:40:44 +00:00
Kristof Beyls
d33917748d Make ARMAsmParser accept the correct alignment specifier syntax in instructions.
The parser will now accept instructions with alignment specifiers written like
    vld1.8  {d16}, [r0:64]
, while also still accepting the incorrect syntax
    vld1.8  {d16}, [r0, :64]

llvm-svn: 175164
2013-02-14 14:46:12 +00:00
Dmitry Vyukov
9f7fc60976 llvm-symbolizer: speedup symbol lookup
llvm-svn: 175158
2013-02-14 13:06:18 +00:00
Evgeniy Stepanov
34a8be73a2 Workaround an MSan false positive.
llvm-svn: 175156
2013-02-14 12:18:32 +00:00