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304 Commits

Author SHA1 Message Date
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Evan Cheng
c57ec111f2 SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. 
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.

llvm-svn: 46659
 2008-02-02 04:07:54 +00:00
Evan Cheng
d6222fc11d Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. 
llvm-svn: 46635
 2008-02-01 09:10:45 +00:00
Evan Cheng
705212577d Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. 
llvm-svn: 46609
 2008-01-31 09:59:15 +00:00
Evan Cheng
3d7eda3f35 Also avoid adding callee save code before debug labels. 
llvm-svn: 46586
 2008-01-31 00:27:49 +00:00
Chris Lattner
f83aae613c rename TargetInstrDescriptor -> TargetInstrDesc. 
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
 2008-01-07 07:27:27 +00:00
Chris Lattner
9d38dfa4a5 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor 
llvm-svn: 45680
 2008-01-07 03:13:06 +00:00
Chris Lattner
f7f96d818f Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects 
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
 2008-01-07 01:56:04 +00:00
Duncan Sands
63b3355183 Remove an unused variable. 
llvm-svn: 45655
 2008-01-06 07:43:13 +00:00
Owen Anderson
8c8c5906f8 I should not be allowed to commit when sleepy. 
llvm-svn: 45608
 2008-01-05 00:48:55 +00:00
Owen Anderson
e6856128ab Move some more instruction creation methods from RegisterInfo into InstrInfo. 
llvm-svn: 45484
 2008-01-01 21:11:32 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
4a4943a78f MachineOperand::getImmedValue -> MachineOperand::getImm 
llvm-svn: 45454
 2007-12-30 20:50:28 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Evan Cheng
8464a0bf00 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.

llvm-svn: 44600
 2007-12-05 03:14:33 +00:00
Anton Korobeynikov
5635277c36 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.

llvm-svn: 39855
 2007-07-14 14:06:15 +00:00
Lauro Ramos Venancio
b5186a0078 Fix PR1424. 
When a function has FP, the register scavenging spill slot offset already
was calculated.

llvm-svn: 37371
 2007-05-31 18:27:58 +00:00
Devang Patel
cd45427a87 Drop 'const' 
llvm-svn: 36662
 2007-05-03 01:11:54 +00:00
Devang Patel
8ee9065162 Use 'static const char' instead of 'static const int'. 
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
 2007-05-02 21:39:20 +00:00
Devang Patel
38a66bc82e Do not use typeinfo to identify pass in pass manager. 
llvm-svn: 36632
 2007-05-01 21:15:47 +00:00
Evan Cheng
17f967eb52 If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames. 
llvm-svn: 36625
 2007-05-01 09:01:42 +00:00
Evan Cheng
248de25fb5 Under normal circumstances, when a frame pointer is not required, we reserve 
argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.

llvm-svn: 36607
 2007-05-01 00:52:08 +00:00
Evan Cheng
7f44e880dc Match MachineFunction::UsedPhysRegs changes. 
llvm-svn: 36452
 2007-04-25 22:13:27 +00:00
Chris Lattner
ca7480e8cb support for >4G stack frames 
llvm-svn: 36425
 2007-04-25 04:30:24 +00:00
Chris Lattner
a2b590fff8 support > 4G stack objects 
llvm-svn: 36422
 2007-04-25 04:20:54 +00:00
Chris Lattner
958d804293 Fix a bug introduced with my previous patch, where it didn't correctly handle 
instructions which replace themselves when FI's are rewritten (common on ppc).
This fixes CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll

llvm-svn: 35789
 2007-04-09 01:19:33 +00:00
Chris Lattner
1a746d3b8e Fix CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll and PR1308: 
some instructions can have multiple frame indices in them.  If this happens,
rewrite all of them.

llvm-svn: 35785
 2007-04-09 00:46:10 +00:00
Evan Cheng
73678177cd If target decides to create an emergency spill slot, make sure it's closest to SP or frame pointer. 
llvm-svn: 34965
 2007-03-06 10:02:38 +00:00
Evan Cheng
7d470c14cf Delete register scavenger when done with it. 
llvm-svn: 34786
 2007-03-01 10:23:33 +00:00
Evan Cheng
ce7f2618a9 Interface clean up. 
llvm-svn: 34772
 2007-03-01 02:25:51 +00:00
Chris Lattner
5a20764bbb add a newline at end of file 
llvm-svn: 34735
 2007-02-28 06:42:11 +00:00
Evan Cheng
db591ecaa8 Make requiresRegisterScavenging determination on a per MachineFunction basis. 
llvm-svn: 34711
 2007-02-28 00:59:19 +00:00
Evan Cheng
ee2e5de4fb MRegisterInfo disowns RegScavenger. It's immutable. 
llvm-svn: 34706
 2007-02-28 00:17:36 +00:00
Evan Cheng
4c4e56df47 Let MRegisterInfo now owns RegScavenger. 
llvm-svn: 34691
 2007-02-27 21:10:33 +00:00
Evan Cheng
341fc2bf88 forward() should not increment internal iterator. Its client may insert instruction between now and next forward() call. 
llvm-svn: 34649
 2007-02-27 01:58:48 +00:00
Evan Cheng
92429f4cca First potential client of register scavenger. 
llvm-svn: 34516
 2007-02-23 01:11:26 +00:00
Jim Laskey
64f4242072 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.

llvm-svn: 33550
 2007-01-26 21:22:28 +00:00
Evan Cheng
b64363a085 Added a MRegisterInfo hook that tells PEI the target is responsible for 
rounding the stack frame to a multiple of stack alignment.

llvm-svn: 33504
 2007-01-25 22:12:41 +00:00
Evan Cheng
b6a4a7f72a PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. 
llvm-svn: 33460
 2007-01-23 09:38:11 +00:00
Evan Cheng
4e647ad333 Remove an unused variable. 
llvm-svn: 33396
 2007-01-20 09:21:54 +00:00
Evan Cheng
7e02b3a690 We not align the final stack slot but instead let the target do so in emitPrologue(). Each target can make adjustments to the stack frame and re-align the stack as it deem appropriate. Do not align it twice which can end up wasting stack space. 
llvm-svn: 33387
 2007-01-20 02:07:13 +00:00
Evan Cheng
09bcc91be2 - Fixing naming inconsistency: calleesave -> calleesaved. 
- Make use of spillCalleeSavedRegisters() and restoreCalleeSavedRegisters().

llvm-svn: 32822
 2007-01-02 21:31:15 +00:00
Evan Cheng
b5a57532b0 Initialize {Min|Max}CSFrameIndex properly. 
llvm-svn: 32299
 2006-12-07 02:25:34 +00:00
Evan Cheng
5a3f89027f TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller. 
llvm-svn: 30648
 2006-09-28 18:52:32 +00:00
Evan Cheng
5e8af45ddb PEI now place callee save spills closest to the address pointed to by the 
incoming stack. This allows X86 backend to use push / pop in epilogue /
prologue.

llvm-svn: 30636
 2006-09-28 00:10:27 +00:00
Evan Cheng
310d2abd29 Rename function. It's determining which callee-save registers to save. 
llvm-svn: 30616
 2006-09-26 22:29:31 +00:00
Chris Lattner
33bd5dcfb7 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
llvm-svn: 29911
 2006-08-27 12:54:02 +00:00
Jim Laskey
e9b0e1014e Tidy up. 
llvm-svn: 29888
 2006-08-25 22:56:30 +00:00
Jim Laskey
3af6953257 Consolidate callee saved register information so that it can me used by debug 
information and exception handling.

llvm-svn: 29881
 2006-08-25 19:45:51 +00:00
Chris Lattner
de706b3e3e Shave another 27K off libllvmgcc.dylib with visibility hidden 
llvm-svn: 28973
 2006-06-28 22:17:39 +00:00
Chris Lattner
11064741d3 Remove dead variable 
llvm-svn: 28253
 2006-05-12 18:02:04 +00:00
Jim Laskey
b93bc75add Foundation for call frame information. 
llvm-svn: 27491
 2006-04-07 16:34:46 +00:00
Chris Lattner
4601b86ad0 The stack alignment is now computed dynamically, just verify it is correct. 
llvm-svn: 27380
 2006-04-03 21:39:57 +00:00
Chris Lattner
fc76f9f0c1 Always compute max align. 
llvm-svn: 24227
 2005-11-06 17:43:20 +00:00
Nate Begeman
aecebc076b Add the necessary support to the ISel to allow targets to codegen the new 
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.

llvm-svn: 24224
 2005-11-06 09:00:38 +00:00
Chris Lattner
3fcb5aa250 now that we have a reg class to spill with, get this info from the regclass 
llvm-svn: 23559
 2005-09-30 17:19:22 +00:00
Chris Lattner
738631f389 Now that we have getCalleeSaveRegClasses() info, use it to pass the register 
class into the spill/reload methods.  Targets can now rely on that argument.

llvm-svn: 23556
 2005-09-30 16:59:07 +00:00
Chris Lattner
a9cd99bbc1 Change this code ot pass register classes into the stack slot spiller/reloader 
code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.

llvm-svn: 23536
 2005-09-30 01:29:00 +00:00
Chris Lattner
21400573a7 Fix a bug in my previous patch that was using the wrong iterator. This fixes 
Olden/bisort among others.

llvm-svn: 23124
 2005-08-29 00:10:46 +00:00
Chris Lattner
5f55dd72af Make this code safe for when loadRegFromStackSlot inserts multiple instructions. 
llvm-svn: 23108
 2005-08-26 22:18:32 +00:00
Chris Lattner
54bf1cc313 When inserting callee-save register reloads, make sure to skip over any 
terminator instructions before the 'ret' in case the target has a
multi-instruction return sequence.

llvm-svn: 22041
 2005-05-15 03:09:58 +00:00
Chris Lattner
a3e57bd844 Tolerate instrs with extra args 
llvm-svn: 21982
 2005-05-13 21:07:15 +00:00
Misha Brukman
774e55c446 Remove trailing whitespace 
llvm-svn: 21420
 2005-04-21 22:36:52 +00:00
Chris Lattner
65fc8007cd Simplify/speedup the PEI by not having to scan for uses of the callee saved 
registers.  This information is computed directly by the register allocator
now.

llvm-svn: 19795
 2005-01-23 23:13:12 +00:00
Chris Lattner
c187b917f2 Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool> 
llvm-svn: 19787
 2005-01-23 21:45:01 +00:00
Chris Lattner
29d6389d78 Implicitly defined registers can clobber callee saved registers too! 
This fixes the return-address-not-being-saved problem in the Alpha backend.

llvm-svn: 19741
 2005-01-22 00:49:16 +00:00
Chris Lattner
0e7435bc5b Add an assertion that would have made more sense to duraid 
llvm-svn: 19704
 2005-01-19 21:32:07 +00:00
Nate Begeman
efbdaad4b7 Put this change back in after testing from Reid proved its innocence. getSpillSize now returns value in bits 
llvm-svn: 16102
 2004-08-29 22:00:24 +00:00
Nate Begeman
ad24578e7d Back out change to divide getSpillSize by 8 until I figure out why it breaks x86, which has register sizes in bits. 
llvm-svn: 16073
 2004-08-27 16:48:24 +00:00
Nate Begeman
c0e42be976 Register sizes are in bits, not bytes 
llvm-svn: 16070
 2004-08-27 04:28:10 +00:00
Chris Lattner
0df8bcf2fa Register info alignment is in bits, frame object alignment is (currently) in 
bytes.

llvm-svn: 15970
 2004-08-21 20:04:59 +00:00
Chris Lattner
7ead36e4a4 Now that we have per-register spill size/alignment info, remove more uses 
of getRegClass

llvm-svn: 15967
 2004-08-21 19:45:10 +00:00
Chris Lattner
463d46f17a Stop using CreateStackObject(RegClass*) 
llvm-svn: 15775
 2004-08-15 22:02:22 +00:00
Chris Lattner
e58190f5f6 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00
Alkis Evlogimenos
dbe432aee7 Make this compile on gc 3.4.1 (static_cast to non-const type was not 
allowed).

llvm-svn: 15766
 2004-08-15 09:18:55 +00:00
Nate Begeman
cbc21460f2 Elminiate MachineFunction& argument from eliminateFrameIndex 
llvm-svn: 15736
 2004-08-14 22:00:10 +00:00
Chris Lattner
1a0fa932e1 Split saveCallerSavedRegisters into two methods for clarity, and add comments. 
Add support for targets that must spill certain physregs at certain locations.

Patch contributed by Nate Begeman, slightly hacked by me.

llvm-svn: 15701
 2004-08-12 19:01:14 +00:00
Chris Lattner
c5f185c269 Ok get rid of the REST of the tabs 
llvm-svn: 15564
 2004-08-07 07:18:41 +00:00
Chris Lattner
560e2f0751 Death to tabs 
llvm-svn: 15563
 2004-08-07 07:07:57 +00:00
Chris Lattner
84269aa91e Fix fallout from getOffsetOfLocalArea() being negated. Debugging dumps were being 
printed incorrectly, and we were reserving 8 extra bytes of stack space for functions
on X86.

llvm-svn: 14152
 2004-06-11 06:37:11 +00:00
Chris Lattner
71f351ddf9 Fix the prolog epilog code inserter to match the documentation and support 
targets whose stack grows up.

Patch contributed by Vladimir Prus

llvm-svn: 14111
 2004-06-10 06:23:35 +00:00
Chris Lattner
0046ea7105 Adjust to new TargetMachine interface 
llvm-svn: 13956
 2004-06-02 05:57:12 +00:00
Alkis Evlogimenos
84318d7bb6 Make dense maps keyed on physical registers smallerusing 
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.

llvm-svn: 11477
 2004-02-15 21:37:17 +00:00
Chris Lattner
18c5e0065f Allow for fixed objects to reside in the local area, and if they don't to not 
clobber them by allocating other objects in the same space!

llvm-svn: 11454
 2004-02-15 00:14:20 +00:00
Chris Lattner
1130fb28d9 There is no reason to align the stack pointer if there are no callees of this function! 
llvm-svn: 11449
 2004-02-14 20:10:59 +00:00
Alkis Evlogimenos
b755d35fd2 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340
 2004-02-12 02:27:10 +00:00
Chris Lattner
37e040ee03 Do not use MachineOperand::isVirtualRegister either! 
llvm-svn: 11283
 2004-02-10 21:12:22 +00:00
Chris Lattner
9d0a4e63b1 Eliminate users of MachineOperand::isPhysicalRegister 
llvm-svn: 11278
 2004-02-10 20:41:10 +00:00
Alkis Evlogimenos
29127b8825 Change interface of MachineOperand as follows: 
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461
 2003-12-14 13:24:17 +00:00
Brian Gaeke
d25f86d683 Put all LLVM code into the llvm namespace, as per bug 109. 
llvm-svn: 9903
 2003-11-11 22:41:34 +00:00
John Criswell
b402729b30 Added LLVM project notice to the top of every C++ source file. 
Header files will be on the way.

llvm-svn: 9298
 2003-10-20 19:43:21 +00:00
Alkis Evlogimenos
74568bc9d4 Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefs 
and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check for
pointer validity when iterating over those sets. Code that looked
like:

if (const unsigned* AS = TID.ImplicitDefs) {
  for (int i = 0; AS[i]; ++i) {
    // use AS[i]
  }
}

was changed to:

for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) {
  // use *AS
}

llvm-svn: 8960
 2003-10-08 05:20:08 +00:00
Brian Gaeke
77c65be59e Factory methods for FunctionPasses now return type FunctionPass *. 
llvm-svn: 7823
 2003-08-13 18:18:15 +00:00
Vikram S. Adve
681b3c77fa (1) Added special register class containing (for now) %fsr. 
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".

llvm-svn: 6341
 2003-05-27 00:05:23 +00:00
Chris Lattner
8f2c71cae2 Fix a bug which occurred with empty basic blocks 
llvm-svn: 5982
 2003-05-02 18:44:42 +00:00
Chris Lattner
3228091a65 Fix problems with empty basic blocks 
llvm-svn: 5326
 2003-01-16 18:06:43 +00:00
Chris Lattner
76fc0fcfa5 Arg, fix bugs in previous checkin... 
llvm-svn: 5322
 2003-01-16 02:24:20 +00:00
Chris Lattner
ba0f68ad4a Add assertion 
llvm-svn: 5321
 2003-01-16 02:22:08 +00:00
Chris Lattner
52c6c50212 * Insert prolog/epilog code before rewriting indexes 
* Fix calculation of frame offsets when there is an offset.

llvm-svn: 5318
 2003-01-15 22:52:34 +00:00
Chris Lattner
b27d60ccf1 Rename MachineInstrInfo -> TargetInstrInfo 
llvm-svn: 5272
 2003-01-14 22:00:31 +00:00
Chris Lattner
e9bef83e93 Convert to MachineFunctionPass 
llvm-svn: 5218
 2003-01-13 00:23:41 +00:00
Chris Lattner
500e45fe72 Rename FunctionFrameInfo to MachineFrameInfo 
llvm-svn: 5200
 2002-12-28 21:08:26 +00:00
Chris Lattner
2407294a41 Rename MachineFrameInfo to TargetFrameInfo.h 
llvm-svn: 5199
 2002-12-28 21:00:25 +00:00
Chris Lattner
0ca1e472f2 Initial checkin of Prolog/Epilog code inserter, which is an important part 
of the abstract frame representation

llvm-svn: 5198
 2002-12-28 20:43:30 +00:00