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13256 Commits

Author SHA1 Message Date
Evan Cheng
a3e0a7f652 Use rep/stosl; and Count 0x3; rep/stosb for memset with 4 byte aligned dest. 
and variable value.
Similarly for memcpy.

llvm-svn: 26603
 2006-03-07 23:29:39 +00:00
Chris Lattner
4c47b8cd69 Two things: 
1. Don't emit debug info, or other llvm.metadata to the .cbe.c file.
2. Mark static ctors/dtors as such, so that bugpoint works on C++ code
   compiled with the new CFE.

llvm-svn: 26602
 2006-03-07 22:58:23 +00:00
Jim Laskey
91d5ce2531 Use "llvm.metadata" section for debug globals. Filter out these globals in the 
asm printer.

llvm-svn: 26599
 2006-03-07 22:00:35 +00:00
Jim Laskey
eec3faecde Switch to using a numeric id for anchors. 
llvm-svn: 26598
 2006-03-07 20:53:47 +00:00
Chris Lattner
c9039049c0 Fix ConstantMerge/2006-03-07-DontMergeDiffSections.ll, a problem Jim 
hypotheticalized about, where we would incorrectly merge two globals in
different sections.

llvm-svn: 26597
 2006-03-07 17:56:59 +00:00
Chris Lattner
27f87a6955 add another missing store. 
llvm-svn: 26595
 2006-03-07 16:26:48 +00:00
Chris Lattner
dfdeec73bc add a couple more load/store instrs, add a newline to the end of file. 
llvm-svn: 26594
 2006-03-07 16:19:46 +00:00
Jim Laskey
da7873525e Bitfield support. 
llvm-svn: 26593
 2006-03-07 15:51:33 +00:00
Nate Begeman
a8bc3c0c3c This kinda sorta implements "things that have to lead a dispatch group". 
llvm-svn: 26591
 2006-03-07 08:30:27 +00:00
Chris Lattner
842436586c add some new instructions to the classifier. With this, we correctly insert 
a nop into Freebench/neural, which speeds it up from 136->129s (~5.4%).

llvm-svn: 26590
 2006-03-07 07:14:55 +00:00
Chris Lattner
0cd4bd574c add some comments that describe what we model 
llvm-svn: 26588
 2006-03-07 06:44:19 +00:00
Chris Lattner
4cd6cd499d Implement a very very simple hazard recognizer for LSU rejects and ctr set/read 
flushes

llvm-svn: 26587
 2006-03-07 06:32:48 +00:00
Chris Lattner
ced780efee Fix some formatting, when looking for hazards, prefer target nodes over 
things like copyfromreg.

llvm-svn: 26586
 2006-03-07 05:40:43 +00:00
Chris Lattner
ae34bbf56b add a note 
llvm-svn: 26585
 2006-03-07 04:42:59 +00:00
Chris Lattner
174768dde0 add a note 
llvm-svn: 26583
 2006-03-07 02:46:26 +00:00
Evan Cheng
03940bfcfe - Emit subsections_via_symbols for Darwin. 
- Conditionalize Dwarf debugging output (Darwin only for now).

llvm-svn: 26582
 2006-03-07 02:23:26 +00:00
Evan Cheng
2327759419 Enable Dwarf debugging info. 
llvm-svn: 26581
 2006-03-07 02:02:57 +00:00
Chris Lattner
8a548b3e7d Teach the alignment handling code to look through constant expr casts and GEPs 
llvm-svn: 26580
 2006-03-07 01:28:57 +00:00
Chris Lattner
58fe521b5b Teach instcombine to increase the alignment of memset/memcpy/memmove when 
the pointer is known to come from either a global variable, alloca or
malloc.  This allows us to compile this:

  P = malloc(28);
  memset(P, 0, 28);

into explicit stores on PPC instead of a memset call.

llvm-svn: 26577
 2006-03-06 20:18:44 +00:00
Chris Lattner
86375c060a update file comment 
llvm-svn: 26573
 2006-03-06 17:58:04 +00:00
Evan Cheng
2fad0ea044 Remove some code that doesn't make sense 
llvm-svn: 26572
 2006-03-06 07:31:44 +00:00
Evan Cheng
8fd9503fbd Remove SUnit::Priority1: it is re-calculated on demand as number of live 
range to be generated.

llvm-svn: 26570
 2006-03-06 06:08:54 +00:00
Chris Lattner
c6d1fbab70 Hoist the HazardRecognizer out of the ScheduleDAGList.cpp file to where 
targets can implement them.  Make the top-down scheduler non-g5-specific.

Remove the old testing hazard recognizer.

llvm-svn: 26569
 2006-03-06 00:22:00 +00:00
Chris Lattner
ca7ed30ee6 Comment fixes 
llvm-svn: 26567
 2006-03-05 23:59:20 +00:00
Chris Lattner
101ce8f304 Don't depend on the C99 copysign function, implement it ourselves. 
llvm-svn: 26566
 2006-03-05 23:57:58 +00:00
Chris Lattner
5c28fdcae8 When a hazard recognizer needs noops to be inserted, do so. This represents 
noops as null pointers in the instruction sequence.

llvm-svn: 26564
 2006-03-05 23:51:47 +00:00
Chris Lattner
af44ead7f3 implement TII::insertNoop 
llvm-svn: 26562
 2006-03-05 23:49:55 +00:00
Chris Lattner
0ee7522721 Implement G5HazardRecognizer as a trivial thing that wants 5 cycles between 
copyfromreg nodes.  Clearly useful!

llvm-svn: 26559
 2006-03-05 23:13:56 +00:00
Chris Lattner
ccda7ffffd Add basic hazard recognizer support. noop insertion isn't complete yet though. 
llvm-svn: 26558
 2006-03-05 22:45:01 +00:00
Jeff Cohen
578bf37e22 Fix VC++ compilation error. 
llvm-svn: 26554
 2006-03-05 21:43:37 +00:00
Chris Lattner
ef4bef419b Split the list scheduler into top-down and bottom-up pieces. The priority 
function of the top-down scheduler are completely bogus currently, and
having (future) PPC specific in this file is also wrong, but this is a
small incremental step.

llvm-svn: 26552
 2006-03-05 21:10:33 +00:00
Chris Lattner
49ccda9563 Move the available queue to being inside the ListSchedule method, since it 
bounds its lifetime.

llvm-svn: 26550
 2006-03-05 20:21:55 +00:00
Chris Lattner
4957693551 add a note 
llvm-svn: 26549
 2006-03-05 20:00:08 +00:00
Chris Lattner
f2bed5f46e Reinstate this now that the offending opposite xform has been removed. 
llvm-svn: 26548
 2006-03-05 19:53:55 +00:00
Chris Lattner
f8cbc8c4ea Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1), 
we want to canonicalize the other way.

llvm-svn: 26547
 2006-03-05 19:52:57 +00:00
Chris Lattner
93ad7177b4 print arbitrary constant pool entries 
llvm-svn: 26545
 2006-03-05 09:38:03 +00:00
Evan Cheng
e0a6cf78f8 Back out fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2) for now. 
It's causing an infinite loop compiling ldecod on x86 / Darwin.

llvm-svn: 26544
 2006-03-05 07:30:16 +00:00
Chris Lattner
827e3f62b0 Add some simple copysign folds 
llvm-svn: 26543
 2006-03-05 05:30:57 +00:00
Chris Lattner
4b4b3e6cbb Codegen copysign[f] into a FCOPYSIGN node 
llvm-svn: 26542
 2006-03-05 05:09:38 +00:00
Chris Lattner
6b0947c277 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should 
implement copysign as a native op if they have it.

llvm-svn: 26541
 2006-03-05 05:08:37 +00:00
Chris Lattner
55fbd49ca9 add a note for something evan noticed 
llvm-svn: 26539
 2006-03-05 01:15:18 +00:00
Chris Lattner
43e9ec760b Make vector narrowing more effective, implementing 
Transforms/InstCombine/vec_narrow.ll.  This add support for narrowing
extract_element(insertelement) also.

llvm-svn: 26538
 2006-03-05 00:22:33 +00:00
Chris Lattner
7d2423c91f Implemented. 
llvm-svn: 26536
 2006-03-04 23:33:44 +00:00
Chris Lattner
cd57ff4fb6 fold (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2) 
fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2)

This allows us to compile CodeGen/PowerPC/addi-reassoc.ll into:

_test1:
        slwi r2, r4, 4
        add r2, r2, r3
        lwz r3, 36(r2)
        blr
_test2:
        mulli r2, r4, 5
        add r2, r2, r3
        lbz r2, 11(r2)
        extsb r3, r2
        blr

instead of:

_test1:
        addi r2, r4, 2
        slwi r2, r2, 4
        add r2, r3, r2
        lwz r3, 4(r2)
        blr
_test2:
        addi r2, r4, 2
        mulli r2, r2, 5
        add r2, r3, r2
        lbz r2, 1(r2)
        extsb r3, r2
        blr

llvm-svn: 26535
 2006-03-04 23:33:26 +00:00
Chris Lattner
805838e63e Fix a crash compiling Obsequi 
llvm-svn: 26529
 2006-03-04 21:48:01 +00:00
Chris Lattner
7694fbc4bb Add factoring of multiplications, e.g. turning A*A+A*B into A*(A+B). 
Testcase here: Transforms/Reassociate/mulfactor.ll

llvm-svn: 26524
 2006-03-04 09:31:13 +00:00
Chris Lattner
35dbbc5676 Add a note 
llvm-svn: 26523
 2006-03-04 08:44:51 +00:00
Chris Lattner
9cc0d5a2d7 Regenerate 
llvm-svn: 26522
 2006-03-04 07:53:41 +00:00
Chris Lattner
b780a1ecdc Don't use invalidated iterators! 
llvm-svn: 26521
 2006-03-04 07:53:16 +00:00
Evan Cheng
65b5c2c680 Add an entry 
llvm-svn: 26520
 2006-03-04 07:49:50 +00:00
Chris Lattner
f526a4e5f6 Canonicalize (X+C1)*C2 -> X*C2+C1*C2 
This implements Transforms/InstCombine/add.ll:test31

llvm-svn: 26519
 2006-03-04 06:04:02 +00:00
Evan Cheng
2b45c57663 MEMSET / MEMCPY lowering bugs: we can't issue a single WORD / DWORD version of 
rep/stos and rep/mov if the count is not a constant. We could do
  rep/stosl; and $count, 3; rep/stosb
For now, I will lower them to memset / memcpy calls. We will revisit this after
a little bit experiment.

Also need to take care of the trailing bytes even if the count is a constant.
Since the max. number of trailing bytes are 3, we will simply issue loads /
stores.

llvm-svn: 26517
 2006-03-04 02:48:56 +00:00
Chris Lattner
0d3abd353b Be more conservative with our symbolic alias analysis. In particular, 
don't assume that A[1][0] and A[0][i] can't alias.  "i" might be out of
range, or even negative.  This fixes a miscompilation of 188.ammp (which
does bad pointer tricks) with the new CFE.

Testcase here: Analysis/BasicAA/2006-03-03-BadArraySubscript.ll

llvm-svn: 26515
 2006-03-04 02:06:34 +00:00
Chris Lattner
de8c7d8ae2 add a note 
llvm-svn: 26513
 2006-03-04 01:19:34 +00:00
Evan Cheng
f2a0107221 Typo 
llvm-svn: 26512
 2006-03-04 01:12:00 +00:00
Jim Laskey
dc6f528739 Added support for dwarf block data entries. 
llvm-svn: 26509
 2006-03-03 21:00:14 +00:00
Chris Lattner
2c6a3f04e9 Unbreak autouprade of llvm.sqrt, simplify some code. 
llvm-svn: 26506
 2006-03-03 16:31:22 +00:00
Jim Laskey
f915b6b08b Adding basic structure support. 
llvm-svn: 26505
 2006-03-03 15:06:57 +00:00
Evan Cheng
4afe769361 Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR. 
llvm-svn: 26504
 2006-03-03 07:01:07 +00:00
Evan Cheng
0c445855f2 Number of NodeTypes now exceeds 128. 
llvm-svn: 26503
 2006-03-03 06:58:59 +00:00
Evan Cheng
4ddc3b2c54 SDOperand::isOperand should not be a forwarding. It must check *this against N's operands. 
llvm-svn: 26502
 2006-03-03 06:42:32 +00:00
Evan Cheng
183b913508 Added isOperand(N): true if this is an operand of N 
llvm-svn: 26501
 2006-03-03 06:24:54 +00:00
Evan Cheng
b91460b269 A bit more tweaking 
llvm-svn: 26500
 2006-03-03 06:23:43 +00:00
Jeff Cohen
ee1a26dc07 Fix VC++ compilation errors. 
llvm-svn: 26498
 2006-03-03 03:25:07 +00:00
Evan Cheng
7d66f13ccf Move #include "llvm/CodeGen/AsmPrinter.h" to top since it's the interface. 
llvm-svn: 26493
 2006-03-03 02:04:29 +00:00
Chris Lattner
af9919716a Split the valuetypes out of Target.td into ValueTypes.td 
llvm-svn: 26490
 2006-03-03 01:55:26 +00:00
Chris Lattner
45ee76ee68 Change this to work with renamed intrinsics. 
llvm-svn: 26484
 2006-03-03 01:34:17 +00:00
Chris Lattner
a22de4b7d3 Make this work with renamed intrinsics. 
llvm-svn: 26482
 2006-03-03 01:30:23 +00:00
Chris Lattner
4ccc8d7926 updates for recent changes 
llvm-svn: 26481
 2006-03-03 01:21:36 +00:00
Chris Lattner
999aa36a04 remove the read/write port/io intrinsics. 
llvm-svn: 26479
 2006-03-03 00:19:58 +00:00
Chris Lattner
ab22220755 Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving 
PR709, and paving the way for future progress.

llvm-svn: 26476
 2006-03-03 00:00:25 +00:00
Chris Lattner
3c762c1b8f Simplify the autoupgrade interface 
llvm-svn: 26475
 2006-03-02 23:59:12 +00:00
Chris Lattner
c8da528e6c Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving 
PR709, and paving the way for future progress.

Significantly refactor autoupgrading code, to handle the more complex case
(where we upgrade one argument in a function), and fix some bugs in it.

Testcase here: llvm/test/Regression/Bytecode/memcpy.ll

llvm-svn: 26474
 2006-03-02 23:58:40 +00:00
Chris Lattner
9a522f068e add a note 
llvm-svn: 26472
 2006-03-02 22:34:38 +00:00
Evan Cheng
71fa36ef12 - Fixed some priority calculation bugs that were causing bug 478. Among them: 
a predecessor appearing more than once in the operand list was counted as
  multiple predecessor; priority1 should be updated during scheduling;
  CycleBound was updated after the node is inserted into priority queue; one
  of the tie breaking condition was flipped.
- Take into consideration of two address opcodes. If a predecessor is a def&use
  operand, it should have a higher priority.
- Scheduler should also favor floaters, i.e. nodes that do not have real
  predecessors such as MOV32ri.
- The scheduling fixes / tweaks fixed bug 478:
        .text
        .align  4
        .globl  _f
_f:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        movl %eax, %edx
        imull %ecx, %edx
        imull %eax, %eax
        imull %ecx, %ecx
        addl %eax, %ecx
        leal (%ecx,%edx,2), %eax
        ret

  It is also a slight performance win (1% - 3%) for most tests.

llvm-svn: 26470
 2006-03-02 21:38:29 +00:00
Chris Lattner
092112baa6 Generalize the REM folding code to handle another case Nick Lewycky 
pointed out: realize the AND can provide factors and look through Casts.

llvm-svn: 26469
 2006-03-02 06:50:58 +00:00
Jim Laskey
7ee6df939e Support for enumerations. 
llvm-svn: 26466
 2006-03-01 23:52:37 +00:00
Evan Cheng
e99e63bfc8 Don't print llvm constant in assmebly file. Assembler won't like comments that 
span multiple lines.

llvm-svn: 26463
 2006-03-01 22:18:09 +00:00
Evan Cheng
dd066eac71 Back out my last check-in. Wrong place to fix it. 
llvm-svn: 26462
 2006-03-01 22:17:00 +00:00
Evan Cheng
25ecfb9411 AsmWriter should not print LLVM constant in comment. Assembler won't like 
multi-line comments.

llvm-svn: 26461
 2006-03-01 22:00:59 +00:00
Chris Lattner
d45d3b68b0 Fix CodeGen/Generic/2006-03-01-dagcombineinfloop.ll, an infinite loop 
in the dag combiner on 176.gcc on x86.

llvm-svn: 26459
 2006-03-01 21:47:21 +00:00
Jim Laskey
c73a56236e Switch back to using actual dwarf tags. Simplifies code without loss to other 
debug forms.

llvm-svn: 26455
 2006-03-01 20:39:36 +00:00
Chris Lattner
5544c94289 Fix a typo evan noticed 
llvm-svn: 26454
 2006-03-01 19:55:35 +00:00
Jim Laskey
09c0bfcbaf Use context and not compile unit. 
llvm-svn: 26453
 2006-03-01 18:20:30 +00:00
Jim Laskey
d614a770a6 I guess I can handle large type sizes. 
llvm-svn: 26452
 2006-03-01 18:13:05 +00:00
Jim Laskey
08fa0d0d99 Basic array support. 
llvm-svn: 26451
 2006-03-01 17:53:02 +00:00
Chris Lattner
317021b6c4 Implement CodeGen/PowerPC/or-addressing-mode.ll, which is also PR668. 
llvm-svn: 26450
 2006-03-01 07:14:48 +00:00
Chris Lattner
caec0d887c add a note 
llvm-svn: 26448
 2006-03-01 06:36:20 +00:00
Chris Lattner
137c02aa60 Compile this: 
void foo(float a, int *b) { *b = a; }

to this:

_foo:
        fctiwz f0, f1
        stfiwx f0, 0, r4
        blr

instead of this:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        stw r2, 0(r4)
        blr

This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.

llvm-svn: 26447
 2006-03-01 05:50:56 +00:00
Chris Lattner
6ba976b557 Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll. 
llvm-svn: 26445
 2006-03-01 04:57:39 +00:00
Chris Lattner
6434a21c21 Add support for target-specific dag combines 
llvm-svn: 26443
 2006-03-01 04:53:38 +00:00
Chris Lattner
40501a50fe Add interfaces for targets to provide target-specific dag combiner optimizations. 
llvm-svn: 26442
 2006-03-01 04:52:55 +00:00
Chris Lattner
f571b8c5dd Add a new AddToWorkList method, start using it 
llvm-svn: 26441
 2006-03-01 04:03:14 +00:00
Chris Lattner
7ba1c5e025 Pull shifts by a constant through multiplies (a form of reassociation), 
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll

llvm-svn: 26440
 2006-03-01 03:44:24 +00:00
Evan Cheng
ebe1f272b7 Vector op lowering. 
llvm-svn: 26438
 2006-03-01 01:11:20 +00:00
Evan Cheng
d8b92e04a2 Vector ops lowering. 
llvm-svn: 26436
 2006-03-01 01:09:54 +00:00
Evan Cheng
44412bbde0 New type v2f32. 
llvm-svn: 26435
 2006-03-01 01:06:22 +00:00
Evan Cheng
2cbf9d93d3 - Added VConstant as an abstract version of ConstantVec. 
- All abstrct vector nodes must have # of elements and element type as their
first two operands.

llvm-svn: 26432
 2006-03-01 00:51:13 +00:00
Evan Cheng
e5ae39621b Another entry. 
llvm-svn: 26430
 2006-02-28 23:38:49 +00:00
Evan Cheng
fab8a53944 Don't match x << 1 to LEAL. It's better to emit x + x. 
llvm-svn: 26429
 2006-02-28 21:13:57 +00:00
Jim Laskey
090da116cc Add const, volatile, restrict support. 
Add array of debug descriptor support.

llvm-svn: 26428
 2006-02-28 20:15:07 +00:00
Chris Lattner
74e3523663 Fix a regression in a patch from a couple of days ago. This fixes 
Transforms/InstCombine/2006-02-28-Crash.ll

llvm-svn: 26427
 2006-02-28 19:47:20 +00:00
Chris Lattner
9f70a7924d Add a subtarget feature for the stfiwx instruction. I know the G5 has it, 
but I don't know what other PPC impls do.  If someone could update the proc
table, I would appreciate it :)

llvm-svn: 26421
 2006-02-28 07:08:22 +00:00
Chris Lattner
3aa1cd759e Compile: 
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }

to:

_foo4:
        lbz r3,1(r3)
        blr
_foo5:
        lbz r3,1(r3)
        blr

not:

_foo4:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr
_foo5:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

llvm-svn: 26419
 2006-02-28 06:49:37 +00:00
Chris Lattner
866634d77f remove implemented item 
llvm-svn: 26418
 2006-02-28 06:36:04 +00:00
Chris Lattner
24a22066c4 Fold "and (LOAD P), 255" -> zextload. This allows us to compile: 
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
        lbz r3, 3(r3)
        blr

instead of:

_foo3:
        lwz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

and:

unsigned short foo2(float a) { return a; }

as:
_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lhz r3, -2(r1)
        blr

instead of:

_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26417
 2006-02-28 06:35:35 +00:00
Chris Lattner
152201257d fold (sra (sra x, c1), c2) -> (sra x, c1+c2) 
llvm-svn: 26416
 2006-02-28 06:23:04 +00:00
Chris Lattner
684fc3dc9d Implement rem.ll:test[7-9] and PR712 
llvm-svn: 26415
 2006-02-28 05:49:21 +00:00
Chris Lattner
63647f5028 Simplify some code now that the RHS of a rem can't be 0 
llvm-svn: 26413
 2006-02-28 05:40:55 +00:00
Chris Lattner
3b9fc06289 Rearrange some code, fold "rem X, 0", implementing rem.ll:test6 
llvm-svn: 26411
 2006-02-28 05:30:45 +00:00
Chris Lattner
a451b5ffd4 Add support for output memory constraints. 
llvm-svn: 26410
 2006-02-27 23:45:39 +00:00
Jim Laskey
cb47e213c0 Qualify dwarf namespace inside llvm namespace. 
llvm-svn: 26409
 2006-02-27 22:37:23 +00:00
Nate Begeman
56a4dafd8d readme updates 
llvm-svn: 26405
 2006-02-27 22:08:36 +00:00
Jim Laskey
34708479e7 Partial enabling of functions. 
llvm-svn: 26404
 2006-02-27 20:37:42 +00:00
Chris Lattner
da5029790a Don't print constant initializers, they may span lines now. 
llvm-svn: 26403
 2006-02-27 20:09:23 +00:00
Jim Laskey
618fe7bec1 Supporting multiple compile units. 
llvm-svn: 26402
 2006-02-27 17:27:12 +00:00
Jim Laskey
939d2084ad Re-orging file. 
llvm-svn: 26401
 2006-02-27 12:43:29 +00:00
Jim Laskey
64fdd3498f Pretty print large struct constants. 
llvm-svn: 26400
 2006-02-27 10:33:53 +00:00
Jim Laskey
98bb365444 Removed dependency on how operands are printed (want multi-line.) 
llvm-svn: 26399
 2006-02-27 10:29:04 +00:00
Chris Lattner
792bfd8f28 Merge two almost-identical pieces of code. 
Make this code more powerful by using ComputeMaskedBits instead of looking
for an AND operand.  This lets us fold this:

int %test23(int %a) {
        %tmp.1 = and int %a, 1
        %tmp.2 = seteq int %tmp.1, 0
        %tmp.3 = cast bool %tmp.2 to int  ;; xor tmp1, 1
        ret int %tmp.3
}

into: xor (and a, 1), 1
llvm-svn: 26396
 2006-02-27 02:38:23 +00:00
Chris Lattner
c27bba037b Fold (A^B) == A -> B == 0 
and  (A-B) == A  ->  B == 0

llvm-svn: 26394
 2006-02-27 01:44:11 +00:00
Chris Lattner
799e9e2e64 Implement bit propagation through sub nodes, this (re)implements 
PowerPC/div-2.ll

llvm-svn: 26392
 2006-02-27 01:00:42 +00:00
Chris Lattner
baea29f33d remove some completed notes 
llvm-svn: 26390
 2006-02-27 00:39:31 +00:00
Chris Lattner
4a7d24d210 Check RHS simplification before LHS simplification to avoid infinitely looping 
on PowerPC/small-arguments.ll

llvm-svn: 26389
 2006-02-27 00:36:27 +00:00
Chris Lattner
265c99ec1c Just like we use the RHS of an AND to simplify the LHS, use the LHS to 
simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26388
 2006-02-27 00:22:28 +00:00
Chris Lattner
8f6651a056 Add a bunch of missed cases. Perhaps the most significant of which is that 
assertzext produces zero bits.

llvm-svn: 26386
 2006-02-26 23:36:02 +00:00
Chris Lattner
80e2fa8a9d Fold (X|C1)^C2 -> X^(C1|C2) when possible. This implements 
InstCombine/or.ll:test23.

llvm-svn: 26385
 2006-02-26 19:57:54 +00:00
Jim Laskey
0ba89a0a4c Reverting. Didn't realize some developers were embedding constants in their 
target assembler code gen.

llvm-svn: 26383
 2006-02-26 10:16:05 +00:00
Evan Cheng
40a98fd65d ConstantPoolIndex is now the displacement portion of the address (rather 
than base).

llvm-svn: 26382
 2006-02-26 09:12:34 +00:00
Evan Cheng
5abf5b2ce4 Print ConstantPoolSDNode offset field. 
llvm-svn: 26381
 2006-02-26 08:36:57 +00:00
Evan Cheng
a93aa7e4c9 Fixed ConstantPoolIndex operand asm print bug. This fixed 2005-07-17-INT-To-FP 
and 2005-05-12-Int64ToFP.

llvm-svn: 26380
 2006-02-26 08:28:12 +00:00
Jim Laskey
8ad04a557b Format large struct constants for readability. 
llvm-svn: 26379
 2006-02-25 12:27:03 +00:00
Evan Cheng
de768027d9 * Cleaned up addressing mode matching code. 
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.

llvm-svn: 26376
 2006-02-25 10:09:08 +00:00
Evan Cheng
8a6f03bb0e Updates. 
llvm-svn: 26375
 2006-02-25 10:04:07 +00:00
Evan Cheng
995c9806ba * Allow mul, shl nodes to be codegen'd as LEA (if appropriate). 
* Add patterns to handle GlobalAddress, ConstantPool, etc.
  MOV32ri to materialize these nodes in registers.
  ADD32ri to handle %reg + GA, etc.
  MOV32mi to handle store GA, etc. to memory.

llvm-svn: 26374
 2006-02-25 10:02:21 +00:00
Evan Cheng
1bd4077002 ConstantPoolIndex is now the displacement field of addressing mode. 
llvm-svn: 26373
 2006-02-25 09:56:50 +00:00
Evan Cheng
bd1279fd2a Added a common about the need for X86ISD::Wrapper. 
llvm-svn: 26372
 2006-02-25 09:55:19 +00:00
Evan Cheng
026fd6af96 Added an offset field to ConstantPoolSDNode. 
llvm-svn: 26371
 2006-02-25 09:54:52 +00:00
Chris Lattner
4f083f08ca Fix a bug that Evan exposed with some changes he's making, and that was 
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).

When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.

llvm-svn: 26369
 2006-02-25 02:17:31 +00:00
Chris Lattner
b06aa63852 Remove debugging printout :) 
Add a minor compile time win, no codegen change.

llvm-svn: 26368
 2006-02-25 02:03:40 +00:00
Chris Lattner
a342126820 Refactor some code from being inline to being out in a new class with methods. 
This gets rid of two gotos, which is always nice, and also adds some comments.

No functionality change, this is just a refactor.

llvm-svn: 26367
 2006-02-25 01:51:33 +00:00
Evan Cheng
07ffd089da Fix an obvious bug exposed when we are doing 
ADD X, 4
==>
MOV32ri $X+4, ...

llvm-svn: 26366
 2006-02-25 01:37:02 +00:00
Chris Lattner
bc35137363 Add memory printing support for PPC. Input memory operands now work with 
inline asms! :)

llvm-svn: 26365
 2006-02-24 20:27:40 +00:00
Chris Lattner
e2b0023f4e Use the PrintAsmMemoryOperand to print addressing modes. 
llvm-svn: 26364
 2006-02-24 20:21:58 +00:00
Chris Lattner
22356863a0 Pass all the flags to the asm printer, not just the # operands. 
llvm-svn: 26362
 2006-02-24 19:50:58 +00:00
Chris Lattner
f1e0c1f0a8 rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope. 
Add support for addressing modes.

llvm-svn: 26361
 2006-02-24 19:18:20 +00:00
Chris Lattner
e00cf77ecb Refactor operand adding out to a new AddOperand method 
llvm-svn: 26358
 2006-02-24 18:54:03 +00:00
Chris Lattner
304aeda827 Fix a problem that Nate noticed that boils down to an over conservative check 
in the code that does "select C, (X+Y), (X-Y) --> (X+(select C, Y, (-Y)))".
We now compile this loop:

LBB1_1: ; no_exit
        add r6, r2, r3
        subf r3, r2, r3
        cmpwi cr0, r2, 0
        addi r7, r5, 4
        lwz r2, 0(r5)
        addi r4, r4, 1
        blt cr0, LBB1_4 ; no_exit
LBB1_3: ; no_exit
        mr r3, r6
LBB1_4: ; no_exit
        cmpwi cr0, r4, 16
        mr r5, r7
        bne cr0, LBB1_1 ; no_exit

into this instead:

LBB1_1: ; no_exit
        srawi r6, r2, 31
        add r2, r2, r6
        xor r6, r2, r6
        addi r7, r5, 4
        lwz r2, 0(r5)
        addi r4, r4, 1
        add r3, r3, r6
        cmpwi cr0, r4, 16
        mr r5, r7
        bne cr0, LBB1_1 ; no_exit

llvm-svn: 26356
 2006-02-24 18:05:58 +00:00
Jim Laskey
fe79552c25 Add pointer and reference types. Added short-term code to ignore NULL types 
(to allow llvm-gcc4 to build.)

llvm-svn: 26355
 2006-02-24 16:46:40 +00:00
Jeff Cohen
9773f9c447 Get VC++ building again. 
llvm-svn: 26351
 2006-02-24 02:52:40 +00:00
Chris Lattner
6248339a24 Implement (most of) selection of inline asm memory operands. 
llvm-svn: 26350
 2006-02-24 02:13:54 +00:00
Chris Lattner
3d451516ec Implement selection of inline asm memory operands 
llvm-svn: 26348
 2006-02-24 02:13:12 +00:00
Chris Lattner
3f267c1683 Lower C_Memory operands. 
llvm-svn: 26346
 2006-02-24 01:11:24 +00:00
Chris Lattner
b5df999862 Recognize memory operand codes 
llvm-svn: 26345
 2006-02-24 01:10:46 +00:00
Chris Lattner
cd5ae150bb Parse the %*# constraint modifiers 
llvm-svn: 26341
 2006-02-23 23:36:53 +00:00
Jim Laskey
ddac333e72 Added basic support for typedefs. 
llvm-svn: 26339
 2006-02-23 22:37:30 +00:00
Evan Cheng
2720cd1d7e PPC JIT relocation model should be DynamicNoPIC. 
llvm-svn: 26338
 2006-02-23 22:18:07 +00:00
Evan Cheng
cb9fb051a5 - Clean up the lowering and selection code of ConstantPool, GlobalAddress, 
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335
 2006-02-23 20:41:18 +00:00
Chris Lattner
5a70e894d1 Fix an endianness problem on big-endian targets with expanded operands 
to inline asms.  Mark some methods const.

llvm-svn: 26334
 2006-02-23 20:06:57 +00:00
Chris Lattner
cdbd9d6d4c Implement the PPC inline asm "L" modifier. This allows us to compile: 
long long test(long long X) {
  __asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
  return X;
}

to:
        foo r2 r3 r2 r3

llvm-svn: 26333
 2006-02-23 19:31:10 +00:00
Chris Lattner
b4951fbe82 Record all of the expanded registers in the DAG and machine instr, fixing 
several bugs in inline asm expanded operands.

llvm-svn: 26332
 2006-02-23 19:21:04 +00:00
Jim Laskey
1ee7e91e5c DwarfWriter reading basic type information from llvm-gcc4 code. 
llvm-svn: 26331
 2006-02-23 16:58:18 +00:00
Chris Lattner
b74e255d8b Code cleanups, no functionality change 
llvm-svn: 26328
 2006-02-23 06:44:17 +00:00
Chris Lattner
72d24be146 "." isn't enough to get a private label on linux, use ".L". 
llvm-svn: 26327
 2006-02-23 05:25:02 +00:00
Chris Lattner
23b302ce83 add a small and simple case. 
llvm-svn: 26326
 2006-02-23 05:17:43 +00:00
Evan Cheng
a85c267431 A couple of new entries. 
llvm-svn: 26325
 2006-02-23 02:50:21 +00:00
Evan Cheng
2977507828 PIC related bug fixes. 
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324
 2006-02-23 02:43:52 +00:00
Evan Cheng
b8000b03aa X86 codegen tweak to use lea in another case: 
Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.

llvm-svn: 26323
 2006-02-23 00:13:58 +00:00
Evan Cheng
4e31b8eaed Missing .globl for weak / link-once .text symbols. 
llvm-svn: 26321
 2006-02-22 23:59:57 +00:00
Chris Lattner
fafc1f9c51 Fix Regression/Transforms/LoopUnswitch/2006-02-22-UnswitchCrash.ll, which 
caused SPASS to fail building last night.

We can't trivially unswitch a loop if the exit block has phi nodes in it,
because we don't know which predecessor to use.

llvm-svn: 26320
 2006-02-22 23:55:00 +00:00
Chris Lattner
2fc133f091 This fixes a couple of problems with expansion 
llvm-svn: 26318
 2006-02-22 23:09:03 +00:00
Chris Lattner
db19979bea Don't return registers from register classes that aren't legal. 
llvm-svn: 26317
 2006-02-22 23:00:51 +00:00
Chris Lattner
d1886b8a4e Change a whole bunch of code to be built around RegsForValue instead of 
a single register number.  This fully implements promotion for inline asms,
expand is close but not quite right yet.

llvm-svn: 26316
 2006-02-22 22:37:12 +00:00
Evan Cheng
305141c1ba - Added option -relocation-model to set relocation model. Valid values include static, pic, 
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
 2006-02-22 20:19:42 +00:00
Jim Laskey
b62a583c99 Coordinate activities with llvm-gcc4 and dwarf. 
llvm-svn: 26314
 2006-02-22 19:02:11 +00:00
Chris Lattner
b539c70e07 Add some comments, simplify some code, and fix a bug that caused rewriting 
to rewrite with the wrong value.

llvm-svn: 26311
 2006-02-22 06:37:14 +00:00
Evan Cheng
005de9e2bb Added MMX, SSE1, and SSE2 vector instructions and some simple patterns. 
Fixed some existing bugs (wrong predicates, prefixes) at the same time.

llvm-svn: 26310
 2006-02-22 02:26:30 +00:00
Chris Lattner
6bb2c3e9cd split register class handling from explicit physreg handling. 
llvm-svn: 26308
 2006-02-22 00:56:39 +00:00
Chris Lattner
b5b7cc99c4 Adjust to changes in getRegForInlineAsmConstraint prototype 
llvm-svn: 26306
 2006-02-21 23:12:12 +00:00
Chris Lattner
a124432746 Updates to match change of getRegForInlineAsmConstraint prototype 
llvm-svn: 26305
 2006-02-21 23:11:00 +00:00
Evan Cheng
8ab6294f94 One more round of reorg so sabre doesn't freak out. :-) 
llvm-svn: 26303
 2006-02-21 20:00:20 +00:00
Evan Cheng
f7296d8fa5 A big more cleaning up. 
llvm-svn: 26302
 2006-02-21 19:30:30 +00:00
Evan Cheng
223d3a073a Moving things to their proper places. 
llvm-svn: 26301
 2006-02-21 19:26:52 +00:00
Evan Cheng
fee17dfff8 Split instruction info into multiple files, one for each of x87, MMX, and SSE. 
llvm-svn: 26300
 2006-02-21 19:13:53 +00:00
Chris Lattner
5d8ecbe2e5 missed optzn 
llvm-svn: 26299
 2006-02-21 18:29:44 +00:00
Chris Lattner
dfdfc6b22d The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter 
instructions are expensive.

llvm-svn: 26298
 2006-02-21 18:04:32 +00:00
Evan Cheng
89553f1e86 Added separate alias instructions for SSE logical ops that operate on non-packed types. 
llvm-svn: 26297
 2006-02-21 02:24:38 +00:00
Evan Cheng
e68325d8aa Added MMX and XMM packed integer move instructions, movd and movq. 
llvm-svn: 26296
 2006-02-21 01:39:57 +00:00
Evan Cheng
1b23fdda1a Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. 
Added generic vector types: VR64 and VR128.

llvm-svn: 26295
 2006-02-21 01:38:21 +00:00
Evan Cheng
6a9422ce1c Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit 
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).

llvm-svn: 26294
 2006-02-20 22:34:53 +00:00
Evan Cheng
a0f9da472a Some updates 
llvm-svn: 26292
 2006-02-20 19:58:27 +00:00
Chris Lattner
4b5130d957 Fix a problem Nate and Duraid reported where simplifying nodes can cause 
them to get ressurected, in which case, deleting the undead nodes is
unfriendly.

llvm-svn: 26291
 2006-02-20 06:51:04 +00:00
Chris Lattner
d5b8bfef65 Fix a problem on itanium with memset. The value to set has been promoted to 
i64 before this code, so zero_ext doesn't work.

llvm-svn: 26290
 2006-02-20 06:38:35 +00:00
Chris Lattner
4121b502d3 improved support for branch folding, still not enabled. 
llvm-svn: 26289
 2006-02-18 07:57:38 +00:00
Evan Cheng
063df91002 If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take 
advantage of fisttpll.

llvm-svn: 26288
 2006-02-18 07:26:17 +00:00
Jeff Cohen
6e4fbcce8f Fix bugs identified by VC++. 
llvm-svn: 26287
 2006-02-18 03:20:33 +00:00
Nate Begeman
d89b8719f3 Add a fold for add that exchanges it with a constant shift if possible, so 
that the shift may be more easily folded into other operations.

llvm-svn: 26286
 2006-02-18 02:43:25 +00:00
Chris Lattner
71d62c944d Implement deletion of dead blocks, currently disabled. 
llvm-svn: 26285
 2006-02-18 02:42:34 +00:00
Nate Begeman
bbcae2bf3d Add checks to make sure we don't create bogus extend nodes, and fix a bug 
where we were doing exactly that which was causing failures on x86 and
alpha.

llvm-svn: 26284
 2006-02-18 02:40:58 +00:00
Evan Cheng
b3d9ee74ad Added fisttp for fp to int conversion. 
llvm-svn: 26283
 2006-02-18 02:36:28 +00:00
Evan Cheng
d2ad380df9 Disable PIC for JIT. 
llvm-svn: 26281
 2006-02-18 01:49:25 +00:00
Chris Lattner
5f12d7c418 a previous patch completely disabled trivial unswitching, this fixees it. 
Thanks to nate for pointing this out :)

llvm-svn: 26280
 2006-02-18 01:32:04 +00:00
Chris Lattner
359476b89f initial trivial support for folding branches that have now-constant destinations. 
llvm-svn: 26279
 2006-02-18 01:27:45 +00:00
Evan Cheng
09bd678546 Jit does not support PIC yet. 
llvm-svn: 26278
 2006-02-18 00:57:10 +00:00
Chris Lattner
39356756ac When unswitching a loop, make sure to update loop info with exit blocks in 
the right loop.

llvm-svn: 26277
 2006-02-18 00:55:32 +00:00
Chris Lattner
d9b0de3240 Fix Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll 
llvm-svn: 26275
 2006-02-18 00:33:17 +00:00
Evan Cheng
bf3558a375 x86 / Darwin PIC support. 
llvm-svn: 26273
 2006-02-18 00:15:05 +00:00
Evan Cheng
c4cda2b89a Moved PICEnabled to include/llvm/Target/TargetOptions.h 
llvm-svn: 26272
 2006-02-18 00:08:58 +00:00
Chris Lattner
bd36f029ef Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't 
exactly the API we wanted to call into.  This fixes the crash on crafty last
night.

llvm-svn: 26269
 2006-02-17 21:58:01 +00:00
Nate Begeman
7ebd8fd80d Clean up DemandedBitsAreZero interface 
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal

llvm-svn: 26263
 2006-02-17 19:54:08 +00:00
Nate Begeman
a3a0a0340f Don't expand sdiv by power of two before legalize, since it will likely 
generate illegal nodes.

llvm-svn: 26261
 2006-02-17 07:26:20 +00:00
Chris Lattner
3a899dbbc8 unbreak the build 
llvm-svn: 26260
 2006-02-17 07:09:27 +00:00
Evan Cheng
330fd348ff Unbreak x86 be 
llvm-svn: 26259
 2006-02-17 07:01:52 +00:00
Chris Lattner
d5a4da466a Fix loops where the header has an exit, fixing a loop-unswitch crash on crafty 
llvm-svn: 26258
 2006-02-17 06:39:56 +00:00
Nate Begeman
9c0ab71f4a kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Chris Lattner
6632b8ab04 Fix another miscompilation exposed by lencode, where we lowered i64->f32 
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).

llvm-svn: 26254
 2006-02-17 04:32:33 +00:00
Chris Lattner
13dd179299 add note about div by power of 2 
llvm-svn: 26253
 2006-02-17 04:20:13 +00:00
Jeff Cohen
04caf92624 Fix bug noticed by VC++. 
llvm-svn: 26252
 2006-02-17 02:12:18 +00:00
Nate Begeman
224405b002 Whoops, didn't mean to check this in yet. 
llvm-svn: 26250
 2006-02-17 00:56:19 +00:00
Nate Begeman
7269afbf38 Add a missing and useful pat frag 
llvm-svn: 26249
 2006-02-17 00:51:06 +00:00
Chris Lattner
e2286db8d8 start of some new simplification code, not thoroughly tested, use at your own 
risk :)

llvm-svn: 26248
 2006-02-17 00:31:07 +00:00
Evan Cheng
c7b32ddecc Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers" 
issue. Need to do more experiments.

llvm-svn: 26247
 2006-02-17 00:04:28 +00:00
Nate Begeman
b0ec087c0f Kill the x86 pattern isel. boom. 
llvm-svn: 26246
 2006-02-17 00:03:04 +00:00
Evan Cheng
3d0135afdc Remove the entry about using movapd for SSE reg-reg moves. 
llvm-svn: 26245
 2006-02-17 00:00:58 +00:00
Evan Cheng
9de0ad321a pxor (for FLD0SS) encoding was missing the OpSize prefix. 
llvm-svn: 26244
 2006-02-16 23:59:30 +00:00
Chris Lattner
585198f5a8 Remove the skeleton target, it doesn't produce useful code and there are 
other small targets that do that can be learned from.  They also have
the added advantage of being tested :)

llvm-svn: 26243
 2006-02-16 23:14:50 +00:00
Evan Cheng
a2433f32b4 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it 
turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242
 2006-02-16 23:11:42 +00:00
Evan Cheng
bf4008c701 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241
 2006-02-16 22:45:17 +00:00
Evan Cheng
447c171afd Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
llvm-svn: 26240
 2006-02-16 21:20:26 +00:00
Nate Begeman
0bc71999b9 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Chris Lattner
847c7ca438 Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. Apparently they do different things :) 
This fixes a testcase that nate reduced from spass.

Also included are a couple minor code changes that don't affect the generated
code at all.

llvm-svn: 26235
 2006-02-16 19:36:22 +00:00
Evan Cheng
af9730a217 MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg. 
llvm-svn: 26234
 2006-02-16 19:34:41 +00:00
Duraid Madina
3fcb00a53f distinguish between objects and register names, now we can have stuff 
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232
 2006-02-16 13:12:57 +00:00
Evan Cheng
131901cbb8 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
 2006-02-16 08:27:56 +00:00
Chris Lattner
6f407a54c1 Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written 
by Nate, I'm just committing it for him.

llvm-svn: 26230
 2006-02-16 08:02:36 +00:00
Jeff Cohen
381e19a745 Fix VC++ warning. 
llvm-svn: 26228
 2006-02-16 04:07:37 +00:00
Evan Cheng
74228303ad Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg 
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.

llvm-svn: 26226
 2006-02-16 01:50:02 +00:00
Chris Lattner
57142c7e12 fix a bug where we unswitched the wrong way 
llvm-svn: 26225
 2006-02-16 01:24:41 +00:00
Evan Cheng
2f3056286a A bit more memset / memcpy optimization. 
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).

llvm-svn: 26224
 2006-02-16 00:21:07 +00:00
Chris Lattner
0a6283e1c2 Implement trivial unswitching for switch stmts. This allows us to trivial 
unswitch this loop on 2 before sweating to unswitch on 1/3.

void test4(int N, int i, int C, int*P, int*Q) {
  int j;
  for (j = 0; j < N; ++j) {
    switch (C) {                // general unswitching.
    default: P[i+j] = 0; break;
    case 1: Q[i+j] = 0; break;
    case 3: P[i+j] = Q[i+j]; break;
    case 2: break;              //  TRIVIAL UNSWITCH on C==2
    }
  }
}

llvm-svn: 26223
 2006-02-15 22:52:05 +00:00
Evan Cheng
93b4f4fa67 Remove an entry. 
llvm-svn: 26222
 2006-02-15 22:14:34 +00:00
Evan Cheng
07063456aa Remove an unused function parameter. 
llvm-svn: 26221
 2006-02-15 22:12:35 +00:00
Chris Lattner
4b996ebd5e make "trivial" unswitching significantly more general. It can now handle 
this for example:

  for (j = 0; j < N; ++j) {     // trivial unswitch
    if (C)
      P[i+j] = 0;
  }

turning it into the obvious code without bothering to duplicate an empty loop.

llvm-svn: 26220
 2006-02-15 22:03:36 +00:00
Evan Cheng
5c2ecfd29b Turn a memcpy from string constant into a series of stores of constant values. 
llvm-svn: 26219
 2006-02-15 21:59:04 +00:00
Andrew Lenharth
f66fde7b14 fix a bunch of alpha regressions. see bug 709 
llvm-svn: 26218
 2006-02-15 21:13:37 +00:00
Chris Lattner
d720ec9449 new test 
llvm-svn: 26217
 2006-02-15 19:52:06 +00:00
Jim Laskey
e51152ac31 Should not combine ISD::LOCATIONs until we have scheme to remove from 
MachineDebugInfo tables.

llvm-svn: 26216
 2006-02-15 19:34:44 +00:00
Chris Lattner
9268890212 Checking the wrong value. This caused us to emit silly code like 
Y = seteq bool X, true
instead of just using X :)

llvm-svn: 26215
 2006-02-15 19:05:52 +00:00
Chris Lattner
ed07ecc5e3 Convert this over to work with the new makefiles 
llvm-svn: 26206
 2006-02-15 07:22:58 +00:00
Chris Lattner
e75debf037 Sparc actually *DOES* have a directive for emitting zeros. In fact, it requires 
it, because this:

.bss
X:
.byte 0

results in the assembler warning: "initialization in bss segment".  Annoying.

llvm-svn: 26204
 2006-02-15 07:07:14 +00:00