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49355 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
3824b766ac Organize UNPCK* patterns, also add remaining for AVX. 
llvm-svn: 138519
 2011-08-24 23:18:06 +00:00
Bruno Cardoso Lopes
82c8bc7efd Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicate 
the missing ones for AVX.

llvm-svn: 138518
 2011-08-24 23:18:04 +00:00
Bruno Cardoso Lopes
d315a6b6e6 Organize and tidy up MOVDDUP section. Also update comments! 
llvm-svn: 138517
 2011-08-24 23:18:02 +00:00
Bruno Cardoso Lopes
762fb13cc9 Move MOVHLPS patterns close to MOVHLPS definition, and duplicate the 
pattern for 128-bit AVX mode.

llvm-svn: 138516
 2011-08-24 23:17:59 +00:00
Bruno Cardoso Lopes
d62766849f Move all PSHUF* patterns close to the PSHUF* definitions. Also be 
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Remove old and now wrong comments!

llvm-svn: 138515
 2011-08-24 23:17:57 +00:00
Bruno Cardoso Lopes
122f7cfc92 Move all SHUFP* patterns close to the SHUFP* definitions. Also be 
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Make the mask check more strict, to be
clear it won't be used to match to 256-bit versions!

llvm-svn: 138514
 2011-08-24 23:17:55 +00:00
Owen Anderson
8a6cf48f0e Perform more thorough checking of t2IT mask parameters, which fixes all remaining crashers when disassembling the entire 16-bit instruction space. 
llvm-svn: 138507
 2011-08-24 22:40:22 +00:00
Eli Friedman
b6597a2e70 Hook up 64-bit atomic load/store on x86-32. I plan to write more efficient implementations eventually. 
llvm-svn: 138505
 2011-08-24 22:33:28 +00:00
Evan Cheng
7bfc442b2d Some autoconf tests use module level inline asm to test compiler's handling of 
.cfi_startproc. e.g. libffi:

 $ cat confopt.c 
asm (".cfi_startproc\n\t.cfi_endproc");

int main () { return 0; }

Teach MC / dwarf emission to handle these cfi directives which essentially
create an empty frame.

rdar://10017184

llvm-svn: 138504
 2011-08-24 22:31:37 +00:00
Jim Grosbach
76b50c3819 ARM asm backend initialize isThumbMode based on target triple. 
llvm-svn: 138501
 2011-08-24 22:27:35 +00:00
Jim Grosbach
7374e16344 Thumb .n mnemonic qualifiers can be ignored for now. 
We'll need to pay attention to them when we start getting more serious about
the details of parsing thumb2 assembly.

llvm-svn: 138500
 2011-08-24 22:19:48 +00:00
Jim Grosbach
effaf1e15d Thumb parsing and encoding for SUB (SP minu immediate). 
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.

llvm-svn: 138494
 2011-08-24 21:42:27 +00:00
Owen Anderson
3732f1644b Be careful not to walk off the end of the operand info list while updating VFP predicates. 
llvm-svn: 138492
 2011-08-24 21:35:46 +00:00
Jim Grosbach
b2b155a93f Thumb parsing and encoding support for ADD SP instructions. 
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.

llvm-svn: 138488
 2011-08-24 21:22:15 +00:00
Eli Friedman
e4cd816e7b Fix whitespace. 
llvm-svn: 138487
 2011-08-24 21:17:30 +00:00
Bill Wendling
15062f817a Skip the landingpad instruction when determining the insertion point. 
llvm-svn: 138481
 2011-08-24 21:06:46 +00:00
Eli Friedman
6f95a6ae1b Basic x86 code generation for atomic load and store instructions. 
llvm-svn: 138478
 2011-08-24 20:50:09 +00:00
Bill Wendling
0301dcfde8 Use getFirstInsertionPt instead of getFirstNonPHI so that it skips to the proper 
insertion place.

llvm-svn: 138473
 2011-08-24 20:28:43 +00:00
Nadav Rotem
43673d6d0b Implement Constant::isAllOnesValue(). Fix ConstantFolding to use the new api. 
llvm-svn: 138469
 2011-08-24 20:18:38 +00:00
Jim Grosbach
ccee1ff0f5 When printing Thumb1 NOP ('mov r8, r8'), make sure to print the predicate. 
rdar://10015134

llvm-svn: 138467
 2011-08-24 20:06:14 +00:00
Bruno Cardoso Lopes
734febce18 Mark VZEROALL as clobbering all YMM registers 
llvm-svn: 138461
 2011-08-24 18:48:33 +00:00
Jim Grosbach
9ae0de4db3 Add missing explicit writeback operand to tSTMIA_UPD. 
rdar://10014745

llvm-svn: 138457
 2011-08-24 18:19:42 +00:00
Evan Cheng
420bf5446c Move TargetRegistry and TargetSelect from Target to Support where they belong. 
These are strictly utilities for registering targets and components.

llvm-svn: 138450
 2011-08-24 18:08:43 +00:00
Rafael Espindola
e864ec28bd Fix a crashing bug in SplitBlock when it is called on a block with no 
dominator information even though dominators were previously computed.

Patch by Nick Sumner.

llvm-svn: 138449
 2011-08-24 18:07:01 +00:00
Jim Grosbach
bf012c3f19 Thumb add SP assembly syntax fix. 
llvm-svn: 138448
 2011-08-24 18:04:27 +00:00
Jim Grosbach
b33129ebad Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. 
Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.

llvm-svn: 138445
 2011-08-24 17:46:13 +00:00
Owen Anderson
ee4d781cd3 Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate. 
llvm-svn: 138443
 2011-08-24 17:21:43 +00:00
Jim Grosbach
6d81544e1a Tidy up. Trailing whitespace. 
llvm-svn: 138437
 2011-08-24 16:44:17 +00:00
Richard Osborne
6b6b0b535d Add Uses=[SP] to call instructions. This fixes a miscompilation with a 
variable sized alloca.

llvm-svn: 138433
 2011-08-24 13:32:43 +00:00
Craig Topper
1da38a34a6 Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711. 
llvm-svn: 138427
 2011-08-24 06:14:18 +00:00
Bill Wendling
2cd76365f2 Add the sentinal "no handle" value to the ResumeInst. 
A value of -1 at a call site tells the personality function that this call isn't
handled by the current function. Since the ResumeInsts are converted to calls to
_Unwind_SjLj_Resume, add a (volatile) store of -1 to its 'call site'.

llvm-svn: 138416
 2011-08-24 00:00:23 +00:00
Bill Wendling
79b1f95f89 Don't replace *all* uses with the new stuff. 
This is not necessarily the first or dominating use of the EH values. The IR
breaks if it's not. So replace the specific value in the instruction with the
new value.

llvm-svn: 138406
 2011-08-23 22:55:03 +00:00
Bill Wendling
acd21d7162 Look at the end of the entry block for an invoke. 
The invoke could be at the end of the entry block. If it's the only one, then we
won't process all of the landingpad instructions correctly. This code is
currently ugly, but should be made much nicer once the new EH switch is thrown.

llvm-svn: 138397
 2011-08-23 22:20:16 +00:00
Bruno Cardoso Lopes
8959b54713 Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit 
permutations. Also tidy up some patterns and make them close to their
instruction definition!

llvm-svn: 138392
 2011-08-23 22:06:37 +00:00
Bill Wendling
3de8a041b7 A landingpad instruction is neither folded nor dead. 
llvm-svn: 138387
 2011-08-23 21:33:05 +00:00
Jim Grosbach
b65ec7c64f Move ARM frame-unwinding EHABI handling a touch earlier. 
It should go before AsmPrinter MC pseudo expansion since it's based on
MachineInstr, not MCInst. Otherwise any frame related pseudo instructions
may be missed.

llvm-svn: 138386
 2011-08-23 21:32:34 +00:00
Jim Grosbach
3832c5ac34 [SU]XT[BH] are only available on ARMv6 and up. 
llvm-svn: 138373
 2011-08-23 20:53:08 +00:00
Nate Begeman
87ffb9491b Add some useful accessors to c++ api that appear to be missing from the c api 
llvm-svn: 138371
 2011-08-23 20:27:46 +00:00
Evan Cheng
ed13551c1d Some refactoring so TargetRegistry.h no longer has to include any files 
from MC.

llvm-svn: 138367
 2011-08-23 20:15:21 +00:00
Eric Christopher
aa4993b9aa Revert "Address Duncan's CR request:" 
This reverts commit 20a05be15ea5271ab6185b83200fa88263362400. (svn rev 138340)

Conflicts:

	test/Transforms/InstCombine/bitcast.ll

llvm-svn: 138366
 2011-08-23 20:11:10 +00:00
Jim Grosbach
1f5b8e9044 Thumb parsing and encoding for SVC. 
llvm-svn: 138360
 2011-08-23 19:49:10 +00:00
Evan Cheng
ff0339eccc Fix 80 col violations. 
llvm-svn: 138356
 2011-08-23 19:17:21 +00:00
Nick Lewycky
11874a4e0a PerformSubCombine to work on integers larger than i128. Fixes a crasher. 
llvm-svn: 138354
 2011-08-23 19:01:24 +00:00
Jim Grosbach
f9bc99b518 Thumb parsing and encoding for tSTRspi. 
llvm-svn: 138348
 2011-08-23 18:39:41 +00:00
Jim Grosbach
3b20e779cd Thumb parsing and encoding for STM. 
llvm-svn: 138345
 2011-08-23 18:15:37 +00:00
Jim Grosbach
709c1644b0 Factor low reg checking into a helper function. 
llvm-svn: 138344
 2011-08-23 18:13:04 +00:00
Owen Anderson
3de2d7656d Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far. 
llvm-svn: 138341
 2011-08-23 17:51:38 +00:00
Nadav Rotem
d449bc9bff Address Duncan's CR request: 
1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector

llvm-svn: 138340
 2011-08-23 17:48:43 +00:00
Owen Anderson
4ae835d7c9 Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same instructions. 
llvm-svn: 138339
 2011-08-23 17:45:18 +00:00
Jim Grosbach
6ada94c011 Clean up Thumb load/store multiple definitions. 
There is no non-writeback store multiple instruction in Thumb1, so
don't define one. As a result load multiple is the only instantiation of
the multiclass, so refactor that away entirely.

llvm-svn: 138338
 2011-08-23 17:41:15 +00:00
Owen Anderson
9d5074746f Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing. 
llvm-svn: 138337
 2011-08-23 17:37:32 +00:00
Ivan Krasin
aa3c2057c5 This patch adds support of le32 pseudo-cpu that stands for generic 
32-bit little-endian CPU. Used by PNaCl and Emscripten.

llvm-svn: 138335
 2011-08-23 16:59:00 +00:00
Craig Topper
67b22aedb4 Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712. 
llvm-svn: 138321
 2011-08-23 04:36:33 +00:00
NAKAMURA Takumi
6b729bec35 lib/Support/Windows/Windows.h: Update required IE ver. 0x0600 should be enough for Windows XP. 
llvm-svn: 138319
 2011-08-23 03:49:11 +00:00
Bruno Cardoso Lopes
8024703a16 Introduce a pass to insert vzeroupper instructions to avoid AVX to 
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

llvm-svn: 138317
 2011-08-23 01:14:17 +00:00
Jim Grosbach
d299db0857 Thumb parsing and encoding for SBC. 
llvm-svn: 138311
 2011-08-22 23:55:58 +00:00
Jim Grosbach
5ae40d73a6 Thumb parsing and encoding for RSB. 
llvm-svn: 138308
 2011-08-22 23:47:13 +00:00
Owen Anderson
33f3f4ec2a Reject invalid imod values in t2CPS instructions. 
llvm-svn: 138306
 2011-08-22 23:44:04 +00:00
Bill Wendling
02e66489db Split the landing pad's edge. Then for all uses of a landingpad instruction's 
value, we insert a load of the exception object and selector object from memory,
which is where it actually resides. If it's used by a PHI node, we follow that
to where it is being used. Eventually, all landingpad instructions should have
no uses. Any PHI nodes that were associated with those landingpads should be
removed.

llvm-svn: 138302
 2011-08-22 23:38:40 +00:00
Owen Anderson
d5b7d73696 t2SMLAD is a four-register instruction, not a three-register one. 
llvm-svn: 138301
 2011-08-22 23:31:45 +00:00
Owen Anderson
c395a07c42 Correct operand naming of t2USAT16 to allow proper decoding. 
llvm-svn: 138300
 2011-08-22 23:27:47 +00:00
Jim Grosbach
a59709ec01 Revert r138278 now that r138289 has fixed the root issue. 
llvm-svn: 138299
 2011-08-22 23:25:48 +00:00
Owen Anderson
9e750147fb Match operand naming to allow correct decoding of t2LDRSH_POST. 
llvm-svn: 138298
 2011-08-22 23:22:05 +00:00
Jim Grosbach
54234257fa Improve error checking for tPUSH and tPOP register lists. 
llvm-svn: 138295
 2011-08-22 23:17:34 +00:00
Owen Anderson
1cc1a1cb6a Match operand names to provide correct decoding for Thumb2 SMULL. 
llvm-svn: 138294
 2011-08-22 23:16:48 +00:00
Owen Anderson
b400952853 Provide a correct decoder hook for Thumb2 shifted registers. Found by randomized testing. 
llvm-svn: 138292
 2011-08-22 23:10:16 +00:00
Ivan Krasin
47d91d86ca Add NativeClient support to Triple::ParseOS. 
llvm-svn: 138291
 2011-08-22 23:08:53 +00:00
Evan Cheng
a828915f91 Follow up to Jim's r138278. This fixes commuteInstruction so it handles two-address instructions correctly. I'll let Jim add a test case. :-) 
llvm-svn: 138289
 2011-08-22 23:04:56 +00:00
Jim Grosbach
ec3958e68e Thumb assemmbly parsing diagnostic improvements for LDM. 
llvm-svn: 138287
 2011-08-22 23:01:07 +00:00
Benjamin Kramer
bd13a6a319 X86: Add some operand types required to identify calls. 
llvm-svn: 138285
 2011-08-22 22:55:32 +00:00
Jim Grosbach
d28882c799 Temporarilly mark tMUL as not commutable. 
It's not playing nicely in the coalescer with the tied operand. Disable
commutability for now while we figure out the deeper fix.

llvm-svn: 138278
 2011-08-22 22:00:18 +00:00
Owen Anderson
a2231fad2e Provide operand encoding information for half-precision VCVT instructions. Found by randomized testing. 
llvm-svn: 138273
 2011-08-22 21:34:00 +00:00
Bruno Cardoso Lopes
8007165688 Add support for breaking 256-bit int VETCC into two 128-bit ones, 
avoding scalarization of the compare. Reduces code from 59 to 6
instructions. Fix PR10712.

llvm-svn: 138271
 2011-08-22 20:31:04 +00:00
Bruno Cardoso Lopes
23ff325f5b Add 128-bit AVX codegen for PCMP* family of integer instructions 
llvm-svn: 138270
 2011-08-22 20:31:00 +00:00
Owen Anderson
39d3f234f7 Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming majority of decoder crashes detected by randomized testing. 
llvm-svn: 138269
 2011-08-22 20:27:12 +00:00
Jordy Rose
62453a17f9 Make DynamicLibrary thread-safe w/r/t call to dlerror() after dlopen(). PR10718 
llvm-svn: 138260
 2011-08-22 19:01:52 +00:00
Jim Grosbach
303d34cede Tighten up ARM reglist validation a bit. 
llvm-svn: 138258
 2011-08-22 18:50:36 +00:00
Bill Wendling
675b27b3f9 Some whitespace fixes and #include reordering. 
llvm-svn: 138256
 2011-08-22 18:44:49 +00:00
Owen Anderson
926f360e53 Fix another batch of VLD/VST decoding crashes discovered by randomized testing. 
llvm-svn: 138255
 2011-08-22 18:42:13 +00:00
Nick Lewycky
0f0a595ec9 Be less redundant. 
llvm-svn: 138252
 2011-08-22 18:26:12 +00:00
Owen Anderson
816f5524f8 Correct writeback handling of duplicating VLD instructions. Discovered by randomized testing. 
llvm-svn: 138251
 2011-08-22 18:22:06 +00:00
Jim Grosbach
a5715c60b5 Clean up predicates on ARM target instruction aliases. 
llvm-svn: 138249
 2011-08-22 18:04:24 +00:00
Owen Anderson
59178665b5 Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add more tests. 
llvm-svn: 138246
 2011-08-22 17:56:58 +00:00
Dan Gohman
a6ceaf82c5 Add a comment. 
llvm-svn: 138243
 2011-08-22 17:29:37 +00:00
Dan Gohman
9619488506 Constant pointers to objects don't need reference counting. 
llvm-svn: 138242
 2011-08-22 17:29:11 +00:00
Benjamin Kramer
c767059573 PathV2: Handle more reserved filenames on windows. 
Patch by Aaron Ballman!

llvm-svn: 138213
 2011-08-20 21:36:38 +00:00
Jim Grosbach
a6e1ed8f2b Fix AsmParser binary precedence for shift operators. 
rdar://9976729

llvm-svn: 138208
 2011-08-20 16:24:13 +00:00
Nadav Rotem
1dc1eb1ae0 Add constant folding support for bitcasts of splat vectors to integers. 
llvm-svn: 138206
 2011-08-20 14:02:29 +00:00
NAKAMURA Takumi
e2ae0063cf lib/Support/CrashRecoveryContext.cpp: Add Win32 support to CrashRecoveryContext. Thanks to Aaron Ballman! 
llvm-svn: 138199
 2011-08-20 06:35:36 +00:00
NAKAMURA Takumi
c5e4d7690d lib/Support/Windows/Windows.h: Require at least Windows XP(5.1) API. We will not support Windows 2000 any more. 
llvm-svn: 138198
 2011-08-20 06:35:31 +00:00
Benjamin Kramer
1adacca2e5 Cast through intptr_t, ISO C++ requires it. 
llvm-svn: 138186
 2011-08-20 02:22:42 +00:00
Chad Rosier
3c596dbe51 Remove the VMOVQQ pseudo instruction. 
llvm-svn: 138177
 2011-08-20 00:52:40 +00:00
Chad Rosier
0d49bb37fb Remove VMOVQQQQ pseudo instruction. 
llvm-svn: 138174
 2011-08-20 00:40:14 +00:00
Jakob Stoklund Olesen
ee6264c790 Add <imp-def> operands to QQ and QQQQ stack loads. 
This pleases the register scavenger and brings
test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll a little closer to
working with -verify-machineinstrs.

llvm-svn: 138164
 2011-08-20 00:17:45 +00:00
Chad Rosier
55c57f07dd VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg. 
Therefore, rather then generate a pseudo instruction, which is later expanded,
generate the necessary instructions in place.

llvm-svn: 138163
 2011-08-20 00:17:25 +00:00
Bill Wendling
bfc0c6c1de If we're splitting the landing pad block and assigning it only one predecessor, 
then don't split it a second time, since that block will be dead.

llvm-svn: 138153
 2011-08-19 23:46:30 +00:00
Devang Patel
e4127d626e Do not use named md nodes to track variables that are completely optimized. This does not scale while doing LTO with debug info. New approach is to include list of variables in the subprogram info directly. 
llvm-svn: 138145
 2011-08-19 23:28:12 +00:00
Jim Grosbach
be94868d66 Thumb parsing and encoding support for NOP. 
The irony is not lost that this is not a completely trivial patchset.

llvm-svn: 138143
 2011-08-19 23:24:36 +00:00
Akira Hatanaka
02cff5ae2d Fix bug in function IsShiftedMask. Remove parameter SizeInBits, which is not 
needed for Mips32.

llvm-svn: 138132
 2011-08-19 22:59:00 +00:00
Jim Grosbach
326e78be7a Thumb assembly parsing and encoding for NEG. 
llvm-svn: 138131
 2011-08-19 22:51:03 +00:00
Benjamin Kramer
cca4305d51 Roll back the rest of r126557. It's a hack that will break in some obscure cases. 
llvm-svn: 138130
 2011-08-19 22:39:31 +00:00
Jim Grosbach
3cb3facb8f Fix NEG alias 
llvm-svn: 138125
 2011-08-19 22:30:58 +00:00
Jim Grosbach
a97661cac4 Be more lenient on tied operand matching for MUL. 
llvm-svn: 138124
 2011-08-19 22:30:46 +00:00
Bruno Cardoso Lopes
9979e44f1b Re-write part of VEX encoding logic, to be more easy to read! Also fix 
a bug and add a testcase!

llvm-svn: 138123
 2011-08-19 22:27:29 +00:00
Jim Grosbach
5481e15390 Update tests. 
llvm-svn: 138116
 2011-08-19 22:19:48 +00:00
Jim Grosbach
8e2d4a63dc Thumb assembly parsing and encoding for MUL. 
llvm-svn: 138108
 2011-08-19 22:07:46 +00:00
Bill Wendling
31d80032c6 The landingpad instruction isn't dead simply because it's value isn't used. 
llvm-svn: 138102
 2011-08-19 21:52:06 +00:00
Nick Lewycky
97d6254420 Eli points out that this is what report_fatal_error() is for. 
llvm-svn: 138091
 2011-08-19 21:45:19 +00:00
Jim Grosbach
cf35d78b16 Thumb assembly parsing and encoding for MOV. 
llvm-svn: 138076
 2011-08-19 20:46:54 +00:00
Jim Grosbach
8952a2e87e Tidy up. Tab character. 
llvm-svn: 138072
 2011-08-19 20:30:19 +00:00
Nick Lewycky
ed042d8794 This is not actually unreachable, so don't use llvm_unreachable for it. Since 
the intent seems to be to terminate even in Release builds, just use abort()
directly.

If program flow ever reaches a __builtin_unreachable (which llvm_unreachable is
#define'd to on newer GCCs) then the program is undefined.

llvm-svn: 138068
 2011-08-19 20:14:27 +00:00
Jim Grosbach
8e03b52754 Tab characters. 
llvm-svn: 138066
 2011-08-19 19:41:46 +00:00
Jim Grosbach
7d707b4fb1 Thumb assembly parsing and encoding for LSL(immediate). 
llvm-svn: 138063
 2011-08-19 19:29:25 +00:00
Jim Grosbach
9174714826 Thumb assembly parsing and encoding for LDRSB and LDRSH. 
llvm-svn: 138061
 2011-08-19 19:17:58 +00:00
Jim Grosbach
27001ee5fd Thumb assembly parsing and encoding for LDRH. 
llvm-svn: 138060
 2011-08-19 18:55:51 +00:00
Jim Grosbach
36fb75a109 Thumb assembly parsing and encoding for LDRB. 
llvm-svn: 138059
 2011-08-19 18:49:59 +00:00
Sean Callanan
e6d9e9ed24 Fixed a memory bug in the MCDisassembler where 
MCParsedAsmOperand objects were being leaked.

llvm-svn: 138053
 2011-08-19 18:23:06 +00:00
Jim Grosbach
6d9a3e68bb Thumb assembly parsing and encoding for LDR(literal). 
llvm-svn: 138052
 2011-08-19 18:20:48 +00:00
Jim Grosbach
d429ab26cb Thumb assembly parsing and encoding for LDR(immediate) form T2. 
llvm-svn: 138050
 2011-08-19 18:13:48 +00:00
Jim Grosbach
ce30deef35 Use helper function to check for low registers. 
llvm-svn: 138048
 2011-08-19 17:57:22 +00:00
Jim Grosbach
35b968afdc Thumb assembly parsing and encoding for LDR(immediate) form T1. 
llvm-svn: 138047
 2011-08-19 17:55:24 +00:00
Jim Grosbach
b70142a801 Add explanatory comment. 
llvm-svn: 138042
 2011-08-19 16:52:32 +00:00
Kalle Raiskila
a86e3cd02c Have SPU backend use the external TCE scheduler, if the library is loaded as a 
module.

Patch by Pekka Jääskeläinen.

llvm-svn: 138037
 2011-08-19 10:50:24 +00:00
Craig Topper
f68d77215d Add TB encoding to VEX versions of SSE fp logical operations to fix disassembler 
llvm-svn: 138034
 2011-08-19 05:28:50 +00:00
Bruno Cardoso Lopes
306110c29a Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the 
implementation!

llvm-svn: 138029
 2011-08-19 02:23:56 +00:00
Jakob Stoklund Olesen
d65435a076 Add llc flags to disable machine DCE and CSE. 
This is useful for unit tests.

llvm-svn: 138028
 2011-08-19 02:05:35 +00:00
Benjamin Kramer
0d60a5573c Make a bunch of symbols private. 
llvm-svn: 138025
 2011-08-19 01:42:18 +00:00
Benjamin Kramer
c5a90f3683 C API functions must be able to see their extern "C" definitions, or it will be impossible to call them from C. 
llvm-svn: 138022
 2011-08-19 01:36:54 +00:00
Jakob Stoklund Olesen
d18e1ee34f Don't treat a partial <def,undef> operand as a read. 
Normally, a partial register def is treated as reading the
super-register unless it also defines the full register like this:

  %vreg110:sub_32bit<def> = COPY %vreg77:sub_32bit, %vreg110<imp-def>

This patch also uses the <undef> flag on partial defs to recognize
non-reading operands:

  %vreg110:sub_32bit<def,undef> = COPY %vreg77:sub_32bit

This fixes a subtle bug in RegisterCoalescer where LIS->shrinkToUses
would treat a coalesced copy as still reading the register, extending
the live range artificially.

My test case only works when I disable DCE so a dead copy is left for
RegisterCoalescer, so I am not including it.

<rdar://problem/9967101>

llvm-svn: 138018
 2011-08-19 00:30:17 +00:00
Dan Gohman
c5d64c76e0 Track a retain+release nesting level independently of the 
known-incremented level, because the two concepts can be used
to prove the saftey of a retain+release removal in different
ways.

llvm-svn: 138016
 2011-08-19 00:26:36 +00:00
Bill Wendling
4eead96931 Intelligently split the landing pad block. 
We have to be careful when splitting the landing pad block, because the
landingpad instruction is required to remain as the first non-PHI of an invoke's
unwind edge. To retain this, we split the block into two blocks, moving the
predecessors within the loop to one block and the remaining predecessors to the
other. The landingpad instruction is cloned into the new blocks.

llvm-svn: 138015
 2011-08-19 00:09:22 +00:00
Bill Wendling
3079e1ccda Add SplitLandingPadPredecessors(). 
SplitLandingPadPredecessors is similar to SplitBlockPredecessors in that it
splits the current block and attaches a set of predecessors to the new basic
block. However, it differs from SplitBlockPredecessors in that it's specifically
designed to handle landing pad blocks.

Two new basic blocks are created: one that is has the vector of predecessors as
its predecessors and one that has the remaining predecessors as its
predecessors. Those two new blocks then receive a cloned copy of the landingpad
instruction from the original block. The landingpad instructions are joined in a
PHI, etc. Like SplitBlockPredecessors, it updates the LLVM IR, AliasAnalysis,
DominatorTree, DominanceFrontier, LoopInfo, and LCCSA analyses.

llvm-svn: 138014
 2011-08-19 00:05:40 +00:00
Bruno Cardoso Lopes
0d458d4bb3 Re-encoded 128-bit AVX versions of SQRT, RSQRT, RCP have 3 operands 
instead of 2. They were already defined this way in their regular
version, but not for the intrinsics versions (*_Int), and that would work
for assembly emission but not for object code, since a MachineOperand
would be missing. This commit fix PR10697.

Also removed the {VSQRT,VRSQRT,VRCP}r_Int forms and match the intrinsic
via INSERT_SUBREG+EXTRACT_SUBREG patterns. The same couldn't be done for
memory versions because sse_load_f32/sse_load_f64 operand need special
handling and don't work like regular "addr" operands.

There are right now 114 "*_Int" and 98 "Int_*" forms! I'm slowly
removing them as I step through, but hope we can get rid of these
someday, they are really annoying :)

llvm-svn: 138012
 2011-08-18 23:59:21 +00:00
Devang Patel
9fa42d022b There is no need to add file as context for subroutine type. The subroutine type does not need any context. 
llvm-svn: 138010
 2011-08-18 23:50:57 +00:00
Renato Golin
300ff0b415 add the comments of each declaration follow it, making it easier to read and compare to GCC's result. 
llvm-svn: 138009
 2011-08-18 23:43:14 +00:00
Bill Wendling
ba667af404 Use 'getFirstInsertionPt' when trying to insert new instructions during LICM. 
llvm-svn: 138008
 2011-08-18 23:42:36 +00:00
Akira Hatanaka
163382894e Use subword loads instead of a 4-byte load when the size of a structure (or a 
piece of it) that is being passed by value is smaller than a word.

llvm-svn: 138007
 2011-08-18 23:39:37 +00:00
Devang Patel
68d2232bfe Eliminate unnecessary forwarding function. 
llvm-svn: 138006
 2011-08-18 23:17:55 +00:00
Ivan Krasin
311fcc9b92 Add NativeClient operating system support. 
This patch adds support of NativeClient (*-*-nacl) OS support to LLVM.
It's already supported in autoconf/config.sub.

The motivation for this change is to start upstreaming PNaCl work. The
whole set of patches include llvm backends (i686, x86_64, ARM),
llvm-gcc (probably, would not be upstreamed because it's deprecated)
and clang (the work has been just started, the amount of changes is
going to be low and the most of the work is expected to be done close
to the mainline).

llvm-svn: 138005
 2011-08-18 22:54:21 +00:00
Owen Anderson
421e30086e STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate. 
Found by randomized testing.

llvm-svn: 138003
 2011-08-18 22:47:44 +00:00
Owen Anderson
d113a59074 Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs have it unset. 
llvm-svn: 138000
 2011-08-18 22:31:17 +00:00
Devang Patel
0253beee5c Add new DIE into the map asap. 
llvm-svn: 137998
 2011-08-18 22:21:50 +00:00
Owen Anderson
7f3f0234a2 Remember to fill in some operands so we can print _something_ coherent even when decoding the CPS instruction soft-fails. 
llvm-svn: 137997
 2011-08-18 22:15:25 +00:00
Owen Anderson
d121f0e77c Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions. 
Fixes a large class of disassembler crashes found by randomized testing.

llvm-svn: 137995
 2011-08-18 22:11:02 +00:00
Ivan Krasin
338df71d60 FastISel: avoid function calls between the materialization of the constant and its use. 
llvm-svn: 137993
 2011-08-18 22:06:10 +00:00
Jim Grosbach
7ecefeb594 Thumb assembly parsing and encoding for LDM instruction. 
Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.

llvm-svn: 137986
 2011-08-18 21:50:53 +00:00
Dan Gohman
323adc0a3a Make it clear that this code is iterating in reverse order through the array. 
llvm-svn: 137985
 2011-08-18 21:27:42 +00:00
Bill Wendling
fef33f1d24 Revert r137871. The loop simplify pass should require all exits from a loop that 
aren't from an indirect branch need to be dominated by the loop header.

llvm-svn: 137981
 2011-08-18 21:10:01 +00:00
Bill Wendling
f3c0fabac7 Split out the updating of PHI nodes after splitting the BB into a separate 
function.

llvm-svn: 137979
 2011-08-18 20:51:04 +00:00
Bill Wendling
dec05a3784 Use this fantzy ArrayRef thing to pass in the list of predecessors. 
llvm-svn: 137978
 2011-08-18 20:39:32 +00:00