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Commit Graph

10142 Commits

Author SHA1 Message Date
Devang Patel
a60b24c230 XFAIL this test on powerpc for now.
llvm-svn: 106862
2010-06-25 17:32:23 +00:00
Bruno Cardoso Lopes
bde2881855 Add some AVX convert instructions
llvm-svn: 106815
2010-06-25 00:39:30 +00:00
Dan Gohman
07ff7584a7 Don't write an output file to cwd, and put an rdar prefix on
an rdar number.

llvm-svn: 106810
2010-06-24 23:45:15 +00:00
Dan Gohman
0be71f4660 Teach EmitLiveInCopies to omit copies for unused virtual registers,
and to clean up unused incoming physregs from the live-in list.

llvm-svn: 106805
2010-06-24 22:23:02 +00:00
Bill Wendling
eebd6fa159 It's possible that a flag is added to the SDNode that points back to the
original SDNode. This is badness. Also, this function allows one SDNode to point
multiple flags to another SDNode. Badness as well.

llvm-svn: 106793
2010-06-24 22:00:37 +00:00
Devang Patel
af1d4eede5 DBG_VALUE machine instruction pointing to undefined register for a variable justify a separate scope if the variable is inlined function's argument.
Radar 8122864.

llvm-svn: 106792
2010-06-24 21:51:19 +00:00
Bruno Cardoso Lopes
11a236d970 - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}.
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.

llvm-svn: 106787
2010-06-24 20:48:23 +00:00
Dale Johannesen
257b602b8b Disallow matching "i" constraint to symbol addresses when
address requires a register or secondary load to compute
(most PIC modes).  This improves "g" constraint handling.  8015842.

The test from 2007 is attempting to test the fix for PR1761,
but since -relocation-model=static doesn't work on Darwin
x86-64, it was not testing what it was supposed to be testing
and was passing erroneously.  Fixed to use Linux x86-64.

llvm-svn: 106779
2010-06-24 20:14:51 +00:00
Jakob Stoklund Olesen
9f8104463f Replace a big gob of old coalescer logic with the new CoalescerPair class.
CoalescerPair can determine if a copy can be coalesced, and which register gets
merged away. The old logic in SimpleRegisterCoalescing had evolved into
something a bit too convoluted.

This second attempt fixes some crashes that only occurred Linux.

llvm-svn: 106769
2010-06-24 18:15:01 +00:00
Bob Wilson
26297589b7 PR7458: Try commuting Thumb2 instruction operands to put them into 2-address
form so they can be narrowed to 16-bit instructions.

llvm-svn: 106762
2010-06-24 16:50:20 +00:00
Dan Gohman
d79ac4a097 Eliminate the other half of the BRCOND optimization, and update
as many tests as possible.

llvm-svn: 106749
2010-06-24 15:24:03 +00:00
Dan Gohman
3285057a9d Eliminate the first have of the optimization which eliminates BRCOND
when the condition is constant. This optimization shouldn't be
necessary, because codegen shouldn't be able to find dead control
paths that the IR-level optimizer can't find. And it's undesirable,
because it encourages bugpoint to leave "br i1 false" branches
in its output. And it wasn't updating the CFG.

I updated all the tests I could, but some tests are too reduced
and I wasn't able to meaningfully preserve them.

llvm-svn: 106748
2010-06-24 15:04:11 +00:00
Dan Gohman
a08a9b8a0b Reapply r106634, now that the bug it exposed is fixed.
llvm-svn: 106746
2010-06-24 14:30:44 +00:00
Chris Lattner
606dc0529b Teach the x86 mc assembler that %dr6 = %db6, this implements
rdar://8013734

llvm-svn: 106725
2010-06-24 07:29:18 +00:00
Dan Gohman
7953fd5824 Optimize the "bit test" code path for switch lowering in the
case where the bit mask has exactly one bit.

llvm-svn: 106716
2010-06-24 02:06:24 +00:00
Jakob Stoklund Olesen
1c9d50ed92 Revert "Replace a big gob of old coalescer logic with the new CoalescerPair class."
Whiny buildbots.

llvm-svn: 106710
2010-06-24 00:52:22 +00:00
Bruno Cardoso Lopes
633f345ba9 Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases
llvm-svn: 106705
2010-06-24 00:32:06 +00:00
Jakob Stoklund Olesen
19abbf4387 Replace a big gob of old coalescer logic with the new CoalescerPair class.
CoalescerPair can determine if a copy can be coalesced, and which register gets
merged away. The old logic in SimpleRegisterCoalescing had evolved into
something a bit too convoluted.

llvm-svn: 106701
2010-06-24 00:12:39 +00:00
Bill Wendling
777c025ad8 We are missing opportunites to use ldm. Take code like this:
void t(int *cp0, int *cp1, int *dp, int fmd) {
  int c0, c1, d0, d1, d2, d3;
  c0 = (*cp0++ & 0xffff) | ((*cp1++ << 16) & 0xffff0000);
  c1 = (*cp0++ & 0xffff) | ((*cp1++ << 16) & 0xffff0000);
  /* ... */
}

It code gens into something pretty bad. But with this change (analogous to the
X86 back-end), it will use ldm and generate few instructions.

llvm-svn: 106693
2010-06-23 23:00:16 +00:00
Bruno Cardoso Lopes
b1bfbacead Add AVX MOVMSK{PS,PD}rr instructions
llvm-svn: 106683
2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
c6ac26123d Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction
llvm-svn: 106678
2010-06-23 21:10:57 +00:00
Bruno Cardoso Lopes
8cfdcf7691 Add AVX SHUF{PS,PD}{rr,rm} instructions
llvm-svn: 106672
2010-06-23 20:07:15 +00:00
Nico Weber
04606293a5 Add support for the x86 instructions "pusha" and "popa".
llvm-svn: 106671
2010-06-23 20:00:58 +00:00
Bruno Cardoso Lopes
fe5b207577 Fix a tblgen bug.
Given the pattern below as an example:
list<dag> Pattern = [(set RC:$dst, (v4f32 (shufp:src3 RC:$src1,
                            (mem_frag addr:$src2))))];

The right reference resolving should lead to:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp:src3 VR128:$src1,
                            (mem_frag addr:$src2))))];
But was yielding:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp VR128:$src1,
                            (mem_frag addr:$src2))))];

Fix this by passing the right name when creating a new DagInit node.

llvm-svn: 106670
2010-06-23 19:50:39 +00:00
Dale Johannesen
f0763e6300 Reinstate correct test, remove the real invalidated test.
llvm-svn: 106664
2010-06-23 18:56:06 +00:00
Dale Johannesen
4e632b4237 Remove tests invalidated by previous checkin.
llvm-svn: 106663
2010-06-23 18:53:12 +00:00
Bill Wendling
f92cb857aa MorphNodeTo doesn't preserve the memory operands. Because we're morphing a node
into the same node, but with different non-memory operands, we need to replace
the memory operands after it's finished morphing.

llvm-svn: 106643
2010-06-23 18:16:24 +00:00
Daniel Dunbar
a83dc9a464 tests: Tweak lit.cfg to fix breakage with out-of-dir lookup.
llvm-svn: 106638
2010-06-23 18:06:16 +00:00
Daniel Dunbar
be50ef88bd Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
llvm-svn: 106634
2010-06-23 17:09:26 +00:00
Daniel Dunbar
e6ee7409b9 Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.
Conflicts:

	lib/CodeGen/MachineSink.cpp

llvm-svn: 106614
2010-06-23 00:48:25 +00:00
Stuart Hastings
bf77774e2f Less incorrect handling of zero-length bitfields. Radars 7992077 and 8093043.
llvm-svn: 106611
2010-06-23 00:31:14 +00:00
Bruno Cardoso Lopes
db9027d95d Add AVX compare packed instructions
llvm-svn: 106600
2010-06-22 23:37:59 +00:00
Dan Gohman
c33529255a Loosen up this test so that it doesn't depend as much on register
allocation details.

llvm-svn: 106599
2010-06-22 23:32:47 +00:00
Dan Gohman
2ac2a33a1b Fix OptimizeMax to handle an odd case where one of the max operands
is another max which folds. This fixes PR7454.

llvm-svn: 106594
2010-06-22 23:07:13 +00:00
Bruno Cardoso Lopes
424b206ad4 Reapply support for AVX unpack and interleave instructions, with
testcases this time.

llvm-svn: 106593
2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
93ec8dcd01 Add AVX MOV{SS,SD}{rr,rm} instructions
llvm-svn: 106588
2010-06-22 22:38:56 +00:00
Bob Wilson
cb414cca8d Thumb1 functions using @llvm.returnaddress were not saving the incoming LR.
Radar 8031193.

llvm-svn: 106582
2010-06-22 22:04:24 +00:00
Eric Christopher
48c062d65b Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion
during test runs.

llvm-svn: 106577
2010-06-22 21:11:51 +00:00
Dale Johannesen
dd9d7b11da Add SSE so these actually pass on non-X86 hosts.
llvm-svn: 106575
2010-06-22 20:54:03 +00:00
Bruno Cardoso Lopes
a176972a1b Fix a subtle multiclass bug: when using class inheritance on
a toplevel 'defm', make sure to properly resolve references.

llvm-svn: 106570
2010-06-22 20:30:50 +00:00
Bill Wendling
1e7edfa27a Corresponding test changes for r106564.
llvm-svn: 106569
2010-06-22 20:30:14 +00:00
Mon P Wang
c0fb410ae3 Move v-binop-widen tests to X86 since they don't work on all platforms
llvm-svn: 106562
2010-06-22 19:40:50 +00:00
Jakob Stoklund Olesen
ddb09c5258 Remove the SimpleJoin optimization from SimpleRegisterCoalescing.
Measurements show that it does not speed up coalescing, so there is no reason
the keep the added complexity around.

Also clean out some unused methods and static functions.

llvm-svn: 106548
2010-06-22 16:13:57 +00:00
Dan Gohman
a3bc6b13f7 Allow "exhaustive" trip count evaluation on phi nodes with all
constant operands.

llvm-svn: 106537
2010-06-22 13:15:46 +00:00
Evan Cheng
a1ebf91a39 Tail merging pass shall not break up IT blocks. rdar://8115404
llvm-svn: 106517
2010-06-22 01:18:16 +00:00
Dan Gohman
bcc040be1b Teach two-address lowering how to unfold a load to open up commuting
opportunities. For example, this lets it emit this:

   movq (%rax), %rcx
   addq %rdx, %rcx

instead of this:

   movq %rdx, %rcx
   addq (%rax), %rcx

in the case where %rdx has subsequent uses. It's the same number
of instructions, and usually the same encoding size on x86, but
it appears faster, and in general, it may allow better scheduling
for the load.

llvm-svn: 106493
2010-06-21 22:17:20 +00:00
Evan Cheng
167a8655c7 Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores which have already been processed.
llvm-svn: 106481
2010-06-21 21:21:14 +00:00
Dan Gohman
cbede71023 Make this test more robust in case LLVM ever decides to align the global
variable differently.

llvm-svn: 106454
2010-06-21 19:56:27 +00:00
Dale Johannesen
baf342fdab Add missing FileCheck call.
llvm-svn: 106443
2010-06-21 18:46:08 +00:00
Devang Patel
79e2417a08 test case for r106438.
llvm-svn: 106439
2010-06-21 18:37:23 +00:00